Patents by Inventor Konstantinos I. Papathomas

Konstantinos I. Papathomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6369452
    Abstract: An electronic structure bondable to an electronic assembly, such as a chip. The electronic structure may be joined to a electronic assembly, such as a chip, by use of a structural epoxy adhesive. The electronic structure includes a mineral layer on a metallic plate, and an adhesion promoter layer on the mineral layer. The metallic plate includes a metallic substance that includes a pure metal with or without a metal coating. The metallic substance may include such substances as stainless steel, aluminum, titanium, copper, copper coated with nickel, and copper coated with chrome. The mineral layer includes a chemical compound derived from a mineral; e.g., silicon dioxide (SiO2) derived from quartz. Such chemical compounds may include such substances as silicon dioxide, silicon nitride, and silicon carbide. The chemical compound may exist in either crystalline or amorphous form. The adhesion promoter may include such chemical substances as silanes, titanates, zirconates, and aluminates.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: April 9, 2002
    Assignee: International Business Machines Corporation
    Inventors: Stephen Leslie Buchwalter, Hung Manh Dang, Michael A. Gaynes, Konstantinos I. Papathomas
  • Patent number: 6343001
    Abstract: A method of forming a capacitive core structure and of forming a circuitized printed wiring board from the core structure and the resulting structures are provided. The capacitive core structure is formed by providing a central conducting plane of a sheet of conductive material and forming at least one clearance hole in the central conducting plane. First and second external conducting planes are laminated to opposite sides of the ground plane with a film of dielectric material between each of the first and second external planes and the central conducting plane. At least one clearance hole is formed in each of the first and second external planes. A circuitized wiring board structure can be formed by laminating a capacitive core structure between two circuitized structures. The invention also relates to the structures formed by these methods.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: January 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Japp, John M. Lauffer, Konstantinos I. Papathomas
  • Publication number: 20020007966
    Abstract: A method and arrangement for creating an impedance controlled printing wiring board, particularly the formation of a structure for high speed printed wiring boards incorporating multiple differential impedance controlled layers. Furthermore, there are provided vias of either through-holes, blind holes and buried holes filled with a conductive paste material to form electrical interconnections with conductive layers of the printed wiring board.
    Type: Application
    Filed: June 11, 2001
    Publication date: January 24, 2002
    Applicant: International Business Machines Corporation
    Inventors: Thomas Richard Miller, Konstantinos I. Papathomas, Brian Eugene Curcio, Joseph J. Sniezek
  • Patent number: 6337375
    Abstract: A composition for use in making high optical contrast and UV light fluorescing dielectric material usuable in printed circuit boards, which in turn may form part of an electronic package. The composition comprises a resin, a coloring agent, and a fluorescing agent. A dielectric material is also defined that comprises a reinforcing material combined with the composition, the dielectric material forming at least one layer in combination with at least one conductive layer for the electronic package.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: January 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Gary A. Johansson, Konstantinos I. Papathomas
  • Publication number: 20010041389
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Application
    Filed: February 12, 2001
    Publication date: November 15, 2001
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D Poliks
  • Publication number: 20010040047
    Abstract: Printed circuit boards, cards and chip carriers are fabricated by treating an already circuitized substrate with a swelling agent, then treating the circuitized substrate with a composition containing an alkaline permanganate, a chromate and/or chlorite and then applying a metal layer to coat the circuitized portion of the substrate.
    Type: Application
    Filed: July 31, 2001
    Publication date: November 15, 2001
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, Timothy Leroy Wells, James Warren Wilson
  • Publication number: 20010028117
    Abstract: A method and structure is provided for preventing wetting or bleed of an adhesive, such as an epoxy, onto noble metal wire bond pads on the surface of a dielectric substrate when attaching an I/C chip to the substrate. The method includes treating the wire bond pads with a chemical composition which prevents bleeding onto the surfaces of the wire bond pads by a component of the epoxy. The chemical composition is a chemical which will provide “Self-Assembled Monolayers” (SAMs) on the surface of the gold. These compositions are characterized by a molecule having at least one group, such as a mercaptan or disulfide, connected to a hydrocarbon moiety, such as a (CH2)x chain. The affinity of the thiol or sulfur-containing portion of the molecule chemically bonding with the noble metal provides a relatively strong attachment of the molecule to the metal surface.
    Type: Application
    Filed: June 14, 2001
    Publication date: October 11, 2001
    Applicant: International Business Machines Corporation
    Inventors: Bernd K. Appelt, Gary A. Johansson, Gerald W. Jones, Luis J. Matienzo, Yenloan H. Nguyen, Konstantinos I. Papathomas
  • Publication number: 20010027842
    Abstract: High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.
    Type: Application
    Filed: May 31, 2001
    Publication date: October 11, 2001
    Applicant: International Business Machines Corporation
    Inventors: Brian E. Curcio, Peter Alfred Gruber, Frederic Maurer, Konstantinos I. Papathomas, Mark David Poliks
  • Patent number: 6296897
    Abstract: Printed circuit boards, cards and chip carriers are fabricated by treating an already circuitized substrate with a swelling agent, then treating the circuitized substrate with a composition containing an alkaline permanganate, a chromate and/or chlorite and then applying a metal layer to coat the circuitized portion of the substrate.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: October 2, 2001
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, Timothy Leroy Wells, James Warren Wilson
  • Publication number: 20010008747
    Abstract: Apertures in a circuit board or chip carrier are filled with a cured photosensitive dielectric material by substantially filling the apertures in the circuit board or chip carrier and applying a layer of a thickness to the circuit board or chip carrier with a positive photosensitive dielectric material, exposing the photosensitive dielectric material to actinic radiation in such a way as to leave material located in apertures unexposed to the radiation; baking the structure so as to harden the unexposed photosensitive dielectric material and developing the exposed dielectric material in order to remove it leaving behind cured photosensitive dielectric material in the apertures.
    Type: Application
    Filed: February 21, 2001
    Publication date: July 19, 2001
    Applicant: International Business Machines Corporation
    Inventors: Bernd Karl Appelt, Gary Alan Johansson, Konstantinos I. Papathomas
  • Patent number: 6254972
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
  • Patent number: 6252307
    Abstract: A method and structure is provided for preventing wetting or bleed of an adhesive, such as an epoxy, onto noble metal wire bond pads on the surface of a dielectric substrate when attaching an I/C chip to the substrate. The method includes treating the wire bond pads with a chemical composition which prevents bleeding onto the surfaces of the wire bond pads by a component of the epoxy. The chemical composition is a chemical which will provide “Self-Assembled Monolayers” (SAMs) on the surface of the gold. These compositions are characterized by a molecule having at least one group, such as a mercaptan or disulfide, connected to a hydrocarbon moiety, such as a (CH2)x chain. The affinity of the thiol or sulfur-containing portion of the molecule chemically bonding with the noble metal provides a relatively strong attachment of the molecule to the metal surface.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: June 26, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bernd K. Appelt, Gary A. Johansson, Gerald W. Jones, Luis J. Matienzo, Yenloan H. Nguyen, Konstantinos I. Papathomas
  • Patent number: 6225031
    Abstract: Apertures in a circuit board or chip carrier are filled with a cured photosensitive dielectric material by substantially filling the apertures in the circuit board or chip carrier and applying a layer of a thickness to the circuit board or chip carrier with a positive photosensitive dielectric material, exposing the photosensitive dielectric material to actinic radiation in such a way as to leave material located in apertures unexposed to the radiation; baking the structure so as to harden the unexposed photosensitive dielectric material and developing the exposed dielectric material in order to remove it leaving behind cured photosensitive dielectric material in the apertures.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bernd Karl Appelt, Gary Alan Johansson, Konstantinos I. Papathomas
  • Patent number: 6190759
    Abstract: A composition for use in making high optical contrast and UV light fluorescing dielectric material usuable in printed circuit boards, which in turn may form part of an electronic package. The composition comprises a resin, a coloring agent, and a fluorescing agent. A dielectric material is also defined that comprises a reinforcing material combined with the composition, the dielectric material forming at least one layer in combination with at least one conductive layer for the electronic package.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gary A. Johansson, Konstantinos I. Papathomas
  • Patent number: 6187417
    Abstract: A dielectric for use in making high optical contrast and UV light fluorescing substrates usable in printed circuit boards, which in turn may form part of an electronic package. The dielectric comprises a resin, a coloring agent, and a fluorescing agent and does not include a reinforcing material. The substrate also includes a first conductive layer on the dielectric layer.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas
  • Patent number: 6129955
    Abstract: An electronic package assembly where a low profile integrated circuit chip package is soldered to an organic (e.g., epoxy resin) substrate, e.g., a printed circuit board or card, the projecting conductive leads of the integrated circuit chip package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with ultraviolet photocured encapsulant material (e.g., an epoxy resin or a cyanate with a photoinitiator and silica) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: October 10, 2000
    Assignee: International Business Machines Corporation
    Inventors: Konstantinos I. Papathomas, Stephen Joseph Fuerniss, Deborah Lynn Dittrich, David Wei Wang
  • Patent number: 6099959
    Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: August 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Konrad, Konstantinos I. Papathomas, John A. Welsh
  • Patent number: 6090474
    Abstract: A printed circuit board or card having plated through-holes is provided wherein plated through-holes are filled with a photocured polymerized composition. Also, a method for fabricating these printed circuit boards or cards is provided. Also provided are compositions and methods of providing carrier films coated with the compositions for use in filling vias or plated through-holes.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: July 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gary Alan Johansson, Konstantinos I. Papathomas
  • Patent number: 6037096
    Abstract: The present invention relates to a method for planarizing circuit board apertures wherein a photoimageable film composition comprising a photoimageable dielectric composition and a support film is employed to fill the circuit board apertures. Precircuitized and postcircuitized embodiments are discussed.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: March 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mary Beth Fletcher, Robert L. Nedbalski, Konstantinos I. Papathomas, Amarjit Singh Rai
  • Patent number: 5900675
    Abstract: An integrated circuit chip package with an integrated chip carrier having differing coefficients of thermal expansion (CTE) in the x-y plane. The chip carrier is comprised of two main regions. The first is a core region having a CTE approximately equal to that of the semiconductor chip CTE. This core region also has approximately the same dimensions in the x-y plane as the semiconductor chip. The chip is mounted just above this core region. The second region is a peripheral region which surrounds the core region in the x-y plane. This second region has a CTE approximately equal to that of the printed circuit board CTE. During thermal cycling, the materials expand and contract. The core region expands at nearly the same rate as the chip and the area outside the chip footprint, the peripheral region, expands at a rate similar to that of the printed circuit board. This characteristic prevents thermal stress-induced fatigue on the package components and solder joints.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: May 4, 1999
    Assignee: International Business Machines Corporation
    Inventors: Bernd Karl-Heinz Appelt, Donald Seton Farquhar, Robert Maynard Japp, Konstantinos I. Papathomas