Patents by Inventor Kuang Hsieh

Kuang Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230157029
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a first inter-metal dielectric (IMD) layer on a substrate, forming a first trench and a second trench in the first IMD layer, forming a bottom electrode in the first trench and the second trench, forming a ferroelectric (FE) layer on the bottom electrode, and then forming a top electrode on the FE layer to form a ferroelectric random access memory (FeRAM).
    Type: Application
    Filed: December 13, 2021
    Publication date: May 18, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai, Chun-Hsien Lin
  • Patent number: 11646367
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed on the shallow recess.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: May 9, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Publication number: 20230133713
    Abstract: A lashing device includes: a base seat having a bottom wall, and two pivot lugs which cooperate with the bottom wall to define a pivot slot thereamong, and each of which is formed with an pivot hole communicating with the pivot slot; a pivot pin extending through the pivot hole of each of the pivot lugs; and an eye plate received in the pivot slot, and having a middle portion that is formed with a pivot hole provided for the pivot pin to movably extends therethrough, and first and second wing portions which are connected to opposite ends of the middle portion, respectively, and each of which has an elongated hole having an arc section. The arc axes of the arc sections of the elongated holes are aligned with the center axis of the pivot hole.
    Type: Application
    Filed: June 1, 2022
    Publication date: May 4, 2023
    Inventor: Jung-Kuang HSIEH
  • Publication number: 20230014174
    Abstract: An environment detecting module, for securing a shell of a server, includes a sensing module, configured to sense an environment status by a polling method and generate a sensing signal according to the environment status; a connection module, configured to electrically connect the environment detecting module to a host terminal with a first connection status or a second connection status; and a microcontroller unit, coupled to the sensing module and the connection module, configured to determine a power source of the environment detecting module according to the first connection status or the second connection status, and to determine a first mode or a second mode of the environment detecting module according to the power source.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 19, 2023
    Applicant: Wiwynn Corporation
    Inventors: Yi-Hao Chen, Cheng-Kuang Hsieh, Yung-Ti Chung, Jheng-Ying Jiang
  • Publication number: 20220238677
    Abstract: A method for fabricating a nanowire transistor includes the steps of first forming a nanowire channel structure on a substrate, in which the nanowire channel structure includes first semiconductor layers and second semiconductor layers alternately disposed over one another. Next, a gate structure is formed on the nanowire channel structure and then a source/drain structure is formed adjacent to the gate structure, in which the source/drain structure is made of graphene.
    Type: Application
    Filed: February 26, 2021
    Publication date: July 28, 2022
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai, Ching-Wen Hung, Chun-Hsien Lin
  • Publication number: 20220093783
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed directly on the shallow recess.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 24, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Publication number: 20220093782
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed directly on the shallow recess.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 24, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Patent number: 11227944
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed directly on the shallow recess.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: January 18, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Publication number: 20210357349
    Abstract: An electronic apparatus and a hot-swappable storage device thereof are provided. The hot-swappable storage device includes a carrier, a connector, a controller, and a wireless communication interface. The carrier is configured to carry a plurality of storage components. The connector is configured to be electronically connected to a host end for performing a data transfer operation. The controller detects a connection status between the connector and the host end. The wireless communication interface decides whether to perform the data transfer operation according to the connection status.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 18, 2021
    Applicant: Wiwynn Corporation
    Inventors: Yi-Hao Chen, Cheng Kuang Hsieh
  • Patent number: 10948952
    Abstract: A power distribution board for a modular chassis system, wherein the modular chassis system is configured to install a plurality of electrical devices, and the power distribution board comprises: a plurality of detecting pins, a microcontroller and a plurality of protecting circuits. The plurality of detecting pins electrically connects to the plurality of electrical devices respectively, and each detecting pins is configured to detect a modular type of a respective one of the electrical devices. The microcontroller electrically connects to the plurality of the detecting pins and selectively chooses one of a plurality of configurations according to the detected modular type. Each of the protecting circuits electrically connects to the microcontroller and corresponds to one of the electrical devices, each of the protecting circuits set a rated power value according to the chosen one of the configurations.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 16, 2021
    Assignee: WIWYNN CORPORATION
    Inventors: Cheng Kuang Hsieh, Chia Ming Tsai, Chia Hao Hsu
  • Publication number: 20210057551
    Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Inventors: Po-Chang Lin, Bo-Han Huang, Chih-Chung Chen, Chun-Hsien Lin, Shih-Hung Tsai, Po-Kuang Hsieh
  • Publication number: 20210050438
    Abstract: An HEMT includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed directly on the shallow recess.
    Type: Application
    Filed: September 23, 2019
    Publication date: February 18, 2021
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Patent number: 10868148
    Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: December 15, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Chang Lin, Bo-Han Huang, Chih-Chung Chen, Chun-Hsien Lin, Shih-Hung Tsai, Po-Kuang Hsieh
  • Patent number: 10809534
    Abstract: A photography device includes a light transmitter, a light receiver, a processor, an adjustable focusing lens, and a driving module. The light transmitter is configured to transmit light to an object. The light receiver is configured to receive the reflected light. The processor is configured to generate a driving value according to transmission and reception of the light. The adjustable focusing lens has a focal length. The driving module is configured to adjust the focal length by driving the adjustable focusing lens according to the driving value.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: October 20, 2020
    Assignee: FASPRO SYSTEMS CO., LTD.
    Inventors: Steve Tsao, Yi-Hung Chu, Shih-Hua Yu, Pao-Chyuan Chen, Wen-Kuang Hsieh, Ying-Hung Chen
  • Patent number: 10782895
    Abstract: A metadata management method for a memory device includes generating a virtual address layer in a memory space of a non-volatile memory of the memory device; establishing a mapping table in the virtual address layer to store at least one metadata corresponding to at least one storing block, wherein the at least one storing block comprises at least one physical address and the at least one physical address is related to the memory space; when writing at least one datum to the memory device, writing the at least one datum to at least one memory block of the memory space according to the at least one physical address; and updating the at least one metadata of the at least one storing block when finishing writing the at least one datum.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: September 22, 2020
    Assignee: Wiwynn Corporation
    Inventors: Cheng-Kuang Hsieh, Chia-Hao Hsu
  • Patent number: 10754400
    Abstract: A control method for data storage system includes obtaining a correlation coefficient corresponding to storage devices using a control device, and adjusting the link speed of one of the storage devices using the control device.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: August 25, 2020
    Assignee: WIWYNN CORPORATION
    Inventors: Cheng Kuang Hsieh, Kai Sheng Chen, Chia Ming Tsai, Yi-Hao Chen
  • Patent number: 10715596
    Abstract: A server system and a control method for a storage unit are provided. The server system includes multiple modular devices and a connection device. The storage unit in the modular devices includes a transmission interface expander. The transmission interface expander detects whether connects a former modular device, and sets the storage unit as a slave device of the former modular device when the transmission interface expander connects the former modular device. When the transmission interface expander does not connect the former modular device, the transmission interface expander is set as a storage node and communicates to the external server, and the latter storage unit connected behind the transmission interface expander becomes a slave device of the transmission interface expander.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: July 14, 2020
    Assignee: Wiwynn Corporation
    Inventor: Cheng-Kuang Hsieh
  • Patent number: 10712956
    Abstract: A management method for a storage system is disclosed. The storage system comprises a plurality of hard disks, the management method comprises dividing the plurality of hard disks into a hot storage group, a warm storage group and a cold storage group according to a first threshold and a second threshold; exchanging a first warm storage hard disk conforming to the first threshold in the warm storage group with a hot storage hard disk in the hot storage group in response to not conform to the first threshold; and exchanging a cold storage hard disk conforming to the second threshold in the cold storage group with a second warm storage hard disk in the warm storage group in response to conform to the second threshold.
    Type: Grant
    Filed: July 4, 2018
    Date of Patent: July 14, 2020
    Assignee: Wiwynn Corporation
    Inventors: Cheng-Kuang Hsieh, Chung-Fu Huang
  • Patent number: 10707135
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first well in the substrate on the first region and a second well in the substrate on the second region; removing part of the first well to form a first recess; and forming a first epitaxial layer in the first recess.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: July 7, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuan-Hao Tseng, Chien-Ting Lin, Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Chueh-Fei Tai, Cheng-Ping Kuo
  • Publication number: 20200174256
    Abstract: A photography device includes a light transmitter, a light receiver, a processor, an adjustable focusing lens, and a driving module. The light transmitter is configured to transmit light to an object. The light receiver is configured to receive the reflected light. The processor is configured to generate a driving value according to transmission and reception of the light. The adjustable focusing lens has a focal length. The driving module is configured to adjust the focal length by driving the adjustable focusing lens according to the driving value.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Inventors: Steve Tsao, Yi-Hung Chu, Shih-Hua Yu, Pao-Chyuan Chen, Wen-Kuang Hsieh, Ying-Hung Chen