Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: Systems and methods directed to returning personalized image-based search results are described. In examples, a query including an image may be received, and a personalized item embedding may be generated based on the image and user profile information associated with a user. Further, a plurality of candidate images may be obtained based on the personalized item embedding. The candidate images may then be ranked according to a predicted level of user engagement for a user, and then diversified to ensure visual diversity among the ranked images. A portion of the diversified images may then be returned in response to an image-based search.

Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.

Abstract: A semiconductor device includes a semiconductor substrate; a plurality of channel regions, including a p-type channel region and an n-type channel region, disposed over the semiconductor substrate; and a gate structure. The gate structure includes a gate dielectric layer disposed over the plurality of channel regions and a work function metal (WFM) structure disposed over the gate dielectric layer. The WFM structure includes an n-type WFM layer over the n-type channel region and not over the p-type channel region and further includes a p-type WFM layer over both the n-type WFM layer and the p-type channel region. The gate structure further includes a fill metal layer disposed over the WFM structure and in direct contact with the p-type WFM layer.

Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes receiving a workpiece including a magnetic tunneling junction (MTJ) and a conductive capping layer disposed on the MTJ, depositing a first dielectric layer over the workpiece, performing a first planarization process to the first dielectric layer, and after the performing of the first planarization process, patterning the first dielectric layer to form an opening exposing a top surface of the conductive capping layer, selectively removing the conductive capping layer. The method also includes depositing an electrode layer to fill the opening and performing a second planarization process to the workpiece such that a top surface of the electrode layer and a top surface of the first dielectric layer are coplanar.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: Disclosed are an emergency control method and system based on source-load-storage regulation and cutback. According to the method, output power of power generating sources is regulated according to a power regulating quantity and a frequency regulation requirement, an output power compensation and output frequency of each power generating source are maintained within permissible ranges, so that a balance between power supply and demand of a power distribution network is maintained; and standby energy-storage power stations are used to make up a power gap, and an external power supply system is used to assist in making up a power deficiency, so that large load disturbance can be handled make up the power gap.

Abstract: Aspects of this disclosure are directed to a method and a terminal device, and a computer-readable storage medium. The terminal device includes processing circuitry that obtains n voice messages from at least one user account. n is a positive integer. The processing circuitry displays a voice message presentation interface. The voice message presentation interface is configured to display virtual characters corresponding to the n voice messages in a virtual world. Locations of the n voice messages in the virtual world are based on whether the n voice messages are unplayed. The virtual characters can be based on respective message attributes of the n voice messages.

Abstract: A method of copying at least first and second files stored in a client computing device to a host server, includes the steps of: generating at the host server a first read I/O request for data of the first file based on responses to pre-read I/O requests for the first file, received from the client computing device; transmitting a merged I/O request that includes the first read I/O request for data of the first file and pre-read I/O requests for the second file from the host server to the client computing device; generating at the host server a second read I/O request for data of the second file based on responses to the pre-read I/O requests for the second file, received from the client computing device; and transmitting the second read I/O request for data of the second file from the host server to the client computing device.

Abstract: The disclosed technology enables automated parking of an autonomous vehicle. An example method of performing automated parking for a vehicle comprises obtaining, from a plurality of global positioning system (GPS) devices located on or in an autonomous vehicle, a first set of location information that describes locations of multiple points on the autonomous vehicle, where the first set of location information are associated with a first position of the autonomous vehicle, determining, based on the first set of location information and a location of the parking area, a trajectory information that describes a trajectory for the autonomous vehicle to be driven from the first position of the autonomous vehicle to a parking area, and causing the autonomous vehicle to be driven along the trajectory to the parking area by causing operation of one or more devices located in the autonomous vehicle based on at least the trajectory information.

Abstract: A forming operation of resistive memory device is provided. The operation includes: applying a pre-forming gate voltage and a pre-forming bit line voltage to a target memory cell; performing a dense switching forming operation, wherein the dense switching forming operation includes alternately performing dense set operations and dense reset operations on the target memory cell, wherein the dense set operation includes applying a dense switching gate voltage and a dense set bit line voltage; and performing a normal set operation on the target memory cell, wherein the normal set operation includes applying a normal set gate voltage and a normal set bit line voltage to the target memory cell, the normal set gate voltage is greater than the pre-forming gate voltage and the dense switching gate voltage, and the normal set bit line voltage is less than the pre-forming bit line voltage and the dense set bit line voltage.

Abstract: The present disclosure discloses a sound device includes a frame, a magnet system, and a first vibration system and a second vibration system arranged on two sides of a magnet system. The magnet system includes a first central yoke, a central magnet mounted on the first central yoke, a side yoke surrounding the central magnet and fixed to the frame, and a connection portion connecting the first central yoke and the side yoke. The side yoke includes a first side yoke fixed to the frame and a second side yoke bending and extending from an edge of the first side yoke towards the central magnet; the connection portion connects the first central yoke and the second side yoke. The sound device in the present disclosure has higher magnetic ability and miniaturization ability.

Abstract: A sound generator provided in the present disclosure includes a frame, a magnetic circuit unit, and a first vibration unit and a second vibration unit arranged on two sides of the magnetic circuit unit. The magnetic circuit unit includes a first central magnetic yoke in the middle, a central magnet fixed to the first central magnetic yoke, a magnetic component arranged around the central magnet and fixed to the frame, and a connecting portion connecting the first central magnetic yoke to the magnetic component. The central magnet includes a first magnet portion fixed to the first central magnetic yoke and a second magnet portion fixed to the side of the first magnet portion away from the first central magnetic yoke, a projection area of the first magnet portion along a vibrating direction is greater than a projection area of the second magnet portion along the vibrating direction.

Abstract: A method includes forming a plurality of nanostructures over a substrate; etching the plurality of nanostructures to form recesses; forming source/drain regions in the recesses; removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures; depositing a gate dielectric over and around the second nanostructures; depositing a protective material over the gate dielectric; performing a fluorine treatment on the protective material; removing the protective material; depositing a first conductive material over the gate dielectric; and depositing a second conductive material over the first conductive material.

Abstract: A source-grid-load-storage networked collaborative frequency control method is disclosed, which comprises acquiring total active power ?P to be regulated during a secondary frequency regulation process of a power grid; performing frequency regulation by source-grid-load-storage of the power distribution system, allocating power regulation capacities, and determining whether the desired total active power is met after the frequency regulation; if the desired total active power is met, determining whether power of power generation units is out of limit; if the power of the power generation units is not out of limit, keeping active power of the power distribution system in balance to complete frequency regulation of the power grid; if the power of the power generation units is out of limit, correcting the power regulation capacities of the power generation units of the source-grid-load-storage and compensating a power difference to keep the active power of the power distribution system in balance.

Abstract: Composition and methods for killing microorganisms using antimicrobial epoxy polymers and epoxy polymer curing agents are described. Compositions containing at least one compound of formula I where R1 is a phenolic group (e.g., simple phenol, creosote, thymol, or carvacrol), and where R2 is a polyamine (e.g., ethylenediamine (EDA), diethylenetriamine (DETA), triethylenetetramine (TETA), tetraethylenepentamine (TEPA), hexamethylenediamine (HDA)); and optionally a carrier; the compositions may additionally contain at least one epoxy resin. Methods for killing microorganisms involving contacting the microorganisms with an effective microorganism killing amount of the above composition.

Abstract: A switching converter circuit, which switches one terminal of an inductor to different voltages, includes a high side MOSFET, a low side MOSFET, and a driver circuit which includes a high side driver, a low side driver, and a dead time control circuit. According to an output current, The dead time control circuit adaptively delays a low side driving signal to generate a high side enable signal for enabling the high side driver to generate a high side driving signal according to a pulse width modulation (PWM) signal; and/or adaptively delays the high side driving signal to generate a low side enable signal for enabling the low side driver to generate the low side driving signal according to the PWM signal, so as to adaptively control a dead time in which the high side MOSFET and the low side MOSFET are both not conductive.