Patents by Inventor Kun Huang

Kun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250031447
    Abstract: A display substrate, including: a base substrate; and a metal conductive layer, located at a side of the base substrate, and including a core conductive layer and a functional conductive layer laminated along a direction away from the base substrate; a material of the core conductive layer includes a conductive metal material; a material of the functional conductive layer includes a first diffusion barrier metal material and a first adhesion force enhancing metal material, wherein the first diffusion barrier metal material is configured to block diffusion of the conductive metal material, and the first adhesion force enhancing metal material is configured to enhance an adhesion force between the functional conductive layer and a photoresist used in a patterning process of the functional conductive layer; a surface energy of any of first adhesion force enhancing metal materials is less than or equal to 325 mJ/m2.
    Type: Application
    Filed: October 31, 2022
    Publication date: January 23, 2025
    Inventors: Zhengliang LI, Guangcai YUAN, Ce NING, Zhonghao HUANG, Zhixiang ZOU, Zhangtao WANG, Jie HUANG, Nianqi YAO, Jiayu HE, Hehe HU, Feifei LI, Kun ZHAO, Chen XU, Hui GUO
  • Patent number: 12202457
    Abstract: Described are devices, systems and methods for managing a supplemental brake control system in autonomous vehicles. In some aspects, a supplemental brake management system includes brake control hardware and software that operates with a sensing mechanism for determining the brake operational status and a control mechanism for activating the supplemental brake control in an autonomous vehicle, which can be implemented in addition to the vehicle's primary brake control system.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: January 21, 2025
    Assignee: TUSIMPLE, INC.
    Inventors: Xiaoling Han, Kun Zhang, Yu-Ju Hsu, Frederic Rocha, Zehua Huang, Charles A. Price
  • Patent number: 12206005
    Abstract: A structure has stacks of semiconductor layers over a substrate and adjacent a dielectric feature. A gate dielectric is formed wrapping around each layer and the dielectric feature. A first layer of first gate electrode material is deposited over the gate dielectric and the dielectric feature. The first layer on the dielectric feature is recessed to a first height below a top surface of the dielectric feature. A second layer of the first gate electrode material is deposited over the first layer. The first gate electrode material in a first region of the substrate is removed to expose a portion of the gate dielectric in the first region, while the first gate electrode material in a second region of the substrate is preserved. A second gate electrode material is deposited over the exposed portion of the gate dielectric and over a remaining portion of the first gate electrode material.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDICTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 12205310
    Abstract: The disclosure discloses a method and a device for image stitching, the method including: performing stitching feature extraction on target images based on deep-learning neural-network model to obtain stitching features of the target images; selecting a reference image and a to-be-registered image from the target images; taking the stitching feature of the reference image under a minimum feature size and on the to-be-stitched side as a first stitching feature; calculating the similarity measure value between the first stitching feature and each of second stitching features to obtain a target stitching feature, based on the second stitching features of the to-be-registered image under the minimum feature size; repeating the above steps until the target stitching feature of the to-be-registered image under the maximum feature size is determined, and performing image stitching of the reference image and the to-be-registered image on the to-be-stitched side.
    Type: Grant
    Filed: June 3, 2024
    Date of Patent: January 21, 2025
    Assignee: SHANGHAI HANSHI INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Kun Ding, Shuai Yang, Wangpei Li, Sheng Huang, Yitang Zhuang
  • Patent number: 12198291
    Abstract: The embodiments of the disclosure provide a method for adjusting a virtual object, a host, and a computer readable storage medium. The method includes: obtaining a first field of view (FOV) of a virtual world; obtaining a second FOV of a camera, wherein a first physical object locates within the second FOV of the camera; determining a FOV ratio based on the first FOV and the second FOV; determining a first position of a first virtual object in the virtual world relative to a reference object in the virtual world, wherein the first virtual object corresponds to the first physical object; determining a second position of the first virtual object in the virtual world based on the first position and the FOV ratio; and showing the first virtual object at the second position in the virtual world.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: January 14, 2025
    Assignee: HTC Corporation
    Inventors: SyuanYu Hsieh, Sheng-Kun Huang
  • Patent number: 12136650
    Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a body contact, a gate, a source, and a drain. The body contact is configured as an electrical contact of the body region. The body contact and the source overlap with each other to define an overlap region. The body contact has a depth from an upper surface of the semiconductor layer, wherein the depth is deeper than a depth of the source, whereby a part of the body contact is located vertically below the overlap region. A length of the overlap region in a channel direction is not shorter than a predetermined length, so as to suppress a parasitic bipolar junction transistor from being turning on when the high voltage device operates, wherein the parasitic bipolar junction transistor is formed by a part of the well, a part of the body region and a part of the source.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: November 5, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chih-Wen Hsiung, Chun-Lung Chang, Kun-Huang Yu, Kuo-Chin Chiu, Wu-Te Weng
  • Publication number: 20240329835
    Abstract: A method and an apparatus for training a data compression model, and a storage medium are provided. The method includes: reading a data block with a predefined size; analyzing a possibility of adding redundancy in the data block; determining an index of a function for generating redundant data in the data block; and generating, with the function corresponding to the index, redundant data in the data block.
    Type: Application
    Filed: July 15, 2022
    Publication date: October 3, 2024
    Applicant: SHENZHEN ZHI HUI LIN NETWORK TECHNOLOGY CO., LTD.
    Inventors: Behzad MOGHADDAM SARDROUD, Behzad KALANTARI, Hamed KALANTARI, Kun HUANG, Yan YIN
  • Publication number: 20240305401
    Abstract: A method for data compression based on a preset rule, a device, and a medium are provided. The method includes the following. Original data is acquired. A binary conversion on the original data is performed to obtain a binary data. The binary data is scanned, the binary data is matched with the preset rule, and binary data that is successfully matched with the preset rule is separated into a data split. The data split is abbreviated to obtain an abbreviated data split. Abbreviated data is sent, where the abbreviated data includes the abbreviated data split.
    Type: Application
    Filed: May 17, 2024
    Publication date: September 12, 2024
    Applicant: SHENZHEN ZHI HUI LIN NETWORK TECHNOLOGY CO., LTD.
    Inventors: Behzad MOGHADDAM SARDROUD, Hamed KALANTARI, Behzad KALANTARI, Xiaoduan DING, Kun HUANG, Yan YIN
  • Publication number: 20240306324
    Abstract: The present disclosure is related to a display device. The display device includes a middle frame, a display panel and a supporting member. The middle frame is provided with a first mating surface. The display panel includes a display substrate and a cover plate. A first notch is provided at a side of an edge of the cover plate close to the first mating surface. The first notch extends along a thickness direction of the cover plate. An orthographic projection of the display substrate on the cover plate at least partially overlaps an orthographic projection of the first mating surface on the cover plate. The supporting member includes a first supporting section and a second supporting section, the first supporting section is connected to the first mating surface, and the second supporting section is partially arranged in the first notch.
    Type: Application
    Filed: May 12, 2022
    Publication date: September 12, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Jingchang SU, Xin BI, Jianjun WU, Wen HUANG, Xianfeng YANG, Jiahua WANG, Kun HUANG, Xianlei BI, Hao CHENG
  • Publication number: 20240297067
    Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.
    Type: Application
    Filed: May 15, 2024
    Publication date: September 5, 2024
    Inventors: Kun-Huang Yu, Chien-Yu Chen, Ting-Wei Liao, Chih-Wen Hsiung, Chun-Lung Chang, Kuo-Chin Chiu, Wu-Te Weng, Chien-Wei Chiu, Yong-Zhong Hu, Ta-Yung Yang
  • Patent number: 12074443
    Abstract: A source-grid-load-storage networked collaborative frequency control method is disclosed, which comprises acquiring total active power ?P to be regulated during a secondary frequency regulation process of a power grid; performing frequency regulation by source-grid-load-storage of the power distribution system, allocating power regulation capacities, and determining whether the desired total active power is met after the frequency regulation; if the desired total active power is met, determining whether power of power generation units is out of limit; if the power of the power generation units is not out of limit, keeping active power of the power distribution system in balance to complete frequency regulation of the power grid; if the power of the power generation units is out of limit, correcting the power regulation capacities of the power generation units of the source-grid-load-storage and compensating a power difference to keep the active power of the power distribution system in balance.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: August 27, 2024
    Assignees: NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS, STATE GRID ELECTRIC POWER REREARCH INSTITUTE CO. LTD
    Inventors: Dong Yue, Chunxia Dou, Zhijun Zhang, Wenbin Yue, Xiaohua Ding, Jianbo Luo, Yanman Li, Kun Huang, Tao Han
  • Publication number: 20240279177
    Abstract: The present invention relates to the fields of medicinal chemistry and pharmaco therapeutics, and specifically to a method for preparing a compound of formula I and a chemically acceptable salt thereof.
    Type: Application
    Filed: December 21, 2023
    Publication date: August 22, 2024
    Inventors: Hong LIU, Ben NIU, Chunpu LI, Jianping CHEN, Kun HUANG, Jiang WANG
  • Publication number: 20240274614
    Abstract: A display apparatus includes a substrate, a pixel structure, a back side signal line, and a conductive shielding layer. The substrate has a first surface and a second surface opposite to each other. The pixel structure is disposed on the first surface of the substrate. The back side signal line is disposed on the second surface of the substrate and is electrically connected to the pixel structure. The conductive shielding layer is disposed between the pixel structure and the first surface of the substrate, and the conductive shielding layer has a DC level. Moreover, other display apparatuses are also provided.
    Type: Application
    Filed: July 5, 2023
    Publication date: August 15, 2024
    Applicant: AUO Corporation
    Inventors: Mei-Yi Li, Yu-Chieh Kuo, Yu-Hsun Chiu, Bo-Ru Jian, Wan I Shen, Chao-Kun Huang, Che-Wei Tung, Che-Chia Chang
  • Patent number: 12062570
    Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: August 13, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Kun-Huang Yu, Chien-Yu Chen, Ting-Wei Liao, Chih-Wen Hsiung, Chun-Lung Chang, Kuo-Chin Chiu, Wu-Te Weng, Chien-Wei Chiu, Yong-Zhong Hu, Ta-Yung Yang
  • Patent number: 12051909
    Abstract: Disclosed are an emergency control method and system based on source-load-storage regulation and cutback. According to the method, output power of power generating sources is regulated according to a power regulating quantity and a frequency regulation requirement, an output power compensation and output frequency of each power generating source are maintained within permissible ranges, so that a balance between power supply and demand of a power distribution network is maintained; and standby energy-storage power stations are used to make up a power gap, and an external power supply system is used to assist in making up a power deficiency, so that large load disturbance can be handled make up the power gap.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: July 30, 2024
    Assignees: NANJING UNIVERSITY OF POASTS AND TELECOMMUNICATIONS, STATE GRID ELECTRIC POWER RESEARCH INSTITUTE CO. LTD
    Inventors: Dong Yue, Chunxia Dou, Zhijun Zhang, Wenbin Yue, Xiaohua Ding, Jianbo Luo, Yanman Li, Kun Huang, Tao Han
  • Publication number: 20240250092
    Abstract: A micro light-emitting diode display device includes a circuit substrate, a first light-emitting element, a second light-emitting element, a third light-emitting element, and a conductive layer. The first light-emitting element, the second light-emitting element, and the third light-emitting element are disposed on the circuit substrate and have a first electrode and a second electrode, respectively. The first electrode of the first light-emitting element, the first electrode of the second light-emitting element, and the first electrode of the third light-emitting element are electrically connected to the circuit substrate. The second electrode of the first light-emitting element and the second electrode of the second light-emitting element are a continuous semiconductor material layer. The second electrode of the third light-emitting element is separated from the second electrode of the first light-emitting element and the second electrode of the second light-emitting element.
    Type: Application
    Filed: November 28, 2023
    Publication date: July 25, 2024
    Inventors: Chao-Kun HUANG, Kuo-Hsuan Huang, Chieh-Ming Chen, Bo-Ru Jian, Ta-Wen Liao
  • Publication number: 20240229059
    Abstract: The present invention relates to a method for producing recombinant human prethrombin-2 protein and having human ?-thrombin activity by the plant-based expression systems.
    Type: Application
    Filed: October 17, 2023
    Publication date: July 11, 2024
    Applicant: PROVIEW-MBD BIOTECH CO., LTD.
    Inventors: Yu-Chia CHANG, Jer-Cheng KUO, Ruey-Chih SU, Li-Kun HUANG, Ya-Yun LIAO, Ching-I LEE, Shao-Kang HUNG
  • Patent number: 12012369
    Abstract: Compositions containing at least one compound of formula I where R1 is a phenolic compound (e.g., simple phenol, creosote, thymol, or carvacrol), and where R2 is a polyamine (e.g., ethylenediamine (EDA), diethylenetriamine (DETA), triethylenetetramine (TETA), tetraethylenepentamine (TEPA), hexamethylenediamine (HDA)); and optionally a carrier; the compositions may additionally contain at least one epoxy resin. Methods for killing microorganisms involving contacting the microorganisms with an effective microorganism killing amount of the above composition. Compositions containing at least one compound produced by a method involving reacting phenolic-branched chain fatty acid methyl ester with at least one polyamine.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: June 18, 2024
    Assignee: The United States of America, as represented by the Secretary of Agriculture
    Inventors: Kun Huang, Richard D. Ashby, Xuetong Fan, Helen N. Lew, Robert A. Moreau
  • Publication number: 20240176077
    Abstract: An optical fiber structure, includes a substrate, provided with a holding slot; an optical fiber cable, partially arranged in the holding slot; and an isolator, comprising a positioning structure arranged in the holding slot and aligned with an end surface of the optical fiber cable. The present disclosure can not only improve the optical coupling accuracy but also make the optical fiber structure more compact by pasting the isolator in the holding slot and directly aligning with the end surface of the optical fiber cable, which provides a basis for the product to be miniaturized and integrated. The isolator includes a positioning structure, and the isolator has a unidirectional transmission characteristic, therefore, the positioning structure greatly reduces the assembly difficulty and improves the assembly efficiency.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 30, 2024
    Inventor: LI-KUN HUANG
  • Patent number: 11990756
    Abstract: A multi-timescale voltage regulation method based on source-grid-load-storage multi -terminal collaboration of a power distribution network is disclosed, which comprises: establishing, based on a Petri network, a multi-mode switching control model based on voltage security event trigger to realize effective control of a global voltage; establishing multi-objective optimization taking into account a source-storage-load regulation cost and a network transmission loss to realize collaborative and dynamic control of controllable resources of a source terminal, a load terminal and a storage terminal in each operating mode; and establishing a source-storage-load multi-terminal collaboration-based distributed voltage control model based on voltage security event trigger over a short timescale by taking into account the problems of voltage magnitude being out of limit and voltage leap, and solving online an optimal control sequence of the source terminal, the load terminal and the storage terminal in a receding horiz
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: May 21, 2024
    Assignees: NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS, STATE GRID ELECTRIC POWER RESEARCH INSTITUTE CO. LTD
    Inventors: Dong Yue, Chunxia Dou, Zhijun Zhang, Xiaohua Ding, Jianbo Luo, Yanman Li, Kun Huang, Tao Han