Patents by Inventor Kun Lin

Kun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8865093
    Abstract: A polymorph, a polymorph screening system, and a polymorph preparing and screening method are disclosed. The polymorph preparing and screening method includes the following steps: providing a plurality of substrates of different materials; causing an organic material to grow crystals on the plurality of substrates through solution-cooling crystallization process, so that a plurality of polymorphs with different characteristics are prepared; and screening the plurality of polymorphs prepared in the previous step to obtain polymorphs with desired characteristics.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: October 21, 2014
    Assignee: National Central University
    Inventors: Tu Lee, Shih-Chia Chang, Jen-Fan Peng, Pu-Yun Wang, Yu-Kun Lin
  • Patent number: 8854819
    Abstract: A cooling device includes a heat sink base plate for mounting on a circuit board to absorb waste heat from a heat source, a radiation fin unit consisting of a set of radiation fins, mounted on the heat sink base plate opposite to the circuit board and defining a plurality of heat-dissipation passages between each two adjacent ones of the radiation fins, a cooling fan unit mounted on the radiation fin unit for creating currents of air toward the heat-dissipation passages, a plurality of thermal tubes supported on the heat sink base plate and fastened to the radiation fins. Each radiation fin has first wind guiding wall portions and second wind guiding wall portions respectively tilted in reversed directions to facilitate the flow of air through the heat-dissipation passages.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: October 7, 2014
    Assignee: Dong Guan Yung Teng Electronic Products Co., Ltd.
    Inventors: Hong-Long Chen, Yi-Kun Lin
  • Patent number: 8847284
    Abstract: A die includes a plurality of rows of standard cells. Each of all standard cells in the plurality of rows of standard cells includes a transistor and a source edge, wherein a source region of the transistor is adjacent to the source edge. No drain region of any transistor in the each of all standard cells is adjacent to the source region.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: September 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Nan Yang, Chou-Kun Lin, Jerry Chang-Jui Kao, Yi-Chuin Tsai, Chien-Ju Chao, Chung-Hsing Wang
  • Publication number: 20140255230
    Abstract: An air pump includes a driving unit and an airflow control unit. A piston base has a first intake through hole. A piston unit has an intake valve and a bladder portion, and the intake valve is located over the first intake through hole. A first valve base is located over the piston unit. A flow guide groove of the first valve base crosses over the paired intake valve and bladder portion. The first valve base has a first output through hole. The first valve base has a circular wall surrounding the first output through hole. A first output valve is located over the first output through hole. A second valve base is coupled to the circular wall to define a compression chamber. The second valve base has a second output through hole communicating with the compression chamber. A second output valve is located over the second output through hole.
    Type: Application
    Filed: February 25, 2014
    Publication date: September 11, 2014
    Applicant: XIAMEN KOGE MICRO TECH CO., LTD.
    Inventor: Kun-Lin CHANG
  • Publication number: 20140258952
    Abstract: An embodiment cell shift scheme includes abutting a first transistor cell against a second transistor cell and shifting a place and route boundary away from a polysilicon disposed between the first transistor cell and the second transistor cell. In an embodiment, the cell shift scheme includes shifting the place and route boundary to prevent a mismatch between a layout versus schematic (LVS) netlist and a post-simulation netlist.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Nan Yang, Chou-Kun Lin, Jerry Chang-Jui Kao, Yi-Chuin Tsai, Chien-Ju Chao, Chung-Hsing Wang
  • Patent number: 8822243
    Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: September 2, 2014
    Assignee: Manutius IP Inc.
    Inventors: Li Yan, Chao-kun Lin, Chih-Wei Chuang
  • Publication number: 20140245248
    Abstract: A die includes at least one standard cell, which includes a first boundary and a second boundary opposite to the first boundary. The first boundary and the second boundary are parallel to a first direction. The at least one standard cell further includes a first plurality of FinFETs including first semiconductor fins parallel to the first direction. The die further includes at least one memory macro, which has a third boundary and a fourth boundary opposite to the third boundary. The third boundary and the fourth boundary are parallel to the first direction. The at least one memory macro includes a second plurality of FinFETs including second semiconductor fins parallel to the first direction. All semiconductor fins in the at least one standard cell and the at least one memory macro have pitches equal to integer times of a minimum pitch of the first and the second semiconductor fins.
    Type: Application
    Filed: April 30, 2013
    Publication date: August 28, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Nan Yang, Chou-Kun Lin, Jerry Chang-Jui Kao, Yi-Chuin Tsai, Chien-Ju Chao, Chung-Hsing Wang
  • Publication number: 20140239412
    Abstract: An integrated circuit includes a first and a second standard cell. The first standard cell includes a first gate electrode, and a first channel region underlying the first gate electrode. The first channel region has a first channel doping concentration. The second standard cell includes a second gate electrode, and a second channel region underlying the second gate electrode. The second channel region has a second channel doping concentration. A dummy gate includes a first half and a second half in the first and the second standard cells, respectively. The first half and the second half are at the edges of the first and the second standard cells, respectively, and are abutted to each other. A dummy channel is overlapped by the dummy gate. The dummy channel has a third channel doping concentration substantially equal to a sum of the first channel doping concentration and the second channel doping concentration.
    Type: Application
    Filed: April 30, 2013
    Publication date: August 28, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Kuo-Nan Yang, Chou-Kun Lin, Jerry Chang-Jui Kao, Yi-Chuin Tsai, Chien-Ju Chao, Chung-Hsing Wang
  • Patent number: 8759218
    Abstract: A chemical mechanical polishing process includes placing a substrate on a first polishing pad of a first platen, wherein the substrate has a bulk metal layer and a barrier layer; polishing the bulk metal layer by using the first polishing pad having a hardness of above 50 (Shore D) until the barrier layer is exposed; polishing the barrier layer on a second polishing pad of a second platen after removing the bulk metal layer, wherein the second polishing pad has a hardness ranging between 40 and 50 (Shore D) and includes an upper layer and a lower backing layer and the upper layer has a hardness less than 50 (Shore D).
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: June 24, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Boon-Tiong Neo, Chin-Kun Lin, Lee-Lee Lau
  • Patent number: 8747587
    Abstract: A multi-layered material and a method for making the same are provided. The multi-layered material includes a first foamed layer, a substrate, a second foamed layer, and a surface layer. The first foamed layer has a plurality of first cells. The substrate is a fabric. The second foamed layer has a plurality of second cells. The foaming method of the second foamed layer is different from that of the first foamed layer. The size of the second cells is different from that of the first cells. The variation in size of the second cells is different from that of the first cells. The surface layer is disposed on the second foamed layer. Thus, when the multi-layered material is used as a surface cover of a ball, it can provide excellent resilience and control, and improve manufacturing efficiency.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: June 10, 2014
    Assignee: San Fang Chemical Industry Co., Ltd.
    Inventors: Chung-Chih Feng, Yung-Yu Fu, Kun-Lin Chiang, Jung-Ching Chang, Chih-Chenh Lin, Chun-Wei Wu, Pei-Huo Huang, I-Peng Yao
  • Publication number: 20140147807
    Abstract: A computer-aided positioning and navigation system for dental implant includes a computer system having built therein a dental implant planning software and providing a 3D digital human tissues model to create an implant navigation information, a positioning assistive device including a body providing a positioning portion and a guide portion and a connection member carrying an optical positioning device, one or multiple optical capture devices, and a display device electrically connected to the computer system. The computer system controls the optical capture device to capture images and drives the display device to display a part of the content of the 3D digital human tissues model and the implant navigation information.
    Type: Application
    Filed: February 26, 2013
    Publication date: May 29, 2014
    Applicant: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Hong-Tzong YAU, Yen-Kun LIN
  • Publication number: 20140127841
    Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: TOSHIBA TECHNO CENTER INC.
    Inventors: Li YAN, Chao-kun LIN, Chih-Wei CHUANG
  • Publication number: 20140117404
    Abstract: A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures.
    Type: Application
    Filed: January 8, 2014
    Publication date: May 1, 2014
    Applicant: TOSHIBA TECHNO CENTER INC.
    Inventors: Steven D. LESTER, Chao-Kun LIN
  • Publication number: 20140116659
    Abstract: A heat dissipation device for being in thermal contact with a heat source includes multiple heat dissipation fins, a heat pipe and a fan. Each of the heat dissipation fins includes a plate and an air guiding body. The plate has a thermal contact side used for being in thermal contact with the heat source. An acute angle is formed between an extension side of the air guiding body and the thermal contact side. The heat pipe penetrates through the plates. The fan used for forming an air current is installed at a side of the heat dissipation fin opposite to the thermal contact side. The air guiding body and the heat pipe are disposed in a flowing path of the air current. Thereby, the air current is guided toward the heat pipe and the amount of air flowing through the heat pipe is increased.
    Type: Application
    Filed: February 5, 2013
    Publication date: May 1, 2014
    Applicant: MSI Computer (Shenzhen) Co., Ltd.
    Inventors: Yi-Kun LIN, Shang-Chih YANG
  • Publication number: 20140094513
    Abstract: The present invention discloses the combined treatment of memantine (N-methyl-D-aspartate receptor antagonist) and tea polyphenol (an antioxidant and anti-inflammatory agent) is more effective (synergistic) in neuroprotection than either memantine or tea polyphenol alone in mouse excitotoxic injury. These findings provide useful information about the potential application of memantine and tea polyphenols in preventing or treating clinical excitotoxic injury such as brain trauma, brain ischemia, epilepsy, and Alzheimer's disease.
    Type: Application
    Filed: December 3, 2013
    Publication date: April 3, 2014
    Applicant: NATIONAL TAIWAN UNVERSITY
    Inventors: SHOEI-YN LIN-SHIAU, JEN-KUN LIN
  • Publication number: 20140080234
    Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are separately disposed on the epitaxial layer structure, and the epitaxial layer structure has a root-means-square (RMS) roughness less than about 3 at a surface whereon the first electrode is formed.
    Type: Application
    Filed: November 20, 2013
    Publication date: March 20, 2014
    Applicant: TOSHIBA TECHNO CENTER INC.
    Inventors: Chao-Kun Lin, Heng Liu
  • Patent number: 8664679
    Abstract: A light emitting device comprises a first layer of an n-type semiconductor material, a second layer of a p-type semiconductor material, and an active layer between the first layer and the second layer. A light coupling structure is disposed adjacent to one of the first layer and the second layer. In some cases, the light coupling structure is disposed adjacent to the first layer. An orifice formed in the light coupling structure extends to the first layer. An electrode formed in the orifice is in electrical communication with the first layer.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: March 4, 2014
    Assignee: Toshiba Techno Center Inc.
    Inventors: Li Yan, Chao-Kun Lin, Chih-Wei Chuang
  • Publication number: 20140054638
    Abstract: Light emitting devices comprise a light emitting component, such as a GaN LED having active material layers supported by a Silicon substrate, which can be a growth substrate, or attached. Phosphor(s) can be disposed relative to the light emitting component to absorb a primary emission, and produce a secondary emission that can be relatively tuned or selected so that their combination produces light of a desired spectrum, such as light appearing white. The Silicon substrate has exposed sidewalls, which can be angled, with respect to planar surfaces of the substrate, and a light reflecting material, such as a diffusely reflective material coats the sidewalls. The reflective material can be opaque to the primary and secondary emissions. If other exposed portions of the Silicon substrate exist and are exposed to primary or secondary light, these other exposed portions can be coated with such light reflecting material.
    Type: Application
    Filed: March 11, 2013
    Publication date: February 27, 2014
    Applicant: TOSHIBA TECHNO CENTER, INC.
    Inventors: Steven D. Lester, Long Yang, Chao-Kun Lin
  • Publication number: 20140054640
    Abstract: An LED device includes a strip-shaped electrode, a strip-shaped current blocking structure and a plurality of distributed current blocking structures. The current blocking structures are formed of an insulating material such as silicon dioxide. The strip-shaped current blocking structure is located directly underneath the strip-shaped electrode. The plurality of current blocking structures may be disc shaped portions disposed in rows adjacent the strip-shaped current blocking structure. Distribution of the current blocking structures is such that current is prevented from concentrating in regions immediately adjacent the electrode, thereby facilitating uniform current flow into the active layer and facilitating uniform light generation in areas not underneath the electrode. In another aspect, current blocking structures are created by damaging regions of a p-GaN layer to form resistive regions.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 27, 2014
    Applicant: TOSHIBA TECHNO CENTER INC.
    Inventors: Chih-Wei Chuang, Chao-Kun Lin
  • Patent number: 8637891
    Abstract: A light-emitting device includes first and second semiconductor layers and a light-emitting layer between the first and second semiconductor layers. The light-emitting device also includes an improved electrode structures.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: January 28, 2014
    Assignee: Toshiba Techno Center Inc.
    Inventors: Steven D. Lester, Chao-Kun Lin