Abstract: A correlated double sampling (CDS) circuit for sampling first and second pixel signals, which are respectively transmitted via first and second data lines, in a pixel array. The CDS circuit includes first and second sampling circuits, an amplifier circuit and a control circuit. The control circuit controls the first sampling circuit to sample a reset level and a data level of the first pixel signal in a first sampling period, and controls the second sampling circuit to sample a reset level and a data level of the second pixel signal in a second sampling period. The control circuit controls the amplifier circuit to output the reset level and the data level of the first pixel signal in a first output period, and output the reset level and the data level of the second pixel signal in a second output period.

Abstract: A CMOS image sensor includes a pixel array including a plurality of unit pixels with individual rows of unit pixels being coupled to respective row control signal lines, and a buffer including plural row control signal drivers. Each driver is coupled to a respective one of the row control signal lines and is configured to provide a row control signal pulse to a respective row control signal line in response to an input pulse when the row control signal line is in an active state and to bias the row control signal line at a ground voltage when the respective row control signal line is in an inactive state. Each driver has a first drive capability when the row control signal line is in the active state and a second drive capability greater than the first drive capability when the row control signal line is in an inactive state.

Abstract: Embodiments of the present invention provide a correlated double sampling (CDS) circuit and a CMOS image sensor unit using the CDS circuit. The CDS circuit shifts levels of sampled sensing signal and reset signal with equal amounts. Thus a voltage difference of the sampled sensing signal and the reset signal remains unchanged, and their levels may fall within a linear input range by adjusting their levels. Compared to a conventional CDS circuit, a gain of the CDS circuit provided by the embodiment of the present invention is not reduced, and thus a design complexity of a rear circuit thereof is lower, and an induced noise is relatively low. Furthermore, the CMOS image sensor unit using the CDS circuit provided by the embodiment also has these advantages.

Abstract: A method for resetting image sensing and an image sensing device using the same are provided. The method for resetting image sensing includes generating a plurality of reset signals and a plurality of control signals, and using the reset signals and the control signals to control a pixel array to reset and expose. The pixel array has a plurality of pixel blocks, each of the pixel blocks has a plurality of pixel sensing units. When the plurality of pixel sensing units of one of the pixel blocks expose to acquire a plurality of sensing signals sequentially, the plurality of pixel sensing units of another one of the pixel blocks are reset.

Abstract: To mitigate kickback noise effect, the present invention provides a reference voltage generator for an analog-to-digital converter circuit. The reference voltage generator includes a bias generator, a bias converter and an output unit. The bias generator is used for generating a first bias voltage in accordance with a reference voltage. The bias converter is coupled to the bias generator and is used for converting the first bias voltage to a second bias voltage. The output unit is coupled to the bias converter and used for generating a first voltage to a load circuit in accordance with the second bias voltage.

Abstract: A variable-gain amplifier circuit and a method of changing gain amplifier paths are provided for receiving and amplifying an image sensing signal. The variable-gain amplifier circuit includes variable path and gain amplifier circuits. According to the amplification factor for the image sensing signal, the gain amplifier paths in the variable path and gain amplifier circuits are changed based on a control signal, so as to achieve the appropriate construction of the variable-gain amplifier circuit. The image sensing signal generates the required image result through appropriate numbers of variable gain amplifiers, thereby decreasing the power consumption of the circuit and reducing the design requirement of the circuit.

Abstract: A CMOS image sensor having two ASPs can reduce increasing design difficulty as arising from a pixel array becoming larger and larger. The image sensor includes a selection circuit for transmitting outputs of CDS circuits through four divided buses to reduce parasitic loading and achieve high-speed operation. Then, the selecting circuit transmits red and blue pixels to a first ASP, and transmits green pixels to a second ASP, so as to relax the specification requirements of the ASP.

Abstract: A correlated double sampling (CDS) circuit for sampling first and second pixel signals, which are respectively transmitted via first and second data lines, in a pixel array. The CDS circuit includes first and second sampling circuits, an amplifier circuit and a control circuit. The control circuit controls the first sampling circuit to sample a reset level and a data level of the first pixel signal in a first sampling period, and controls the second sampling circuit to sample a reset level and a data level of the second pixel signal in a second sampling period. The control circuit controls the amplifier circuit to output the reset level and the data level of the first pixel signal in a first output period, and output the reset level and the data level of the second pixel signal in a second output period.

Abstract: Embodiments of the present invention provide a correlated double sampling (CDS) circuit and a CMOS image sensor unit using the CDS circuit. The CDS circuit shifts levels of sampled sensing signal and reset signal with equal amounts. Thus a voltage difference of the sampled sensing signal and the reset signal remains unchanged, and their levels may fall within a linear input range by adjusting their levels. Compared to a conventional CDS circuit, a gain of the CDS circuit provided by the embodiment of the present invention is not reduced, and thus a design complexity of a rear circuit thereof is lower, and an induced noise is relatively low. Furthermore, the CMOS image sensor unit using the CDS circuit provided by the embodiment also has these advantages.

Abstract: An image sensor capable of repairing column readout circuits includes a pixel array, a column readout circuit array, an addressing unit and a repairing unit. The column readout circuit array includes a plurality of column readout circuit group and a redundant column readout circuit group, which is placed on a side of the plurality of column readout circuit groups and consists of a specific number of redundant column readout circuits. The repairing unit is utilized for shifting in order pixel column groups, which are originally coupled to column readout circuit groups starting from a first column readout circuit group having defects, to couple to the column readout circuit groups next to the first column readout circuit group and the redundant column readout circuit group.

Abstract: A method for resetting image sensing and an image sensing device using the same are provided. The method for resetting image sensing includes generating a plurality of reset signals and a plurality of control signals, and using the reset signals and the control signals to control a pixel array to reset and expose. The pixel array has a plurality of pixel blocks, each of the pixel blocks has a plurality of pixel sensing units. When the plurality of pixel sensing units of one of the pixel blocks expose to acquire a plurality of sensing signals sequentially, the plurality of pixel sensing units of another one of the pixel blocks are reset.

Abstract: An image sensor capable of repairing column readout circuits includes a pixel array, a column readout circuit array, an addressing unit and a repairing unit. The column readout circuit array includes a plurality of column readout circuit group and a redundant column readout circuit group, which is placed on a side of the plurality of column readout circuit groups and consists of a specific number of redundant column readout circuits. The repairing unit is utilized for shifting in order pixel column groups, which are originally coupled to column readout circuit groups starting from a first column readout circuit group having defects, to couple to the column readout circuit groups next to the first column readout circuit group and the redundant column readout circuit group.

Abstract: An automatic clock generation system is used for automatically outputting a sampling signal and a holding signal to an analog front end circuit and for sampling the analog signal. The clock generation system comprises a clock generator generating a plurality of clock signals and a comparing module. According to the plurality of clock signals, the comparing module compares the analog signal with a first reference signal and outputs a first comparison signal. The comparing module further compares the digital signal outputted by the analog front end circuit with a second reference signal and outputs a second comparison signal. The clock generator selectively outputs a first clock signal, corresponding to the first comparison signal, of the plurality of clock signals as the sampling signal when the first comparison signal received by the clock generator is at a high state.

Abstract: The invention provides a transient voltage detecting circuit for detecting changes of voltage in an electronic system which has a first power supply (VDD), a second power supply (VDD), a third power supply (VDD), a fourth power supply (VDD), a first ground (GND), and a second ground (GND). The voltage of the first VDD is substantially equal to that of the second VDD. The voltage of the third VDD is substantially equal to that of the fourth VDD. The voltage of the first GND is substantially equal to that of the second GND. The circuit according to the invention can detect a positive or negative transient voltage once that occurs at the first VDD, the second VDD, the third VDD, or the fourth VDD.

Abstract: To mitigate kickback noise effect, the present invention provides a reference voltage generator for an analog-to-digital converter circuit. The reference voltage generator includes a bias generator, a bias converter and an output unit. The bias generator is used for generating a first bias voltage in accordance with a reference voltage. The bias converter is coupled to the bias generator and is used for converting the first bias voltage to a second bias voltage. The output unit is coupled to the bias converter and used for generating a first voltage to a load circuit in accordance with the second bias voltage.

Abstract: An analog front end circuit comprises a variable gain amplifier circuit (VGA circuit), a first sample switch, a second sample switch, a hold switch and an analog to digital converter device. The VGA circuit comprises a first input end, a second input end, and at least one output end. The first input end is used for receiving first voltage level signals. The second input end is used for receiving first reference signals. The output end is used for outputting at least one amplified signal. While the first sample switch is at a first conductive state, the first input end receives the first voltage level signal. While the second sample switch is at the first conductive state, the second input end receives the first reference signal. Finally, while the hold switch is at a second conductive state, the output end outputs the amplified signal.

Abstract: A CMOS image sensor having two ASPs can reduce increasing design difficulty as arising from a pixel array becoming larger and larger. The image sensor includes a selection circuit for transmitting outputs of CDS circuits through four divided buses to reduce parasitic loading and achieve high-speed operation. Then, the selecting circuit transmits red and blue pixels to a first ASP, and transmits green pixels to a second ASP, so as to relax the specification requirements of the ASP.

Abstract: A current steering digital-to-analog converter (DAC) is provided. At least two lower-resolution DACs are used for converting a high-resolution digital signal. One of the two lower-resolution DACs is used for converting the most significant bits (MSB) of the high-resolution digital signal. The other of the two lower-resolution DACs is used for converting the least significant bits (LSB) of the high-resolution digital signal. By such arrangement, a device mismatch problem is avoided and the chance of variation occurrence during manufacturing process is reduced. The arrangement also simplifies the layout in the significantly scaled-down chip area.

Abstract: A variable-gain amplifier circuit and a method of changing gain amplifier paths are provided for receiving and amplifying an image sensing signal. The variable-gain amplifier circuit includes variable path and gain amplifier circuits. According to the amplification factor for the image sensing signal, the gain amplifier paths in the variable path and gain amplifier circuits are changed based on a control signal, so as to achieve the appropriate construction of the variable-gain amplifier circuit. The image sensing signal generates the required image result through appropriate numbers of variable gain amplifiers, thereby decreasing the power consumption of the circuit and reducing the design requirement of the circuit.

Abstract: The invention provides a transient voltage detecting circuit for detecting a transient voltage occurring at a power supply or a ground of an electronic system. The circuit according to the invention includes a plurality of detecting units of which the outputs are initially latched by at least one voltage source. The circuit also includes a detecting device outputting a first logic according to the initial outputs of all of the detecting units. When the transient voltage occurs, it is ensured that the logic of the output of one of the detecting units is changed by the transient voltage or the decayed transient voltage, such that the decision device renewably outputs a second logic to trigger a resetting device of the electronic system in accordance with the outputs of all of the detecting units.