Patents by Inventor Kwang Soo Kim
Kwang Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250144803Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a residType: ApplicationFiled: January 7, 2025Publication date: May 8, 2025Applicant: Samsung Electronics Co., Ltd.Inventors: Min Sung HA, Kwang-Jun KIM, Jong Kyu KIM, Hyun-Joong KIM, Jin Ho SO, Chi-Gun AN, Ki Moon LEE, Hui Gwan LEE, Beom Soo HWANG
-
Publication number: 20250151570Abstract: A display device may include a display panel and an input sensor. Mesh lines of the input sensor may include first mesh lines extending in a first direction and second mesh lines extending in a second direction crossing the first direction. The first mesh lines and the second mesh lines may cross each other at a plurality of cross points. In a unit region of the sensing electrode, first cutting points may be defined in the first mesh lines and the second mesh lines, and second cutting points may be defined in the first mesh lines and the second mesh lines.Type: ApplicationFiled: January 7, 2025Publication date: May 8, 2025Inventors: Joong-Soo MOON, Kwang-Min KIM, Yangwan KIM, Keunsoo LEE, Youngjin CHO
-
Publication number: 20250142834Abstract: A semiconductor device includes: a substrate; a gate stacking structure that includes interlayer insulating layers and gate electrodes that are alternately stacked on the substrate; a channel structure that penetrates the gate stacking structure and extends in a first direction, and includes a channel layer connected to the substrate and a ferroelectric layer that surrounds the channel layer; a charge inflow pattern disposed on a lateral side of the ferroelectric layer and spaced apart in the first direction; and an insulation pattern disposed between the charge inflow pattern and the gate electrodes and that surrounds an exterior side, a lower side, and an upper side of the charge inflow pattern.Type: ApplicationFiled: June 3, 2024Publication date: May 1, 2025Inventors: Suseong Noh, Ilho Myeong, KWANG-SOO KIM
-
Publication number: 20250141033Abstract: A secondary battery includes an electrode assembly including a first electrode plate and a second electrode plate, a case for accommodating the electrode assembly, and having one open side, a cap plate coupled to the case at the one open side, a first terminal and a second terminal electrically connected to the electrode assembly, and coupled to the cap plate, and a lower insulator at a lower portion of the electrode assembly, located between the electrode assembly and another side of the case that faces the cap plate in a longitudinal direction, and including an inclined part corresponding to a direction of the electrode assembly on at least one edge of an upper end of the lower insulator.Type: ApplicationFiled: May 9, 2024Publication date: May 1, 2025Inventors: Chae Eun BAE, Jun Sun YONG, Kwang Soo BAE, Jun Hyung LEE, Ji Hwan KIM, Heyoung Cheoul ROH
-
Publication number: 20250140299Abstract: A semiconductor device includes: a sampling control circuit configured to select a coarse section from a plurality of coarse sections according to a first pattern signal during a sampling period, select a fine section from a plurality of fine sections according to a second pattern signal during the selected coarse section, and generate first to third sampling control signals having activated sections defined by the selected coarse section and the selected fine section; and a sampling circuit configured to sample an input address according to the first to third sampling control signals, respectively, to generate first to third sampling addresses, and schedule the first to third sampling addresses according to a sampling signal defining the sampling period to output an output address.Type: ApplicationFiled: February 20, 2024Publication date: May 1, 2025Inventors: Hyeon Woo NOH, Kwang Soo KIM, Woongrae KIM, Hyung Min KIM, Jun Seok NOH
-
Publication number: 20250142376Abstract: A wireless system including a wireless station and an automatic frequency adjustment system and a method for controlling the same are disclosed. According to one embodiment of the present disclosure, the wireless system may include a wireless station including a beacon demodulator and an automatic frequency adjustment system having a database including identification information of a plurality of wireless local area network (LAN) access points (Aps), and the wireless station may be configured to: obtain information related to a first beacon frame by demodulating the first beacon frame transmitted from a first wireless LAN AP through the beacon demodulator and transmit the information related to the first beacon frame to the automatic frequency adjustment system.Type: ApplicationFiled: October 25, 2024Publication date: May 1, 2025Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Seung Keun PARK, Sung Jun LEE, Bong Soo KIM, Jae Ho JUNG, Byung Su KANG, Hye Yeon KWON, Igor KIM, Kwang Chun LEE
-
Publication number: 20250140192Abstract: A display device includes: a base layer; a display element layer on the base layer, and including a light emitting element, a light detection element, and a photovoltaic element adjacent to one another; a light shielding layer on the display element layer, and having a plurality of opening parts; and a color filter layer on the display element layer, and covering the plurality of opening parts. The light detection element and the photovoltaic element are located at the same layer as each other, the light detection element is to detect an external input based on incident light from the outside, and the photovoltaic element is to generate electrical energy based on the incident light.Type: ApplicationFiled: December 31, 2024Publication date: May 1, 2025Inventors: KWANG SOO BAE, GUN HEE KIM, HYOENG-KI KIM, DAE-YOUNG LEE, SUN HEE LEE, SANGHWAN CHO
-
Publication number: 20250133742Abstract: A semiconductor device includes: a substrate, a gate stacking structure that includes a plurality of interlayer insulating layers and a plurality of gate electrodes that are alternately stacked on the substrate, a channel layer that extends in a first direction and into the gate stacking structure, where the channel layer is electrically connected to the substrate, a channel insulating layer that at least partially surrounds the channel layer, and a plurality of dielectric layers that are between the channel insulating layer and the plurality of gate electrodes, extend along a circumference of the channel layer, and are spaced apart from each other in the first direction, where each of the plurality of dielectric layers includes: a ferroelectric pattern that at least partially surrounds the channel insulating layer, and an anti-ferroelectric pattern that at least partially surrounds the ferroelectric pattern.Type: ApplicationFiled: July 25, 2024Publication date: April 24, 2025Inventors: Suseong Noh, Ilho Myeong, Kwang-Soo Kim
-
Patent number: 12283497Abstract: The present disclosure provides a semiconductor deposition monitoring device comprising a supporting table, a chamber, a lamp, an optical sensor, a conduit, a plurality of sensors in the conduit, and a heat exchanger. The supporting table supports a deposition target wafer on which a deposition material is deposited. The chamber comprises an upper dome and a lower dome. The lamp emits light to the chamber. The optical sensor receives the irradiated light and measures the deposition material formed in the chamber. The conduit has an inlet conduit through which air is injected into the chamber and an outlet conduit through which the air is discharged from the chamber. The plurality of sensors sense information of the air. The sensed information may be used to control the heat exchanger.Type: GrantFiled: January 22, 2021Date of Patent: April 22, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young Uk Choi, Yeon Tae Kim, Tae Soon Park, Kee Soo Park, Sung-Gyu Park, Kwang-Hyun Yang, Seung Hun Lee
-
Patent number: 12270108Abstract: The present invention relates to a plated steel sheet having excellent corrosion resistance, workability and surface quality, and at the same time, capable of reducing occurrence of liquid metal embrittlement (LME).Type: GrantFiled: June 18, 2021Date of Patent: April 8, 2025Assignee: POSCO CO., LTDInventors: Il-Ryoung Sohn, Sung-Joo Kim, Tae-Chul Kim, Bong-Hwan Yoo, Myung-Soo Kim, Jong-Sang Kim, Sang-Tae Han, Kwang-Won Kim
-
Publication number: 20250112114Abstract: An example includes: a package substrate having a die pad with a device side surface and a thermal pad on an opposite side surface; a thermal dissipation structure mounted to the die pad, the thermal dissipation structure including a thermally conductive insulator core and thermal conductors on a device side surface and on a substrate mount surface opposite the device side surface; at least one semiconductor device die mounted to the device side surface of the thermal dissipation structure; electrical connections formed between leads on the package substrate and bond pads on the at least one semiconductor device die; and mold compound covering the electrical connections, the at least one semiconductor device, and portions of the package substrate, portions of the leads of the package substrate forming terminals, and the thermal pad exposed from the mold compound and forming a thermal pad for a semiconductor device package.Type: ApplicationFiled: September 30, 2023Publication date: April 3, 2025Inventors: Ninad Shahane, Vivek Arora, Kwang-Soo Kim
-
Publication number: 20250099390Abstract: Provided is a method for preventing, ameliorating, or treating inflammatory diseases by administering a composition containing extracellular vesicles (EVs) derived from Roseburia spp. strains and/or Bifidobacterium spp. strains, wherein the EVs exhibits effectiveness in improving inflammatory bowel disease (IBD), and additionally, all EVs derived from congeneric strains corresponding to Roseburia spp. strains or Bifidobacterium spp. strains. have been confirmed to exhibit strong anti-inflammatory effect, and the strains and EVs derived therefrom can be provided as a composition for preventing, ameliorating, or treating a variety of inflammatory diseases.Type: ApplicationFiled: January 18, 2023Publication date: March 27, 2025Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Ki Young CHOI, Kwang-Hyun CHA, Hwa Seung HAN, Jin Soo PARK, Dae-geun SONG, Myung Suk KIM, Hak Cheol KWON
-
Publication number: 20250105301Abstract: Provided is a collector including an adhesion enhancing layer capable of providing a positive electrode having excellent adhesion and low interfacial resistance, a positive electrode including the same, and a lithium secondary battery including the positive electrode. The collector includes a conductive metal layer, and an adhesion enhancing layer provided on at least one surface of the conductive metal layer, wherein the adhesion enhancing layer has a surface roughness (Ra) of 90 nm to 600 nm and a diiodomethane contact angle of 70° to 120°.Type: ApplicationFiled: January 13, 2023Publication date: March 27, 2025Applicants: LG Chem, Ltd., LG Energy Solution, Ltd.Inventors: Jung Hyun Seo, Min Soo Kim, Dong Oh Shin, Ho Chan Lee, Kwang Ho Yoo, Soon Hwa Jung
-
Publication number: 20250096175Abstract: A semiconductor package includes a first redistribution layer structure, a first set of semiconductor dies on the first redistribution layer structure, a plurality of connection members on the first redistribution layer structure and around the first set of semiconductor dies, a molding material on the first redistribution layer structure, the molding material covering the first set of semiconductor dies and at least partially surrounding the plurality of connection members, a second redistribution layer structure on the molding material, a second set of semiconductor dies on the second redistribution layer structure, and a dummy structure on the second redistribution layer structure and between a first semiconductor die of the second set of semiconductor dies and a second semiconductor die of the second set of semiconductor dies.Type: ApplicationFiled: August 5, 2024Publication date: March 20, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: YISEUL HAN, KWANG-SOO KIM, JAESUN KIM
-
Publication number: 20250096215Abstract: A semiconductor package includes a redistribution structure, a semiconductor die on the redistribution structure, one or more memory stacking structures disposed on the redistribution structure, wherein the one or more memory stacking structures and the semiconductor die are arranged side by side on the redistribution structure, an optical engine disposed on the redistribution structure, wherein the optical engine and the semiconductor die are arranged side by side on the redistribution structure, and a heat dissipation structure on the semiconductor die, the one or more memory stacking structures, and the optical engine, wherein levels of upper surfaces of the semiconductor die, the one or more memory stacking structures, and the optical engine are the same.Type: ApplicationFiled: April 4, 2024Publication date: March 20, 2025Inventors: HYUNSOO CHUNG, KWANG-SOO KIM, CHI WOO LEE
-
Publication number: 20250087646Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, a first mold layer at least partially covering the first redistribution substrate and the first semiconductor chip, a plurality of first conductive pillars at least partially penetrating the first mold layer and contacting the first redistribution substrate, a second redistribution substrate on the first mold layer, a second semiconductor chip on the second redistribution substrate, a second mold layer at least partially covering the second redistribution substrate and the second semiconductor chip, a plurality of second conductive pillars at least partially penetrating the second mold layer and contacting the second redistribution substrate, and a third redistribution substrate on the second mold layer. The first semiconductor chip includes a first through via. The second semiconductor chip includes a backside power delivery network layer.Type: ApplicationFiled: March 15, 2024Publication date: March 13, 2025Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunsoo CHUNG, Kwang-Soo KIM, Jaesic LEE
-
Publication number: 20250089454Abstract: A display device includes a substrate including a display area and a driving circuit area, a first transistor in the display area, and including a first active layer on the substrate and a first gate electrode on the first active layer, a first gate insulating layer between the first active layer and the first gate electrode, and entirely covering the first active layer, a second transistor in the driving circuit area, and including a second active layer on the substrate and a second gate electrode on the second active layer, a second gate insulating layer between the second active layer and the second gate electrode, covering a part of the second active layer overlapping the second gate electrode, and exposing another part of the second active layer, and a first oxide semiconductor layer between the first gate insulating layer and the first gate electrode.Type: ApplicationFiled: April 8, 2024Publication date: March 13, 2025Applicant: Samsung Display Co., LTD.Inventors: Hyun Jun JEONG, Kwang Soo KO, Myeong Ho KIM, Yeon Keon MOON, Hyun Mo LEE, Kun Hee JO
-
Publication number: 20250087570Abstract: A semiconductor package includes a redistribution layer structure, a first sub-package positioned on the redistribution layer structure, a second sub-package positioned on the first sub-package, and a first encapsulant positioned on the first sub-package and encapsulating the second sub-package. The first sub-package includes a first semiconductor chip including a first chip through via and a dielectric through via electrically connected to the redistribution layer structure. The second sub-package includes a second semiconductor chip including a plurality of second chip through vias, each second chip through via electrically connected to one of the first chip through via and the dielectric through via, a third semiconductor chip positioned on the second semiconductor chip, and a fourth semiconductor chip positioned on the third semiconductor chip. Each of the second to fourth semiconductor chips is exposed at a side surface of the second sub-package and covered with the first encapsulant.Type: ApplicationFiled: April 4, 2024Publication date: March 13, 2025Inventors: HYUNSOO CHUNG, KWANG-SOO KIM, CHI WOO LEE
-
Patent number: 12249175Abstract: A fingerprint recognition device is provided. The fingerprint recognition device includes an image acquisition module acquiring a fingerprint image including an input fingerprint, a preprocessing module generating a preprocessed image by preprocessing the fingerprint image, a minutiae extraction module extracting coordinates of each of minutiae and orientation points of the input fingerprint from the preprocessed image and a fake detection module receiving regions-of-interest (ROIs), including the coordinates of each of the minutiae or orientation points of the input fingerprint, and determining whether the input fingerprint is a fake by performing learning using the received ROIs.Type: GrantFiled: January 5, 2022Date of Patent: March 11, 2025Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Sol Lee, Duck-Soo Kim, Kwang Hyuk Bae, Yeol Min Seong, Moon Kyu Song, Seong Wook Song, Jun Seo Lee
-
Publication number: 20250075281Abstract: A brake disc, and a method of manufacturing the same, yield a brake disc capable of exhibiting low thermal deformation and superior wear resistance and corrosion resistance using a new composition for grey cast iron and through nitriding gas treatment thereof.Type: ApplicationFiled: February 21, 2024Publication date: March 6, 2025Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Young Jae Kim, Yoon Cheol Kim, Sang Mok Lee, Byoung Soo Yoo, Kwang Soo Lee, Kyung Jae Lee