Patents by Inventor Kyoung-Hoon Kim

Kyoung-Hoon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190157291
    Abstract: Provided is a three-dimensional semiconductor memory device. The device may include a substrate that includes a cell array region and a connection region; an electrode structure provided on the substrate to extend in a first direction and include electrodes that are vertically stacked on the substrate and include pad portions which are stacked on the connection region to have a staircase structure; cell vertical structures provided on the cell array region to penetrate the electrode structure; dummy vertical structures provided on the connection region to penetrate the pad portion of each electrode; and cell contact plugs coupled to the pad portions of the electrodes. Each cell contact plug may have a non-circular top surface, and the dummy vertical structures may be arranged to surround each cell contact plug, in a plan view.
    Type: Application
    Filed: May 24, 2018
    Publication date: May 23, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee-Sung KAM, TaeHee LEE, Kyoung-Hoon KIM
  • Publication number: 20190147319
    Abstract: Provided are a method and apparatus for processing a convolution operation in a neural network. The apparatus may include a memory, and a processor configured to read, from the memory, one of divided blocks of input data stored in a memory; generate an output block by performing the convolution operation on the one of the divided blocks with a kernel; generate a feature map by using the output block, and write the feature map to the memory.
    Type: Application
    Filed: October 18, 2018
    Publication date: May 16, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Dong-kwan SUH, Keshava PRASAD, Dae-hyun KIM, Suk-jin KIM, Han-su CHO, Hyun-jung KIM
  • Patent number: 10289807
    Abstract: This invention relates to a method of evaluating the similarity of structural effects of solvents determining solvent reactivity and a system using the same, and more particularly to a novel evaluation method that is able to quantitatively measure the structural effect of a solvent having an influence on reactivity upon reaction of the solvent with a predetermined material and to a system using the same.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: May 14, 2019
    Assignee: LG Chem, Ltd.
    Inventors: Seung-Yup Lee, Ji-Won Jeong, Mi-Ri Kim, Kyoung-Shil Oh, Kyoung-Hoon Kim
  • Publication number: 20190138469
    Abstract: Electronic devices according to various embodiments of the present invention comprise: a connector for communicating serial data to an external electronic device; a nonvolatile memory; and a processor, wherein the processor is configured to: acquire identification information of the external electronic device via the connector; confirm whether or not a designated mode of the external electronic device is supported at least on the basis of the identification information; based on the identification that the external electronic device supports the designated mode, acquire first additional information associated with the external electronic device; based on the identification that the external electronic device does not support the designated mode, acquire second additional information associated with the external electronic device; and store the identification information or at least a part of the second additional information in the nonvolatile memory.
    Type: Application
    Filed: February 14, 2017
    Publication date: May 9, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Woo-Kwang LEE, Dong-Rak SHIN, Kyoung-Hoon KIM
  • Patent number: 10283451
    Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon Kim, Woo-sung Yang, Jee-hoon Hwang
  • Patent number: 10283267
    Abstract: A multilayer ceramic electronic component includes: a ceramic body including a capacitance forming part in which first and second dielectric layers are alternately disposed; and external electrodes disposed on both end surfaces of the ceramic body. The capacitance forming part includes first and second internal electrodes, first floating electrodes, and second floating electrodes. The ceramic body further includes a protective part having third dielectric layers on which first and second dummy electrodes exposed to the end surfaces of the ceramic body are disposed and a third dummy electrode is disposed between the first and second dummy electrodes.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jang Hyun Lee, Kyeong Jun Kim, Kyoung Hoon Kim, Seung Yul Lee, Sun Cheol Lee
  • Publication number: 20190129885
    Abstract: A processor for performing deep learning is provided herein. The processor includes a processing element unit including a plurality of processing elements arranged in a matrix form including a first row of processing elements and a second row of processing elements. The processing elements are fed with filter data by a first data input unit which is connected to the first row processing elements. A second data input unit feeds target data to the processing elements. A shifter composed of registers feeds instructions to the processing elements. A controller in the processor controls the processing elements, the first data input unit and second data input unit to process the filter data and target data, thus providing sum of products (convolution) functionality.
    Type: Application
    Filed: September 27, 2018
    Publication date: May 2, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Dong-kwan SUH, Keshava PRASAD NAGARAJA, Suk-jin KIM, Han-su CHO, Hyun-jung KIM
  • Patent number: 10275005
    Abstract: An electronic device is provided. The electronic device includes a first connector including a first pin and a second pin configured to connect with a first external electronic device, a second connector configured to connect with a second external electronic device, a connection sensing circuit configured to sense a connection or disconnection of the second external electronic device coupled to the first pin via the second connector, and a switch configured to supply power received from the first external electronic device via the second pin to the first pin if the disconnection is sensed via the connection sensing circuit.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: April 30, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk Kang, Dong Rak Shin, Young Jin Park, Kyoung Hoon Kim, Chi Jung Ha
  • Patent number: 10268086
    Abstract: Disclosed is an electronic device in which a defect, where air bubbles occur in an OCR or a gap space is not filled in a D/B process, is prevented and a gap filling tape is adhered to a display module without a gap, thereby solving a problem where a crack or yellowing occurs in the display module. The electronic device includes a display panel including a first substrate and a second substrate bonded to a portion other than one edge of the first substrate, a panel supporting part supporting the display panel, a cover window attached on a front surface of the second substrate, a housing accommodating the panel supporting part and supporting the cover window, a gap between the one edge of the first substrate and the cover window, and a gap sealing member attached on a side surface of the panel supporting part to seal the gap.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: April 23, 2019
    Assignee: LG Display Co., Ltd.
    Inventor: Kyoung-Hoon Kim
  • Publication number: 20190114542
    Abstract: An electronic apparatus and method thereof are provided for performing deep learning. The electronic apparatus includes a storage configured to store target data and kernel data; and a processor including a plurality of processing elements that are arranged in a matrix shape. The processor is configured to input, to each of the plurality of processing elements, a first non-zero element from among a plurality of first elements included in the target data, and sequentially input, to each of a plurality of first processing elements included in a first row from among the plurality of processing elements, a second non-zero element from among the plurality of elements included in the kernel data. Each of the plurality of first processing elements is configured to perform an operation between the input first non-zero element and the input second non-zero element, based on depth information of the first non-zero element and depth information of the second non-zero element.
    Type: Application
    Filed: July 10, 2018
    Publication date: April 18, 2019
    Inventors: Kyoung-hoon Kim, Young-hwan Park, Dong-kwan Suh, Keshava Prasad Nagaraja, Dae-hyun Kim, Suk-jin Kim, Han-su Cho, Hyun-jung Kim
  • Publication number: 20190106806
    Abstract: A silicon-based molten composition according to an exemplary embodiment is used for a solution growth method for forming a silicon carbide single crystal, and represented by Formula 1 including silicon (Si), a first metal M1, a second metal M2 and a third metal M3, wherein the first metal M1 is one or more selected from the group consisting of nickel (Ni) and manganese (Mn), the second metal M2 is one or more selected from the group consisting of scandium (Sc) and titanium (Ti), and the third metal M3 is one or more selected from the group consisting of aluminum (Al) and gallium (Ga): SiaM1bM2cM3d??Formula 1 wherein a is 0.3 to 0.8, b is 0.1 to 0.5, c is 0.01 to 0.3, d is 0.01 to 0.2, and a+b+c+d is 1.
    Type: Application
    Filed: August 22, 2017
    Publication date: April 11, 2019
    Applicant: LG Chem, Ltd.
    Inventors: Chan Yeup Chung, Ho Rim Lee, Kyoung Hoon Kim, Jung Min Ko
  • Patent number: 10242162
    Abstract: This invention relates to a method and system for predictively evaluating a water-insoluble material even without solubility measurement experiments.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: March 26, 2019
    Assignee: LG Chem, Ltd.
    Inventors: Seung-Yup Lee, Ji-Won Jeong, Kyoung-Hoon Kim
  • Patent number: 10237087
    Abstract: A method of operating an electronic device is provided. The method includes communicating data with a wireless network using a wireless communication, connecting to an external electronic device using a wired communication, exchanging data with the external device at a first data throughput using the wired communication while performing the wireless communication, and changing the first data throughput to a second data throughput while performing the wireless communication.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk Kang, Guneet Singh Khurana, Kyoung-Hoon Kim, Woo-Kwang Lee, Hyoung-Woo Jang
  • Patent number: 10229914
    Abstract: A three-dimensional (3D) semiconductor memory device may include a substrate including a cell array region and a connection region, an electrode structure including pluralities of first and second electrodes that are vertically and alternately stacked on a surface of the substrate, extending in a first direction that is parallel to the surface of the substrate, and may include a stair step structure on the connection region, first and second string selection electrodes that extend in the first direction on the electrode structure and spaced apart from each other in a second direction that is parallel to the surface of the substrate and perpendicular to the first direction. The first and second string selection electrodes may each include an electrode portion on the cell array region and a pad portion that extends from the electrode portion in the first direction and on the connection region.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: March 12, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Hoon Kim, Sangyoun Jo
  • Patent number: 10162913
    Abstract: The present invention relates to a simulation method and device. According to the present invention, a simulation method using a plurality of blocks comprises: a dividing step of dividing a simulation into computation operations for performing unique operations on the blocks and communication operations for data exchanges between different blocks; a grouping step of performing a grouping between the interdependent computation and communication operations; and a simulation performing step of performing an operation included in each group using the blocks according to whether or not the level of interdependency between the computation and communication operations is resolved.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: December 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung Hoon Kim, Joong Baik Kim, Seung Wook Lee
  • Publication number: 20180337192
    Abstract: A vertical memory device includes a conductive pattern structure on a first region of a substrate, the conductive pattern structure including a stack of interleaved conductive patterns and insulation layers. A pad structure is disposed on a second region of the substrate adjacent the first region of the substrate wherein edges of the conductive patterns are disposed at spaced apart points along a first direction to provide conductive pads arranged as respective steps in a staircase arrangement. A plurality of channel structures extends through the conductive pattern structure and a plurality of dummy channel structures extends through the pad structure. Respective contact plugs are disposed on the conductive pads. Numbers of the dummy channel structures per unit area passing through the conductive pads vary. Widths of the dummy channel structures passing through the conductive pads may also vary.
    Type: Application
    Filed: January 15, 2018
    Publication date: November 22, 2018
    Inventors: KYOUNG-HOON KIM, HONG-SOO KIM, TAE-HEE LEE
  • Publication number: 20180334541
    Abstract: A method for producing a device substrate by obtaining a laminate comprising a carrier substrate, a first polyimide film comprising a first polyimide resin disposed on at least one surface of the carrier substrate, a second polyimide film disposed on the first polyimide film opposite to the surface of the first polyimide film formed on a surface of the carrier substrate; applying a physical stimulus to the second polyimide film without causing chemical changes in the first polyimide film such that the cross-sections of the second polyimide film are exposed and cross-sectional surfaces of the first polyimide film are not exposed and no physical stimulus is applied to the surface of the carrier substrate, wherein the adhesive strength of the first polyimide to the second polyimide film decreases when the second polyimide film in the laminate is cut to expose cross-sectional surfaces of the second polyimide film; and separating the second polyimide film from the first polyimide film formed on the carrier substra
    Type: Application
    Filed: July 27, 2018
    Publication date: November 22, 2018
    Applicant: LG CHEM, LTD.
    Inventors: Hye Won JEONG, Kyungjun KIM, Kyoung Hoon KIM, Chan Hyo PARK, BoRa SHIN, Seung Yup LEE, HangAh PARK, JinHo LEE, MiRa IM
  • Publication number: 20180284047
    Abstract: Disclosed is an electronic device including a display; a connector; and a processor configured to sense moisture introduced into the connector in a state where one or more functions executable by connection of the connector with an external electronic device are activated; deactivate the one or more functions based on the sensing; determine whether the introduced moisture is removed in a state where the one or more functions are deactivated; and activate the one or more functions if the moisture is removed.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Inventors: Kyoung-Won KIM, Sung-Eun Lee, Jae-Hyun Ahn, Je-Kook Kim, Joon-Yung Park, Kyung-Won Park, Jong-lk Won, In-Geol Lee, Yu-Dong Bae, Dong-Rak Shin, Kang-Jun Ko, Kyoung-Hoon Kim, Min-Gi Kim, Sang-ll Park, Jeong-Hun Seo
  • Publication number: 20180276532
    Abstract: An electronic apparatus for performing machine learning a method of machine learning, and a non-transitory computer-readable recording medium are provided. The electronic apparatus includes an operation module configured to include a plurality of processing elements arranged in a predetermined pattern and share data between the plurality of processing elements which are adjacent to each other to perform an operation; and a processor configured to control the operation module to perform a convolution operation by applying a filter to input data, wherein the processor controls the operation module to perform the convolution operation by inputting each of a plurality of elements configuring a two-dimensional filter to the plurality of processing elements in a predetermined order and sequentially applying the plurality of elements to the input data.
    Type: Application
    Filed: March 23, 2018
    Publication date: September 27, 2018
    Inventors: Kyoung-hoon KIM, Young-hwan PARK, Ki-seok KWON, Suk-jin KIM, Chae-seok IM, Han-su CHO, Sang-bok HAN, Seung-won LEE, Kang-jin YOON
  • Publication number: 20180247940
    Abstract: A three-dimensional (3D) semiconductor memory device may include a substrate including a cell array region and a connection region, an electrode structure including pluralities of first and second electrodes that are vertically and alternately stacked on a surface of the substrate, extending in a first direction that is parallel to the surface of the substrate, and may include a stair step structure on the connection region, first and second string selection electrodes that extend in the first direction on the electrode structure and spaced apart from each other in a second direction that is parallel to the surface of the substrate and perpendicular to the first direction. The first and second string selection electrodes may each include an electrode portion on the cell array region and a pad portion that extends from the electrode portion in the first direction and on the connection region.
    Type: Application
    Filed: April 27, 2018
    Publication date: August 30, 2018
    Inventors: Kyoung-Hoon KIM, Sangyoun Jo