Abstract: An electronic device includes a connector, a first communication circuit connected with the connector, a second communication circuit connected with the connector, and a processor. The processor is configured to verify identification information corresponding to an external electronic device connected with the electronic device through the connector, to receive or transmit, if the external electronic device is an electronic device of a first type, data from or to the external electronic device through the first communication circuit and the second communication circuit based on the identification information, and to receive or transmit, if the external electronic device is the electronic device of a second type, data from or to the external electronic device through the first communication circuit based on the identification information.

Abstract: An electronic device is provided. The electronic device includes a first connector including a first pin and a second pin configured to connect with a first external electronic device, a second connector configured to connect with a second external electronic device, a connection sensing circuit configured to sense a connection or disconnection of the second external electronic device coupled to the first pin via the second connector, and a switch configured to supply power received from the first external electronic device via the second pin to the first pin if the disconnection is sensed via the connection sensing circuit.

Abstract: A three-dimensional (3D) semiconductor memory device may include a substrate including a cell array region and a connection region, an electrode structure including pluralities of first and second electrodes that are vertically and alternately stacked on a surface of the substrate, extending in a first direction that is parallel to the surface of the substrate, and may include a stair step structure on the connection region, first and second string selection electrodes that extend in the first direction on the electrode structure and spaced apart from each other in a second direction that is parallel to the surface of the substrate and perpendicular to the first direction. The first and second string selection electrodes may each include an electrode portion on the cell array region and a pad portion that extends from the electrode portion in the first direction and on the connection region.

Abstract: A chip component includes: a ceramic body including a capacitance forming part in which first and second dielectric layers are alternately disposed; and external electrodes disposed on both end surfaces of the ceramic body, wherein the capacitance forming part includes first and second internal electrodes spaced apart from each other on the first dielectric layers and exposed to the end surfaces of the ceramic body to thereby be connected to the external electrodes; and floating electrodes disposed on the second dielectric layers and overlapped with portions of the first and second internal electrodes, the ceramic body includes protective parts disposed between upper and lower surfaces thereof and the capacitance forming part and having third dielectric layers on which first and second dummy electrodes exposed to the end surfaces of the ceramic body are disposed, and the protective parts include third dummy electrodes disposed between the first and second dummy electrodes.

Abstract: A highly integrated semiconductor memory device includes a substrate, a plurality of vertical pillars above the substrate, a plurality of connection lines extending over the vertical pillars, a plurality of lower via plugs provided above the vertical pillars and connecting the vertical pillars to the connection lines, a dummy connection line provided at a same level as the connection lines with respect to a main surface of the substrate, and a dummy via plug connected to a lower surface of the dummy connection line and having a different height than each of the lower via plugs. The vertical pillars, the connection lines, the lower via plugs are provided in a cell region, and the dummy connection line and the dummy via plug are provided in a dummy region.

Abstract: The present invention relates to a laminate and a device fabricated using the laminate. The laminate includes a debonding layer including a polyimide resin having a similarity score not greater than 0.5, as calculated by Equation 1 defined in the detailed description, between a carrier substrate and a flexible substrate. According to the present invention, the flexible substrate can be easily separated from the carrier substrate without the need for further processing such as laser or light irradiation. Therefore, the use of the laminate facilitates the fabrication of the device having the flexible substrate. The device may be, for example, a flexible display device. In addition, the device can be prevented from deterioration of reliability and occurrence of defects caused by laser or light irradiation. This ensures improved characteristics and high reliability of the device.

Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.

Abstract: A semiconductor memory device may include an electrode structure including a selection line on a substrate and word lines between the substrate and the selection line, vertical pillars penetrating the electrode structure and being connected to the substrate, sub-interconnections and bit lines sequentially stacked on and electrically connected to the vertical pillars, and lower contacts connecting the vertical pillars to the sub-interconnections. The selection line may include a plurality of selection lines separated from each other in a first direction by an insulating separation layer, and central axes of the lower contacts connected in common to one of the sub-interconnections may be shifted, in a second direction across the first direction and parallel to a top surface of the substrate, from central axes of the vertical pillars thereunder.

Abstract: Disclosed are a resin blend, a copolymer, a pellet, a method of manufacturing a resin-molded article using the same, and a resin-molded article. The exemplary resin blend can be useful in providing a protective film for polarizing plates having excellent adhesive strength to a polarizer. Also, the resin blend can be useful in exhibiting excellent adhesive strength to the polarizer without performing an additional primer coating process on a surface(s) of the protective film for polarizing plate, thereby reducing production time and cost and improving productivity.

Abstract: An apparatus and a method are provided. The apparatus includes a connector to connect with an electronic device external to the apparatus, and a processor configured to identify a connection with the electronic device via the connector, receive, using a first communication scheme, a message from the electronic device based at least in part on the identifying, determine, based at least in part on the message, whether the electronic device supports a second communication scheme, and establish a communication link corresponding to the second communication scheme with the electronic device based at least in part on a determination that the electronic device supports the second communication scheme.

Abstract: Provided is a vertical NAND flash memory device. The vertical NAND flash memory device may include word lines formed on a substrate, a plurality of pads horizontally extending from the word lines, and contact plugs connected to respective pads. The contact plugs may include a first contact plug connected to a lowermost pad that is closest to the substrate, and a set of second contact plugs each second contact plug connected to a corresponding pad of the plurality of pads. A first distance between the first contact plug and a second contact plug of the set of second contact plugs that is adjacent to the first contact plug may be different from second distances between adjacent contact plugs of the set of second contact plugs. The second distances may be substantially the same as each other.

Abstract: A method and apparatus for compiling and executing an application including Central Processing Unit (CPU) source code and Graphic Processing Unit (GPU) source code. The apparatus includes a hardware device including a CPU and a GPU; a compiler that compiles the GPU source code into a GPU virtual instruction; and a hybrid virtualization block that executes an execution file by translating the GPU virtual instruction into GPU machine code.

Abstract: The disclosed light emitting device includes an intermediate layer interposed between the light emitting semiconductor structure and the substrate. The light emitting semiconductor structure includes a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer, wherein the active layer has a multi quantum well structure including at least one period of a pair structure of a quantum barrier layer including AlxGa(1-x)N (0<x<1) and a quantum well layer including AlyGa(1-y)N (0<x<y<1), and at least one of the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer includes AlGaN. The intermediate layer includes AlN and has a plurality of air voids formed in the AlN. At least some of the air voids are irregularly aligned and the number of the air voids is 107 to 1010/cm2.

Abstract: A fluorescent material of a garnet structure having an aluminate-based fluorescent material, cerium as an activator and thulium as a coactivator can emit green light with high luminance under an excitation condition by a blue light source, and therefore, it is useful as a fluorescent material for a white light emitting diode.

Abstract: Disclosed is an electronic device including a first communication circuit that perform communication by using a first communication protocol, and a processor electrically connected to the first communication circuit, wherein the processor activates the first communication circuit based on a predetermined mutual operation, sets an operating mode of the electronic device based on at least part of the activation of the first communication circuit, and operates a universal serial bus (USB) host controller through a switching circuit based on the set operating mode.

Abstract: Disclosed is a modified conjugated diene polymer represented by Formula 1. Advantageously, provided are a modified conjugated diene polymer which exhibits superior compatibility with a reinforcing filler, heat generation, tensile strength and abrasion resistance, low fuel consumption and excellent wet skid resistance, a method for preparing the same and a rubber composition comprising the same.