Patents by Inventor Kyu-Jin Choi

Kyu-Jin Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312909
    Abstract: A RF (Radio Frequency) switch may include: a common port; a first switching unit including a plurality of first switching devices; a second switching; a negative voltage generating unit sensing the high frequency signal from the common port and rectifying the sensed high frequency signal to generate a negative voltage; and a logic circuit unit controlling switching operations of the first and second switching units using the negative voltage provided from the negative voltage generating unit and a positive voltage provided from the outside.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: April 12, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Chan Kang, Kyu Jin Choi, Jae Hyouck Choi, Jeong Hoon Kim
  • Publication number: 20150348700
    Abstract: There are provided an on-chip inductor, and a method for manufacturing the same. The on-chip inductor may include: a substrate; an oxide layer formed on the substrate; a spiral-shaped wiring layer formed on the oxide layer; and a shielding layer having a lattice shape interposed between the substrate and the wiring layer.
    Type: Application
    Filed: September 9, 2014
    Publication date: December 3, 2015
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kyung Hee HONG, Jeong Hoon KIM, Suk Chan KANG, Joong Jin NAM, Kyu Jin Choi, Jae Hyouck Choi
  • Patent number: 9124353
    Abstract: A switching circuit may include: the switching circuit includes a switching circuit unit including a first transistor and a second transistor connected to each other in series, the second transistor receiving a first control signal through a control terminal thereof, and an inverter connected between a control terminal of the first transistor and a first terminal of the first transistor. The inverter receives a second control signal and maintains a gate-source voltage level of the first transistor to a threshold voltage level of the first transistor or less, and levels of the first and second control signals are logically complementary to each other.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: September 1, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Chan Kang, Ho Kwon Yoon, Jeong Hoon Kim, Joong Jin Nam, Kyu Jin Choi, Kwang Du Lee, Jae Hyouck Choi, Kyung Hee Hong
  • Publication number: 20150236749
    Abstract: A radio frequency switching circuit may include: a first switching circuit unit connected between a first signal port for transmitting and receiving signals and a common connection node connected to an antenna port and operated by a first gate signal; a second switching circuit unit connected between a second signal port for transmitting and receiving the signals and the common connection node and operated by a second gate signal; a signal selecting unit selecting a signal having a higher voltage between the first and second gate signals and providing the selected signal as a reference voltage; and a voltage generating unit generating a common node voltage using the reference voltage and providing the generated common node voltage to the common connection node, the common node voltage being lower than the reference voltage and being higher than a voltage level of zero.
    Type: Application
    Filed: May 6, 2014
    Publication date: August 20, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyouck CHOI, Suk Chan KANG, Kyu Jin CHOI, Jeong Hoon KIM
  • Publication number: 20150188597
    Abstract: A RF (Radio Frequency) switch may include: a common port; a first switching unit including a plurality of first switching devices; a second switching; a negative voltage generating unit sensing the high frequency signal from the common port and rectifying the sensed high frequency signal to generate a negative voltage; and a logic circuit unit controlling switching operations of the first and second switching units using the negative voltage provided from the negative voltage generating unit and a positive voltage provided from the outside.
    Type: Application
    Filed: June 26, 2014
    Publication date: July 2, 2015
    Inventors: Suk Chan KANG, Kyu Jin CHOI, Jae Hyouck CHOI, Jeong Hoon KIM
  • Publication number: 20150188501
    Abstract: A power amplifying apparatus may include a first amplifying unit receiving power and amplifying a high frequency signal, a second amplifying unit receiving the power and amplifying the high frequency signal from the first amplifying unit, and a control unit controlling an operation of the first amplifying unit or the second amplifying unit. The first amplifying unit and the control unit are disposed on a complementary metal oxide semiconductor (CMOS) substrate, and the second amplifying unit is disposed on a GaAs substrate.
    Type: Application
    Filed: May 8, 2014
    Publication date: July 2, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyouck CHOI, Jeong Hoon KIM, Suk Chan KANG, Joong Jin NAM, Kyu Jin CHOI, Kwang Du LEE, Kyung Hee HONG
  • Publication number: 20150188600
    Abstract: A switching circuit may include: the switching circuit includes a switching circuit unit including a first transistor and a second transistor connected to each other in series, the second transistor receiving a first control signal through a control terminal thereof, and an inverter connected between a control terminal of the first transistor and a first terminal of the first transistor. The inverter receives a second control signal and maintains a gate-source voltage level of the first transistor to a threshold voltage level of the first transistor or less, and levels of the first and second control signals are logically complementary to each other.
    Type: Application
    Filed: April 22, 2014
    Publication date: July 2, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Chan KANG, Ho Kwon YOON, Jeong Hoon KIM, Joong Jin NAM, Kyu Jin CHOI, Kwang Du LEE, Jae Hyouck CHOI, Kyung Hee HONG
  • Publication number: 20150180470
    Abstract: A switching circuit may include a switching circuit unit; a reference voltage unit connected between the switching circuit unit and a signal input terminal and providing a preset reference voltage; and a voltage generating unit dividing a first control voltage provided to the switching circuit unit by a preset magnitude to generate a second control voltage corresponding to the reference voltage, and providing the second control voltage to bodies of the plurality of respective switching devices.
    Type: Application
    Filed: July 1, 2014
    Publication date: June 25, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Hyouck CHOI, Kyu Jin CHOI, Suk Chan KANG, Jeong Hoon KIM
  • Publication number: 20150145606
    Abstract: A power amplifier may include a first amplifying unit receiving a first bias signal to amplify a power level of an input signal; an envelope detecting unit detecting an envelope of the input signal; a comparing circuit unit comparing a peak value of the detected envelope with a preset reference voltage; and a second amplifying unit amplifying the power level of the input signal according to a second bias signal set depending on a comparison result of the comparing circuit unit.
    Type: Application
    Filed: May 8, 2014
    Publication date: May 28, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kwang Du LEE, Jeong Hoon KIM, Ho Kwon YOON, Joong Jin NAM, Kyu Jin CHOI, Suk Chan KANG, Jae Hyouck CHOI, Kyung Hee HONG
  • Publication number: 20140357517
    Abstract: The present disclosure provides a composition for radiation exposure diagnosis including an agent for measuring an expression level of an insulin-like growth factor-binding protein-5 (IGFBP-5) gene at an mRNA or the protein and a kit for radiation exposure diagnosis. Methods of diagnosing radiation exposure as well as methods for screening an agent for enhancing radiation sensitivity or for radiation protection are disclosed. Also provided are compositions for enhancing radiation sensitivity and/or radiation protection.
    Type: Application
    Filed: May 9, 2012
    Publication date: December 4, 2014
    Applicant: Korea Institute of Radiological & Medical Sciences
    Inventors: Kwang Seok Kim, Sang Woo Bae, Kyu Jin Choi, Eun Sook Kim
  • Publication number: 20120129321
    Abstract: A semiconductor device manufacturing apparatus includes a chamber including a reaction space, a substrate disposing unit configured to dispose a substrate within the chamber, a first heating unit configured to optically heat the reaction space and disposed under the chamber, a second heating unit configured to heat the reaction space through resistive heating and disposed over the chamber, and a plasma generating unit configured to generate plasma in the reaction space. Since the apparatus generates the plasma using the plasma generating unit disposed over the chamber, the deposition process based on heating and the etch process based on the plasma can be simultaneously performed in one single chamber.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: JUSUNG ENGINEERING CO., LTD
    Inventors: Cheol Hoon YANG, Kyu Jin CHOI, Yong Han JEON, Euy Kyu LEE, Tae Wan LEE
  • Patent number: 7736042
    Abstract: Provided is a back light unit. The back light unit includes a light guide plate having a light guide pattern part; at least one light emitting unit provided at a sidewall of the light guide plate, and irradiating light to the light guide plate; a keypad positioned over the light guide plate, and comprising a resin layer, a base resin layer, a character opening part having a character shape, a key assembly provided at one side, and a key adherence film provided on an upper surface of the base resin layer; and a printed circuit board comprising a metal dome switch positioned under a lower surface of the light guide plate.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: June 15, 2010
    Assignee: LS Tech Co., Ltd.
    Inventors: Deuk II Park, Choong Yop Rhew, Ki Yong Balk, Young Jin Hyun, Jun Kyu Lee, Hyun Jung Cho, Kyu Jin Choi
  • Publication number: 20100101730
    Abstract: A substrate processing apparatus, which is designed to prevent the wobbling of a rotational shaft rotating, is provided. The substrate includes a rotation shaft and a connecting member. A unit is disposed between the rotational shaft and the connecting member to make the rotational shaft and the connecting member close-contact each other or a unit is disposed under the rotational shaft to prevent the wobbling of the rotational shaft.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 29, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Kyu Jin CHOI, Sung Min NA, Euy Kyu LEE, Yong Han JEON, Cheol Hoon YANG, Tae Wan LEE, Uk HWANG, Sun Kee KIM
  • Publication number: 20100006539
    Abstract: A semiconductor device manufacturing apparatus includes a chamber including a reaction space, a substrate disposing unit configured to dispose a substrate within the chamber, a first heating unit configured to optically heat the reaction space and disposed under the chamber, a second heating unit configured to heat the reaction space through resistive heating and disposed over the chamber, and a plasma generating unit configured to generate plasma in the reaction space. Since the apparatus generates the plasma using the plasma generating unit disposed over the chamber, the deposition process based on heating and the etch process based on the plasma can be simultaneously performed in one single chamber.
    Type: Application
    Filed: October 27, 2008
    Publication date: January 14, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD
    Inventors: Cheol Hoon YANG, Kyu Jin CHOI, Yong Han JEON, Euy Kyu LEE, Tae Wan LEE
  • Publication number: 20080019115
    Abstract: Provided is a back light unit. The back light unit includes a light guide plate having a light guide pattern part; at least one light emitting unit provided at a sidewall of the light guide plate, and irradiating light to the light guide plate; a keypad positioned over the light guide plate, and comprising a resin layer, a base resin layer, a character opening part having a character shape, a key assembly provided at one side, and a key adherence film provided on an upper surface of the base resin layer; and a printed circuit board comprising a metal dome switch positioned under a lower surface of the light guide plate.
    Type: Application
    Filed: February 20, 2007
    Publication date: January 24, 2008
    Inventors: Deuk II Park, Choong Yop Rhew, Ki Yong Balk, Young Jin Hyun, Jun Kyu Lee, Hyun Jung Cho, Kyu Jin Choi
  • Patent number: 6887794
    Abstract: A pre-cleaning method of a substrate for a semiconductor device includes preparing a chamber, the chamber including a plasma electrode at an outside of the chamber, a power supplying system connected to the plasma electrode, a susceptor in the chamber, and an injector injecting gases into the chamber, equipping a metallic net in the chamber, the metallic net over the susceptor and grounded, disposing a substrate on the susceptor, and injecting a hydrogen gas into the chamber through the injector and supplying radio frequency power to the plasma electrode, thereby removing an oxide layer on the substrate.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: May 3, 2005
    Assignee: Jusung Engineering Co., Ltd.
    Inventor: Kyu-Jin Choi
  • Publication number: 20050056223
    Abstract: A cold wall chemical vapor deposition apparatus includes: a chamber; a susceptor movable up and down in the chamber by a driving means, the susceptor including a heater and an internal electrode; a heat reflector over the susceptor, the heat reflector reflecting a heat emitted from the heater back to a wafer on the susceptor and serving as an correspondent electrode to the internal electrode; a heater control unit connected to the wafer, the heater and the driving means, the heater control unit sensing a temperature of the wafer, the susceptor moving according to the temperature; a gas supply unit supplying gases to the chamber; and a power source applying a voltage to the chamber.
    Type: Application
    Filed: October 21, 2004
    Publication date: March 17, 2005
    Inventors: Tae-Wan Lee, Kyu-Jin Choi, Yong-Ho Lee
  • Patent number: 6857388
    Abstract: A cold wall chemical vapor deposition apparatus includes: a chamber; a susceptor movable up and down in the chamber by a driving means, the susceptor including a heater and an internal electrode; a heat reflector over the susceptor, the heat reflector reflecting a heat emitted from the heater back to a wafer on the susceptor and serving as an correspondent electrode to the internal electrode; a heater control unit connected to the wafer, the heater and the driving means, the heater control unit sensing a temperature of the wafer, the susceptor moving according to the temperature; a gas supply unit supplying gases to the chamber; and a power source applying a voltage to the chamber.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: February 22, 2005
    Assignee: Jusung Engineering Co., LTD
    Inventors: Tae-Wan Lee, Kyu-Jin Choi, Yong-Ho Lee
  • Publication number: 20040121609
    Abstract: Disclosed herein is a method for forming a silicon epitaxial layer. The method comprises the steps of cleaning the surface of a silicon substrate having dopant of predetermined concentration doped therein with mixed plasma comprising an etching gas containing fluorine and hydrogen or deuterium, and forming a silicon epitaxial layer on the cleaned surface of the silicon substrate. The doped concentration of the silicon substrate is preferably 1018 to 1021 atoms/cm3. According to the present invention, a new preliminary cleaning step is adopted, whereby a silicon epitaxial layer of good quality is formed on a highly doped silicon substrate at a low temperature of 700° C. or less.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 24, 2004
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Tae Wan Lee, Kyu Jin Choi, Jung Hoon Sun, Sung Jin Whoang, Bok Won Cho
  • Publication number: 20030129848
    Abstract: A pre-cleaning method of a substrate for a semiconductor device includes preparing a chamber, the chamber including a plasma electrode at an outside of the chamber, a power supplying system connected to the plasma electrode, a susceptor in the chamber, and an injector injecting gases into the chamber, equipping a metallic net in the chamber, the metallic net over the susceptor and grounded, disposing a substrate on the susceptor, and injecting a hydrogen gas into the chamber through the injector and supplying radio frequency power to the plasma electrode, thereby removing an oxide layer on the substrate.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 10, 2003
    Inventor: Kyu-Jin Choi