Abstract: A holder plate for negative pressure chucking, in which the holder plate is plate body comprising a holding surface and a bottom surface. Air passages are formed inside the holder plate and communicates the holding surface and the bottom surface, and the air passages form a plurality of ventilation openings on the holding surface. A total area of an opening of the ventilation openings in the holding surface is less than 50% of the area of the holder plate and greater than 0.2% of the area of the holder plate. The thermal conductivity of the holder plate is greater than 100 W/mK; wherein W is watts, m is meters, and K is the absolute temperature scale.

Abstract: An electronic package is provided and includes: a carrier structure, an electronic component disposed on the carrier structure, a heat dissipation structure disposed on the electronic component, a heat conductor sandwiched between the electronic component and the heat dissipation structure, a first intermetallic compound layer formed between the heat dissipation structure and the heat conductor, and a second intermetallic compound layer formed between the heat conductor and the electronic component. Therefore, stable connections can be formed between the heat dissipation structure, the heat conductor and the electronic component via the first intermetallic compound layer and the second intermetallic compound layer to improve heat dissipation effect.

Abstract: A semiconductor device structure includes nanostructures formed over a substrate. The structure also includes a fin isolation structure formed beside the nanostructures. The structure also includes a work function layer surrounding the nanostructures and covering a sidewall of the fin isolation structure. The structure also includes a gate electrode layer covering the work function layer. The gate electrode layer has an extending portion surrounded by the work function layer.

Abstract: A manufacturing method of an optical device includes: providing a lower transparent substrate; wherein the lower transparent substrate includes an upper surface; providing a quantum dot film element and a glue-material enclosure wall disposed on the upper surface; wherein the glue-material enclosure wall surrounds the quantum dot film element; providing an upper transparent substrate covering the quantum dot film element and the glue-material enclosure wall, such that the quantum dot film element and the glue-material enclosure wall are sandwiched between the lower transparent substrate and the upper transparent substrate; and cutting the lower transparent substrate and the upper transparent substrate to form a lower protective film and an upper protective film corresponding to the quantum dot film element, so as to obtain the optical device including the lower protective film, the upper protective film, the quantum dot film element, and the glue-material enclosure wall.

Abstract: An electronic package and a manufacturing method thereof are provided, in which a first barrier body and a second barrier body are disposed respectively, and a heat dissipation structure is formed with a hole thereon. Thereby, gas in the heat dissipation structure can be discharged via the hole, so as to prevent the gas from remaining in a thermal conductive layer and affecting the heat dissipation effect.

Abstract: Multi-layer photoresists, methods of forming the same, and methods of patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a reflective film stack over a target layer, the reflective film stack including alternating layers of a first material and a second material, the first material having a higher refractive index than the second material; depositing a photosensitive layer over the reflective film stack; patterning the photosensitive layer to form a first opening exposing the reflective film stack, patterning the photosensitive layer including exposing the photosensitive layer to a patterned energy source, the reflective film stack reflecting at least a portion of the patterned energy source to a backside of the photosensitive layer; patterning the reflective film stack through the first opening to form a second opening exposing the target layer; and patterning the target layer through the second opening.

Abstract: A low concentration ozone gas supply device includes an ozone dilution tank, an ozone generator, a dilution gas supplier, and plural gas reservoir. The ozone dilution tank is provided with a dilution space, and the ozone dilution tank is provided with an overflow vent connected to the dilution space. The ozone generator is configured to continuously supply ozone to the dilution space of the ozone dilution tank. The dilution gas supplier is configured to supply a dilution gas to the dilution space, so that the ozone is mixed with the dilution gas in the dilution space to form the low concentration ozone gas, and the low concentration ozone gas in the dilution space continuously overflows via the overflow vent. The gas reservoirs are connected to the dilution space; wherein the volume of the dilution space is larger than the sum of the volumes of gas reservoirs.

Abstract: A particle prevention method in chamber includes providing a shielding ring, wherein the shielding ring includes a first side wall, a second side wall, and a bottom, the second side wall is parallel to the first side wall, and the bottom is connected to the first side wall, and the second side wall to form an annular groove area; connecting the first side wall to the reaction chamber with the first side wall extending toward an upper portion of a accommodating space of a reaction chamber; fixing a first deflector plate to the first side wall, wherein the first deflector plate extends obliquely toward the bottom, and the first deflector plate is located above the aperture; and fixing a second deflector plate to the second side wall, wherein the second deflector plate is located above the first deflector plate, and the second deflector plate extends obliquely toward the bottom.

Abstract: A UV-assisted and plasma-enhanced process method includes: providing a lower chamber and a reaction space defined therein; providing an upper cover, wherein the upper cover has a window and vent holes; sealing a chamber opening of the lower chamber with the upper cover to form a reaction chamber; providing an outer tube body and an inner tube body disposed in the outer tube body, the outer tube body covering the window and the vent holes, and the inner tube body connected to the window; providing a UV light source at a top end of the inner tube body; providing an induction coil around the outer tube body; inducing a first gas to a first gas chamber in the inner tube body and a second gas to the second gas chamber between the inner and outer tube bodies; and activating the UV light source and the induction coil optionally.

Abstract: A gas mixing method to enhance plasma includes: providing a reaction chamber; wherein the reaction chamber includes an accommodating space and the reaction chamber includes a top opening connected to the accommodating space; providing an adapter plate, and fixing the adapter plate to the reaction chamber to be arranged corresponding to the top opening; wherein the adapter plate further includes a window area communicating both sides of the adapter plate; providing a target disposed on top of the adapter plate to seal the top opening; premixing a plasma gas and an auxiliary gas into a gas mixture, and introducing the gas mixture into the accommodating space; and providing a biasing field to the accommodating space.

Abstract: A gas mixing method to enhance plasma includes: providing a reaction chamber; wherein the reaction chamber includes an accommodating space and the reaction chamber includes a top opening connected to the accommodating space; providing an adapter plate, and fixing the adapter plate to the reaction chamber to be arranged corresponding to the top opening; wherein the adapter plate further includes a window area communicating both sides of the adapter plate; providing a target disposed on top of the adapter plate to seal the top opening; premixing a plasma gas and an auxiliary gas into a gas mixture, and introducing the gas mixture into the accommodating space; and providing a biasing field to the accommodating space.

Abstract: Disclosed are a light-emitting device with quantum dots and a manufacturing method thereof. The light-emitting device includes a light-emitting diode chip, a transparent barrier layer, a quantum dot film, and a transparent protective layer. The transparent barrier layer is disposed on the light-emitting diode chip. The quantum dot film is disposed on the transparent barrier layer, such that the light-emitting diode chip is separated from the quantum dot film by the transparent barrier layer. The transparent protective layer is disposed on the quantum dot film, such that the quantum dot film is encapsulated between the transparent barrier layer and the transparent protective layer.

Abstract: An optical part includes a quantum dot film layer, a lower transparent film layer, and an outer protective film. The quantum dot film layer includes an upper surface, a lower surface, and a lateral surface. The lateral surface connects the upper surface with the lower surface, and the quantum dot film layer is a film containing light emitting semiconductor nanoparticles. The lower transparent film layer is disposed on the lower surface of the quantum dot film layer. The outer protective film directly or indirectly covers the upper surface of the quantum dot film layer, and extends to cover the lateral surface of the quantum dot film layer.

Abstract: Multi-layer photoresists, methods of forming the same, and methods of patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a reflective film stack over a target layer, the reflective film stack including alternating layers of a first material and a second material, the first material having a higher refractive index than the second material; depositing a photosensitive layer over the reflective film stack; patterning the photosensitive layer to form a first opening exposing the reflective film stack, patterning the photosensitive layer including exposing the photosensitive layer to a patterned energy source, the reflective film stack reflecting at least a portion of the patterned energy source to a backside of the photosensitive layer; patterning the reflective film stack through the first opening to form a second opening exposing the target layer; and patterning the target layer through the second opening.

Abstract: This disclosure is a method of using plasma enhanced process to do periodic maintenance. The method includes performing a first atomic layer deposition on a substrate on a carrier disk to form a thin film on the substrate, and determining that an insulating film deposited on an edge of a surface of the carrier disk has a thickness greater than a pre-determined value. A second atomic layer deposition is performed on the carrier disk without the substrate placed thereon, to from a conductive film on the insulating film of the carrier disk, so that the carrier disk has conductive properties. Then the substrate is placed on the carrier disk, and the first atomic layer deposition is performed on the substrate on the carrier disk. Through the method, the cycle of cleaning and maintaining the carrier disk is greatly extended to improve the rate of equipment usage.

Abstract: A structure of memory device includes an active region in a substrate, a dielectric layer on the active region, and a floating gate disposed on the dielectric layer. The active region extends along a first direction in a top-view. The floating gate includes a first protruding structure extending along the first direction from a sidewall of the floating gate protruding from a top surface of the substrate. The whole of the first protruding structure is located in the active region.

Abstract: A semiconductor device structure includes nanostructures formed over a substrate. The structure also includes a fin isolation structure formed beside the nanostructures. The structure also includes a work function layer surrounding the nanostructures and covering a sidewall of the fin isolation structure. The structure also includes a gate electrode layer covering the work function layer. The gate electrode layer has an extending portion surrounded by the work function layer.

Abstract: A semiconductor device includes a semiconductor stack, a reflective structure, and a conductive structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active region located between the first semiconductor structure and the second semiconductor structure. The reflective structure is located at a side of semiconductor stack closed to the first semiconductor structure, and includes a first metal. The conductive structure locates between the reflective structure and the first semiconductor structure, and includes a first region overlapping with the active structure and a second region which does not overlap with the active structure. The first metal in the second region has a concentration smaller than 5 atomic percent.

Abstract: A body-wearable medical device has first and second housing portions. The first housing portion has a female portion and the second housing portion has a male portion. The male portion is at least partially inserted into the female portion, thereby defining a circumferential clearance gap. A circumferential sealing element is arranged in the circumferential clearance gap between the female portion and the male portion. In order to provide a body-wearable medical device with improved sealing that is less prone to failure by stress and forces exerted on the body-wearable medical device, the female portion and the male portion are fixed to each other by a circumferential fixation glue arranged in the circumferential clearance gap between the female portion and the male portion next to the circumferential sealing element.

Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.