Patents by Inventor Lin Chen

Lin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200395393
    Abstract: A photo-detecting apparatus is provided. The photo-detecting apparatus includes at least one pixel, and each pixel includes N subpixels, wherein each of the subpixels comprises a detection region, two first conductive contacts, wherein the detection region is between the two first conductive contacts, wherein N is a positive integer and is ?2.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Inventors: Szu-Lin Cheng, Chien-Yu Chen, Shu-Lu Chen, Yun-Chung Na, Ming-Jay Yang, Han-Din Liu, Che-Fu Liang
  • Publication number: 20200395588
    Abstract: An adaptive micro-battery array including: a substrate having at least one charging and discharging port; a plurality of micro-battery units located on the substrate and each having at least one micro control unit and at least one energy storage unit; and a connecting network; where the connecting network and the micro control unit are formed on the substrate by a semiconductor fabrication process, and each of the micro-battery units is controlled by the at least one micro control unit therein to determine whether to make the at least one energy storage unit electrically connected to the connecting network, so that each of the at least one charging and discharging port is electrically connected with a corresponding micro-battery configuration.
    Type: Application
    Filed: April 22, 2020
    Publication date: December 17, 2020
    Inventors: Chung-Lin CHIA, Jang-Jeng LIANG, Yen-Hung TU, Han-Chang CHEN
  • Publication number: 20200395938
    Abstract: A multiplexer circuit includes first and second fins each extending in an X-axis direction. First, second, third and fourth gates extend in a Y-axis direction perpendicular to the X-axis direction and contact the first and second fins. The first, second, third and fourth gates are configured to receive first, second, third and fourth data signals, respectively. Fifth, sixth, seventh and eighth gates extend in the Y-axis direction and contact the first and second fins, the fifth, sixth, seventh and eighth gates, and are configured to receive the first, second, third and fourth select signals, respectively. An input logic circuit is configured to provide an output at an intermediate node. A ninth gate extends in the Y-axis direction and contacts the first and second fins. An output logic circuit is configured to provide a selected one of the first, second, third and fourth data signals at an output terminal.
    Type: Application
    Filed: May 26, 2020
    Publication date: December 17, 2020
    Inventors: Chi-Lin Liu, Shang-Chih Hsieh, Jian-Sing Li, Wei-Hsiang Ma, Yi-Hsun Chen, Cheok-Kei Lei
  • Publication number: 20200395253
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate, wherein the gate stack has a first portion and a second portion under the first portion, and the first portion is wider than the second portion. The semiconductor device structure includes a first spacer and a second spacer over opposite sides of the gate stack. The first spacer has a first upper portion and a first lower portion, the second spacer has a second upper portion and a second lower portion. The first spacer has a first recess, the first upper portion is between the first recess and the gate stack, the first lower portion is under the first recess, and the first recess has a first inner wall facing away from the gate stack.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Heng TSAI, Chun-Sheng LIANG, Pei-Lin WU, Yi-Ren CHEN, Shih-Hsun CHANG
  • Patent number: 10868127
    Abstract: Present disclosure provides gate-all-around structure including a first transistor. The first transistor includes a semiconductor substrate having a top surface, a first nanowire over the top surface of the semiconductor substrate and between a first source and a first drain, a first gate structure around the first nanowire, an inner spacer between the first gate structure and the first source and first drain, and an isolation layer between the top surface of the semiconductor substrate and the first source and the first drain. Present disclosure also provides a method for manufacturing the gate-all-around structure described herein.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Ching Cheng, Yu-Lin Yang, I-Sheng Chen, Tzu-Chiang Chen
  • Patent number: 10869031
    Abstract: A method of IntraBC coding using restricted reference area is disclosed. A reference block is selected from an available ladder-shaped reference area comprising previously processed blocks before the current working block in the current CTU row and previously processed blocks in one or more previous CTU rows. A location of a last previously processed block of a second previous CTU row that is one CTU row farther away from the current CTU row than a first previous CTU row is always in a same vertical location or after a same vertical position of a last previously processed block of the first previous CTU row. The current picture may be partitioned into multiple CTU rows for applying wavefront parallel processing (WPP) on the multiple CTU rows, where the current working block corresponds to a current working block. Similar restrictions may also be applied to slice/tile-based parallel processing.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: December 15, 2020
    Assignee: HFI Innovation Inc.
    Inventors: Shan Liu, Wang-Lin Lai, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Chih-Wei Hsu, Xiaozhong Xu
  • Patent number: 10868106
    Abstract: A method of manufacturing a semiconductor device and the semiconductor device are provided in which a plurality of layers with cobalt-zirconium-tantalum are formed over a semiconductor substrate, the plurality of layers are patterned, and multiple dielectric layers and conductive materials are deposited over the CZT material. Another layer of CZT material encapsulates the conductive material.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Li Huang, Chi-Cheng Chen, Hon-Lin Huang, Chien-Chih Chou, Chin-Yu Ku, Chen-Shien Chen
  • Patent number: 10867990
    Abstract: Some embodiments relate to a method. In the method, a semiconductor substrate is provided. Dopant impurities of a first dopant conductivity are implanted into the semiconductor substrate to form a body region. A gate dielectric and a field oxide region are formed over the semiconductor substrate. A polysilicon layer is formed over the gate dielectric and field oxide region. The polysilicon layer is patterned to concurrently form a conductive gate electrode over the gate dielectric and a resistor structure over the field oxide region. The resistor structure is perimeterally bounded by an inner edge of the conductive gate electrode. Dopant impurities of a second dopant conductivity, which is opposite the first dopant conductivity, are implanted into the semiconductor substrate to form a source region and a drain region. The drain region is perimeterally bounded by the inner edge of the conductive gate electrode.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ker Hsiao Huo, Fu-Chih Yang, Chun Lin Tsai, Yi-Min Chen, Chih-Yuan Chan
  • Patent number: 10867913
    Abstract: A first layer is located over a substrate. The first layer includes a first dielectric component and a first conductive component. A first etching stop layer is located over the first dielectric component. A metal capping layer is located over the first conductive component. A second etching stop layer is located over the first etching stop layer and over the metal capping layer. A second layer is located over the second etching stop layer. The second layer includes a second dielectric component and a second conductive component. A third conductive component electrically interconnects the second conductive component to the first conductive component.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Hsu Wu, Hai-Ching Chen, Jung-Hsun Tsai, Shau-Lin Shue, Tien-I Bao
  • Patent number: 10868142
    Abstract: A semiconductor device and a method of forming the same are provided. The method includes forming a sacrificial gate structure over an active region. A first spacer layer is formed along sidewalls and a top surface of the sacrificial gate structure. A first protection layer is formed over the first spacer layer. A second spacer layer is formed over the first protection layer. A third spacer layer is formed over the second spacer layer. The sacrificial gate structure is replaced with a replacement gate structure. The second spacer layer is removed to form an air gap between the first protection layer and the third spacer layer.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Ting Chien, Liang-Yin Chen, Yi-Hsiu Liu, Tsung-Lin Lee, Huicheng Chang
  • Patent number: 10865600
    Abstract: A window blind includes a first rail, a second rail, a plurality of slats, a modulation mechanism, and an adjustment unit. The modulation mechanism includes a modulation shaft which can drive two warps of the ladder tape to make a relative movement in a vertical direction, whereby to modulate the slats to turn. When the slats are turned from a first position to a second position, the adjustment unit moves a rear cord which is used to move the second rail, whereby to change a length of a segment of the rear cord between a bottom edge of the first rail and a top edge of the second rail. In this way, the second rail could be turned along with the slats which are driven by the modulation shaft, and the problem of light leakage could be improved.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 15, 2020
    Assignee: Nien Made Enterprise Co., Ltd.
    Inventors: De-Jun Zhang, Lin Chen, Keng-Hao Nien
  • Patent number: 10867835
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin
  • Patent number: 10867850
    Abstract: A method for forming a semiconductor structure is provided. A substrate including a metal portion and a low-k dielectric portion formed thereon is provided. The metal portion adjoins the low-k dielectric portion. A SAM solution is prepared. The SAM solution includes at least one blocking compound and a multi-solvent system. The multi-solvent system includes an alcohol and an ester. The SAM solution is applied over surfaces of the metal portion and the low-k dielectric portion. The substrate is heated to remove the multi-solvent system of the SAM solution to form a blocking layer on one of the metal portion and the low-k dielectric portion. A material layer is selectively deposited on the other one of the metal portion and the low-k dielectric portion using the blocking layer as a stencil. The blocking layer is removed from the substrate.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Chin Lee, Shao-Kuan Lee, Hsin-Yen Huang, Hai-Ching Chen, Shau-Lin Shue
  • Patent number: 10868353
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a chip package, an antenna pattern, and an insulating layer. The chip package includes a semiconductor die and an insulating encapsulation enclosing the semiconductor die. The antenna pattern is electrically coupled to the chip package, where a material of the antenna pattern comprises a conductive powder having fused metal particles. The insulating layer disposed between the chip package and the antenna pattern, where the antenna pattern includes a first surface in contact with the insulating layer, and a second surface opposite to the first surface, and a surface roughness of the second surface is greater than a surface roughness of the first surface.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Kai-Chiang Wu, Ming-Che Ho, Wei-Yu Chen, Yu-Peng Tsai, Chia-Lun Chang, Chia-Shen Cheng, Chih-Chiang Tsao, Tzu-Chun Tang, Ching-Hua Hsieh, Tuan-Yu Hung, Cheng-Shiuan Wong
  • Patent number: 10867823
    Abstract: A fault detection method in a semiconductor fabricating factory is provided. The method includes delivering a test vehicle along a rail to a test region. The method further includes projecting a test signal from a transducer that is positioned on the test vehicle over a check board when the test vehicle is located within the test region. The check board and the test vehicle are arranged along an axis that is parallel to the rail. The method also includes performing an analysis of the test signal projected over the check board. In addition, the method includes issuing a warning alarm when an abnormality is detected based on the analysis result.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Jung Huang, Yung-Lin Hsu, Kuang-Huan Hsu, Wei-Chih Chen, Jen-Ti Wang, Chih-Hung Liu
  • Patent number: 10867803
    Abstract: A method of manufacturing a semiconductor device includes exposing a material to a semi-aqueous etching solution. The semi-aqueous etching solution comprises a solvent which chelates with the material and acts as a catalyst between the etching driving force and the material. As such, the etching driving force may be used to remove the material.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Wen Hsu, Jian-Jou Lian, Neng-Jye Yang, Chia-Wei Wu, Kuan-Lin Chen, Kuo Bin Huang, Li-Min Chen
  • Patent number: 10866961
    Abstract: The present disclosure relates to a data interaction method, including: receiving a search request from a service layer, and transmitting the search request to a search application server. The search application server is configured to manage the response data obtained from at least one third-party application. The method further includes receiving the response data transmitted from the search application server, and transmitting the response data to the service layer. As such, the time of accessing the third-party applications may be reduced, the data-accessing time may be reduced, and the data-accessing performance may be improved.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: December 15, 2020
    Assignee: UBTECH ROBOTICS CORP.
    Inventors: Youjun Xiong, Lin Chen
  • Patent number: 10867847
    Abstract: A semiconductor device includes a first metal wiring layer, an interlayer insulating layer formed over the first metal layer, a second metal wiring structure embedded in the interlayer dielectric layer and connected to the first metal wiring layer, and an etch-stop layer disposed between the first metal wiring and the first interlayer dielectric layer. The etch-stop layer includes one or more sub-layers. The etch-stop layer includes a first sub-layer made of an aluminum-based insulating material, hafnium oxide, zirconium oxide or titanium oxide.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Yen Huang, Kai-Fang Cheng, Chi-Lin Teng, Shao-Kuan Lee, Hai-Ching Chen
  • Patent number: 10863923
    Abstract: Spirometer, mouthpiece tube and inspection method thereof. The spirometer includes at least the mouthpiece tube and an ultrasound detector configured to detect the ultrasound generated by the gas flowing through the mouthpiece tube, wherein the mouthpiece tube has a shell having an opened end, a closed or opened end, and an ultrasonic generator configured to be inserted into different portions of the shell in different situations. Therefore, by inserting the ultrasonic generator into different portions of the shell during expiration and inspiration, the gas flow during expiration and inspiration may be converted into the ultrasonic signal and then maybe detected and analyzed.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: December 15, 2020
    Inventors: Chia-Hung Chen, Hsiao-Pao Yen, Chia-Chi Su, Liang-Lin Yen
  • Patent number: RE48355
    Abstract: A control structure for a window covering includes a base, a revolving wheel having an axial post, a restriction means including a bushing fitting around the axial post, a transmission member provided on a side of the bushing, and at least one pawl connected to the axial post. The revolving wheel is connected to the base. The restriction means has at least one cutting groove. The transmission member has at least one abutting portion on an inner wall thereof. The pawl is pivotable within a width of the cutting groove. When the revolving wheel is rotated forward, an end of the pawl passes through the cutting groove to mesh with the abutting portion. When the revolving wheel is rotated backward, the pawl disengages from the abutting portion, and the transmission member is rotatable relative to the revolving wheel. Whereby, it could prevent generating noise while operating the window covering.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: December 15, 2020
    Assignee: Nien Made Enterprise Co., Ltd.
    Inventors: Lin Chen, Keng-Hao Nien