Patents by Inventor Lin Chu

Lin Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230154918
    Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 18, 2023
    Inventors: Hsi-Yu Kuo, Yu-Lin Chu, Tsung-Yuan Chen, Chih-Wei Hsu
  • Patent number: 11646312
    Abstract: A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: May 9, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang, Fu-Huan Tsai, Hsieh-Hung Hsieh, Tzu-Jin Yeh, Han-Min Tsai, Hong-Lin Chu
  • Publication number: 20230131435
    Abstract: Disclosed are a pre-lithiated silicon negative electrode material, a silicon negative electrode plate, a method for preparing the same, and a lithium-ion battery. The pre-lithiated silicon negative electrode material includes a silicon negative electrode material and a lithium-containing polymer compounded with the silicon negative electrode material. The lithium-containing polymer includes a polymer shown in the following formula 1, where x is 1 to 12, and R1 is I; or II, where y is 1 to 4; or III or IV. The use of the pre-lithiated silicon negative electrode material can improve performance, such as initial Coulombic efficiency, of a lithium-ion battery.
    Type: Application
    Filed: December 23, 2022
    Publication date: April 27, 2023
    Applicant: ZHUHAI COSMX BATTERY CO., LTD.
    Inventors: Panlong GUO, Suli LI, Weiping CHEN, Lin CHU
  • Publication number: 20230129049
    Abstract: Disclosed are a negative electrode plate and a battery. A first negative active material layer is disposed at a bottom layer, and includes a first binder resistant to electrolyte swelling, has a better chemical corrosion resistance, and is not easy to age, so as to ensure long-term bonding, and reduce battery cell expansio. The negative electrode plate can maintain good mechanical strength and elongation at immersion of the electrolyte, so as to ensure that it is not separatedr. A second binder in a second negative active material layer away from the negative current collector uses a high swelling material, the high-swelling binder is in good affinity with the electrolyte, and the electrolyte infiltration speed is good, which facilitates lithium ion conduction. Furthermore, the high-swelling binder is bound to the separator well in a hot pressing process, so as to improve an interface bonding effect.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 27, 2023
    Applicant: ZHUHAI COSMX BATTERY CO., LTD.
    Inventors: Weiping CHEN, Suli LI, Panlong GUO, Lin CHU, Junyi LI, Yanming XU
  • Publication number: 20230123774
    Abstract: Various embodiments of the present disclosure are directed towards an amorphous bottom electrode structure (BES) for a metal-insulator-metal (MIM) capacitor. The MIM capacitor comprises a bottom electrode, an insulator layer overlying the bottom electrode, and a top electrode overlying the insulator layer. The bottom electrode comprises a crystalline BES and the amorphous BES, and the amorphous BES overlies the crystalline BES and forms a top surface of the bottom electrode. Because the amorphous BES is amorphous, instead of crystalline, a top surface of the amorphous BES may have a small roughness compared to that of the crystalline BES. Because the amorphous BES forms the top surface of the bottom electrode, the top surface of the bottom electrode may have a small roughness compared to what it would otherwise have if the crystalline BES formed the top surface. The small roughness may improve a lifespan of the MIM capacitor.
    Type: Application
    Filed: January 12, 2022
    Publication date: April 20, 2023
    Inventors: Hsing-Lien Lin, Jui-Lin Chu, Cheng-Yuan Tsai
  • Patent number: 11594593
    Abstract: Various embodiments of the present application are directed towards a method for forming a metal-insulator-metal (MIM) capacitor comprising an enhanced interfacial layer to reduce breakdown failure. In some embodiments, a bottom electrode layer is deposited over a substrate. A native oxide layer is formed on a top surface of the bottom electrode layer and has a first adhesion strength with the top surface. A plasma treatment process is performed to replace the native oxide layer with an interfacial layer. The interfacial layer is conductive and has a second adhesion strength with the top surface of the bottom electrode layer, and the second adhesion strength is greater than the first adhesion strength. An insulator layer is deposited on the interfacial layer. A top electrode layer is deposited on the insulator layer. The top and bottom electrode layers, the insulator layer, and the interfacial layer are patterned to form a MIM capacitor.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: February 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsing-Lien Lin, Chii-Ming Wu, Chia-Shiung Tsai, Chung-Yi Yu, Rei-Lin Chu
  • Patent number: 11572438
    Abstract: A liquid-crystal polymer includes at least one repeating unit having a spiro structure, and the repeating unit occupies 1 mol % to 20 mol % of the liquid-crystal polymer. The liquid-crystal polymer is composed of the following repeating units: 1 mol % to 20 mol % of 10 mol % to 35 mol % of 10 mol % to 35 mol % of 10 mol % to 50 mol % of and 10 mol % to 40 mol % of AR1 is wherein each of ring R and ring S is independently a C3-20 ring, ring R and ring S share a carbon atom, and each of K1 and K2 is independently a C5-20 conjugated system. Each of AR2, AR3, AR4, and AR5 is independently AR6 or AR6—Z—AR7.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 7, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin Chu, Jen-Chun Chiu, Zu-Chiang Gu, Po-Hsien Ho, Meng-Hsin Chen, Chih-Hsiang Lin
  • Publication number: 20230025520
    Abstract: According to an aspect, an image sensor package includes a substrate, an image sensor die coupled to the substrate, and a transparent member including a first surface and a second surface, where the second surface of the transparent member is coupled to the image sensor die via one or more dam members such that an empty space exists between an active area of the image sensor die and the second surface of the transparent member. The image sensor package includes a light blocking member coupled to or defined by the transparent member.
    Type: Application
    Filed: August 2, 2022
    Publication date: January 26, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yu-Te HSIEH, I-Lin CHU
  • Patent number: 11564329
    Abstract: A heat dissipation device includes a base having a first surface in contact with at least one heat source and an opposite second surface having a heat dissipation zone upward extended therefrom; an auxiliary heat dissipation zone horizontally extended from one of four lateral sides or directions of the heat dissipation zone; an air guiding section defined at the auxiliary heat dissipation zone; and at least one upward indented zone formed between the auxiliary heat dissipation zone and the side of the heat dissipation zone having the auxiliary heat dissipation zone sideward sidewardly extended from a higher portion thereof. With these arrangements, the heat dissipation device can guide air flow currents directly or indirectly to a plurality of heat sources located corresponding to the heat dissipation zone and the auxiliary heat dissipation zone at the same time to cool them.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: January 24, 2023
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Sheng-Huang Lin, Yen-Lin Chu
  • Publication number: 20220415717
    Abstract: A method of detecting or monitoring process electrical charge produced during fabrication of an integrated circuit (IC) on a semiconductor wafer includes fabricating a process charge detection circuit on or in the semiconductor wafer, including: a victim isolation well, a gate oxide disposed on or in the victim isolation well, an aggressor isolation well electrically connected with the victim isolation well via the gate oxide, a victim antenna electrically connected with the victim isolation well and together with the victim isolation well defining a victim RC time constant, and an aggressor antenna electrically connected with the aggressor isolation well and together with the aggressor isolation well defining an aggressor RC time constant that is different from the victim RC time constant. Process charge is detected using the process charge detection circuit. The detecting comprises measuring an electrical parameter of the gate oxide.
    Type: Application
    Filed: February 14, 2022
    Publication date: December 29, 2022
    Inventors: Hsi-Yu Kuo, Yu-Lin Chu
  • Publication number: 20220378916
    Abstract: The present invention relates to pegylated amino acid compounds of Formula I: and pharmaceutically acceptable salts thereof, wherein X, R1, R2, R3A, R3B and n are as defined herein. The present invention also relates to compositions which comprise a pegylated amino acid compound of the invention or a pharmaceutically acceptable salt thereof, and a pharmaceutically acceptable carrier, in combination with a high concentration of an active biological ingredient (ABI). In embodiments of the invention, the ABI is an anti-PD-1 antibody or antigen binding fragment thereof that specifically binds human programmed death receptor 1 (PD-1). The invention further relates to methods for lowering the viscosity of an aqueous solution of a pharmaceutical composition comprising adding a compound of the invention to the solution.
    Type: Application
    Filed: June 29, 2022
    Publication date: December 1, 2022
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Lin Chu, Nathalie Y. Toussaint, Dong Xiao, Petr Vachal, Ramesh S. Kashi, Annette Bak
  • Publication number: 20220352065
    Abstract: Various embodiments of the present application are directed towards a metal-insulator-metal (MIM) capacitor. The MIM capacitor comprises a bottom electrode disposed over a semiconductor substrate. A top electrode is disposed over and overlies the bottom electrode. A capacitor insulator structure is disposed between the bottom electrode and the top electrode. The capacitor insulator structure comprises at least three dielectric structures vertically stacked upon each other. A bottom half of the capacitor insulator structure is a mirror image of a top half of the capacitor insulator structure in terms of dielectric materials of the dielectric structures.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 3, 2022
    Inventors: Hsing-Lien Lin, Cheng-Te Lee, Rei-Lin Chu, Chii-Ming Wu, Yeur-Luen Tu, Chung-Yi Yu
  • Patent number: 11474128
    Abstract: A metal probe structure and a method for fabricating the same are provided. The metal probe structure includes a multi-layer substrate, a first flexible dielectric layer, a second flexible dielectric layer, and a plurality of first metal components. The first flexible dielectric layer is disposed over the multi-layer substrate and has a conductive layer formed thereover. The second flexible dielectric layer is disposed over the first flexible dielectric layer to cover the conductive layer. The plurality of first metal components is disposed over the conductive layer and partially in the second flexible dielectric layer to serve as a metal probe.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: October 18, 2022
    Assignee: PRINCO CORP.
    Inventors: Yi-Lin Chu, Hung-sheng Ku
  • Patent number: 11455001
    Abstract: A keyboard device includes a keyboard module and a palm rest module. The palm rest module is arranged beside a lateral side of the keyboard module, and supports a wrist of a user. The palm rest module includes a pedestal, a casing and an adjusting element. The casing is disposed on the pedestal. The adjusting element is arranged between the pedestal and the casing. A position of the casing relative to the pedestal is adjustable through the adjusting element. In a first usage state, the casing is moved toward the keyboard module or moved away from the keyboard module through the adjusting element. In a second usage state, the casing is rotated about the adjusting element and relative to the keyboard module, so that an included angle is formed between the casing and the lateral side of the keyboard module.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 27, 2022
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Shu-An Huang, Chun-Lin Chu
  • Patent number: 11450657
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a first well, a second well and doped regions. The substrate has heavily doped and lightly doped regions over the heavily doped region. The first wells are disposed in the lightly doped region and arranged as an array. The first wells have a conductive type opposite to a conductive type of the heavily doped and lightly doped regions. The second well is disposed in the substrate over the lightly doped region, and has an active region defined by an isolation structure. The first wells are overlapped with the second well. Top ends of the first wells are lower than a bottom end of the second well. The doped regions are separately located in the active region, and have a conductive type opposite to a conductive type of the second well.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: September 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Hsi-Yu Kuo, Yu-Lin Chu
  • Patent number: 11444111
    Abstract: According to an aspect, an image sensor package includes a substrate, an image sensor die coupled to the substrate, and a transparent member including a first surface and a second surface, where the second surface of the transparent member is coupled to the image sensor die via one or more dam members such that an empty space exists between an active area of the image sensor die and the second surface of the transparent member. The image sensor package includes a light blocking member coupled to or defined by the transparent member.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: September 13, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yu-Te Hsieh, I-Lin Chu
  • Patent number: 11430729
    Abstract: Various embodiments of the present application are directed towards a metal-insulator-metal (MIM) capacitor. The MIM capacitor comprises a bottom electrode disposed over a semiconductor substrate. A top electrode is disposed over and overlies the bottom electrode. A capacitor insulator structure is disposed between the bottom electrode and the top electrode. The capacitor insulator structure comprises at least three dielectric structures vertically stacked upon each other. A bottom half of the capacitor insulator structure is a mirror image of a top half of the capacitor insulator structure in terms of dielectric materials of the dielectric structures.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsing-Lien Lin, Cheng-Te Lee, Rei-Lin Chu, Chii-Ming Wu, Yeur-Luen Tu, Chung-Yi Yu
  • Patent number: 11404227
    Abstract: A keyboard device includes a casing and at least one supporting leg. The supporting leg includes a first supporting part, a second supporting part and a pivotal shaft. The supporting leg is pivotally coupled to an accommodation space of the casing through the pivotal shaft. The pivotal shaft is rotatable relative to the casing. Consequently, the supporting leg can be switched between a stored state and a supporting state. When the supporting leg is in the stored state, the supporting leg is accommodated within the accommodation space, and the accommodation space is covered by the first supporting part and the second supporting part. While the supporting leg is switched from the stored state to the supporting state, the first supporting part is pushed into the accommodation space in response to an external force, and the second supporting part is correspondingly moved away from the accommodation space.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: August 2, 2022
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Chun-Lin Chu, Sheng-An Tsai, Hsiang-Yu Ou
  • Patent number: 11335517
    Abstract: A key structure includes a frame member, a keycap and a stabilizer bar. The keycap includes first and second clamping members. The first clamping member includes a first upper stopping part, a first lower stopping part and a first lateral stopping part. The second clamping member includes a second upper stopping part, a second lower stopping part and a second lateral stopping part. The stabilizer bar includes a shaft part, a first leg part and a second leg part. The shaft part is received within a hook of the frame member. The first leg part is received within the first clamping member. The second leg part is received within the second clamping member. The first lateral stopping part is pushed against the first leg part along a first direction. The second lateral stopping part is pushed against the second leg part along a second direction.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: May 17, 2022
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Chun-Lin Chu, Shu-An Huang
  • Publication number: 20220139695
    Abstract: In accordance with some embodiments, a method for processing semiconductor wafer is provided. The method includes introducing a first processing gas of an atomic layer deposition (ALD) process on the semiconductor substrate in a chamber; introducing a second processing gas of the ALD process on the semiconductor substrate in the chamber; creating an exhaust flow from the chamber; monitoring a concentration of the first processing gas of the ALD process in the exhaust flow; in response to the monitored concentration of the first processing gas of the ALD process in the exhaust flow, introducing a cleaning gas into the chamber.
    Type: Application
    Filed: January 6, 2022
    Publication date: May 5, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Rei-Lin CHU, Chih-Ming CHEN, Chung-Yi YU, Yeur-Luen TU