Patents by Inventor Ling Ma

Ling Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10849348
    Abstract: An oil in water (o/w) micro-emulsion comprising: a. water; b. from about 3% up to about 30% oil; c. from about 0.1% up to about 10% lecithin; d. sucrose monoester as an emulsifier wherein the ratio of the combined amount of a lecithin and sucrose monoester to oil is less than 1; e. propylene glycol wherein the propylene glycol to water ratio by weight is greater than 1; and f. from about 14% up to about 40%, by weight, a sugar selected from the group consisting of fructose, glucose, and sucrose, and combinations thereof; wherein the mean droplet size of the o/w micro-emulsion is about 10 to about 80 nm.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: December 1, 2020
    Assignee: Firmenich SA
    Inventors: Ling Ma, Valery Normand, Ronald H. Skiff, Ernst L. Steinboeck
  • Publication number: 20200364090
    Abstract: Implementations of the present specification provide a method, an apparatus, and an electronic device for improving parallel performance of a CPU. The method includes: attempting to acquire data requests that are of a same type and that are allocated to the CPU core; determining a number of requests that are specified by the acquired one or more data requests; and in response to determining that the number of requests is greater than or equal to a maximum degree of parallelism: executing executable codes corresponding to the maximum degree of parallelism, wherein the maximum degree of parallelism is a maximum number of parallel threads executable by the CPU, and wherein the executable codes comprise code programs that are compiled and linked based on the maximum degree of parallelism at a time that is prior to a time of the executing.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Applicant: Alibaba Group Holding Limited
    Inventors: Ling Ma, Wei Zhou, Changhua He
  • Patent number: 10840327
    Abstract: A method of forming a semiconductor device, the method comprises forming a gate trench and a contact trench concurrently in a semiconductor substrate using a patterned masking layer, forming a gate conductive filler in the gate trench, forming a deep body region below the contact trench, and forming a contact conductive filler in the contact trench. The method further comprises forming a gate trench dielectric liner in the gate trench, forming a gate trench dielectric liner in the gate trench, and forming an interlayer dielectric layer (IDL) over the gate conductive filler. The method further comprises forming a contact implant at a bottom of the contact trench, and forming a barrier layer in the contact trench.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: November 17, 2020
    Assignee: Infineon Technologies Americas Corp.
    Inventor: Ling Ma
  • Patent number: 10829436
    Abstract: The invention relates to novel ester compounds of the general formula (I) to a process for preparation thereof and to the use thereof. These ester compounds may contain a mixture of at least two compounds of the general formula (I).
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: November 10, 2020
    Assignees: Klüber Lubrication München SE & CO. KG, Universität Bielefeld
    Inventors: Tobias Betke, Carmen Plass, Harald Gröger, Dirk Loderer, Stefan Seemeyer, Thomas Kilthau, Ling Ma
  • Publication number: 20200350401
    Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.
    Type: Application
    Filed: July 16, 2020
    Publication date: November 5, 2020
    Inventors: Martin Poelzl, Robert Haase, Sylvain Leomant, Maximilian Roesch, Ravi Keshav Joshi, Andreas Meiser, Xiaoqiu Huang, Ling Ma
  • Publication number: 20200335621
    Abstract: The present application relates to a semiconductor transistor device that includes a Schottky diode electrically connected in parallel to a body diode formed between a body region and a drift region. A diode junction of the Schottky diode is formed adjacent to the drift region and is arranged vertically above a lower end of the body region.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Inventor: Ling Ma
  • Patent number: 10790353
    Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: September 29, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Poelzl, Robert Haase, Sylvain Leomant, Maximilian Roesch, Ravi Keshav Joshi, Andreas Meiser, Xiaoqiu Huang, Ling Ma
  • Patent number: 10783004
    Abstract: Implementations of the present specification provide a method, an apparatus, and an electronic device for improving parallel performance of a CPU. The method includes: attempting to acquire data requests that are of a same type and that are allocated to the CPU core; determining a number of requests that are specified by the acquired one or more data requests; and in response to determining that the number of requests is greater than or equal to a maximum degree of parallelism: executing executable codes corresponding to the maximum degree of parallelism, wherein the maximum degree of parallelism is a maximum number of parallel threads executable by the CPU, and wherein the executable codes comprise code programs that are compiled and linked based on the maximum degree of parallelism at a time that is prior to a time of the executing.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: September 22, 2020
    Assignee: Alibaba Group Holding Limited
    Inventors: Ling Ma, Wei Zhou, Changhua He
  • Publication number: 20200285522
    Abstract: Implementations of the present specification provide a method, an apparatus, and an electronic device for improving parallel performance of a CPU. The method includes: attempting to acquire data requests that are of a same type and that are allocated to the CPU core; determining a number of requests that are specified by the acquired one or more data requests; and in response to determining that the number of requests is greater than or equal to a maximum degree of parallelism: executing executable codes corresponding to the maximum degree of parallelism, wherein the maximum degree of parallelism is a maximum number of parallel threads executable by the CPU, and wherein the executable codes comprise code programs that are compiled and linked based on the maximum degree of parallelism at a time that is prior to a time of the executing.
    Type: Application
    Filed: February 19, 2020
    Publication date: September 10, 2020
    Applicant: Alibaba Group Holding Limited
    Inventors: Ling Ma, Wei Zhou, Changhua He
  • Publication number: 20200255803
    Abstract: Provided are an immune cell capable of inducing the secretion of an anti-CD47 antibody when a CAR and/or an exogenous TCR is activated, a use thereof, and a preparation comprising the immune cell. Also provided are a preparation method of the immune cell and a kit for the preparation method.
    Type: Application
    Filed: September 27, 2018
    Publication date: August 13, 2020
    Inventors: Yongliang ZHANG, Liping LIU, Wei CAO, Ling MA, Anyun MA, Jiaping HE, Lianjun SHEN, Xinxin Wang
  • Publication number: 20200226001
    Abstract: Implementations of this specification provide a method, an apparatus, and an electronic device for improving performance of a central processing unit (CPU) comprising a plurality of CPU dies. The method includes the following: enabling threads in each CPU die of the CPU to compete for a mutex of a respective CPU die; identifying the plurality of threads that have obtained the mutexes; enabling the plurality of threads that have obtained the mutexes to compete for a spin lock of the CPU; identifying, from the plurality of threads, a target thread that has obtained the spin lock; executing a critical section corresponding to the target thread that has obtained the spin lock; and releasing the mutex and the spin lock that are obtained by the target thread.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 16, 2020
    Applicant: Alibaba Group Holding Limited
    Inventors: Ling MA, Changhua HE
  • Publication number: 20200203525
    Abstract: A transistor device with a gate electrode in a vertical gate trench is described. The gate electrode includes a silicon gate region and a metal inlay region. The silicon gate region forms at least a section of a sidewall of the gate electrode. The metal inlay region extends up from a lower end of the gate electrode.
    Type: Application
    Filed: December 17, 2019
    Publication date: June 25, 2020
    Inventors: Robert Paul Haase, Jyotshna Bhandari, Heimo Hofer, Ling Ma, Ashita Mirchandani, Harsh Naik, Martin Poelzl, Martin Henning Vielemeyer, Britta Wutte
  • Publication number: 20200185377
    Abstract: A method includes providing a semiconductor substrate having a main surface and a rear surface vertically spaced apart from the main surface, forming a switching device in an active region of the semiconductor substrate, the switching device having electrically conductive gate and field electrodes, forming an intermetal dielectric layer on the main surface over the active region and an inactive region that is laterally spaced apart from the active region, forming a source pad in the first metallization layer over the active region, forming a resistor trench in the inactive region, the resistor trench having a resistance section that is disposed below the main surface, and forming an electrical connection between the source pad and the field electrode that comprises the resistor. The resistor forms an exclusive current path between the source pad and the field electrode.
    Type: Application
    Filed: February 13, 2020
    Publication date: June 11, 2020
    Inventors: Hugo Burke, Kapil Kelkar, Ling Ma
  • Publication number: 20200181117
    Abstract: A substituted 3-heteroaryloxy-1H-pyrazole of the general formula (I) or salt thereof Substituted 3-heteroaryloxy-1H-pyrazoles of the general formula (I) are described, as is their use as herbicides, in particular for controlling broad-leaved weeds and/or weed grasses in crops of useful plants and/or as plant growth regulators for influencing the growth of crops of useful plants described. The present invention also relates to herbicidal and/or plant growth-regulating compositions comprising one or more compounds of the general formula (I).
    Type: Application
    Filed: July 12, 2018
    Publication date: June 11, 2020
    Inventors: Michael Charles MCLEOD, Joerg TIEBES, Ralf BRAUN, Roland ANDREE, Ling MA, Hansjoerg DIETRICH, Anu Bheemaiah MACHETTIRA, Elmar GATZWEILER, Christopher Hugh ROSINGER, Dirk SCHMUTZLER
  • Publication number: 20200172491
    Abstract: The invention relates to substituted 5-(Het-)arylpyrazolamides of general formula (I) and to the their use as herbicides, in particular for controlling weeds and/or weed grasses in crops of useful plants and/or as plant growth regulators for influencing the growth of crops of useful plants. The present invention further relates to herbicidal and/or plant growth-regulating agents comprising one or more of the compounds of general formula (I).
    Type: Application
    Filed: July 12, 2018
    Publication date: June 4, 2020
    Inventors: Joerg TIEBES, Joachim TELSER, Guido BOJACK, Michael Charles McLEOD, Ling MA, Hansjoerg DIETRICH, Elmar GATZWEILER, Anu Bheemaiah MACHETTIRA, Christopher Hugh ROSINGER, Dirk SCHMUTZLER
  • Publication number: 20200152733
    Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 14, 2020
    Inventors: Martin Poelzl, Robert Haase, Sylvain Leomant, Maximilian Roesch, Ravi Keshav Joshi, Andreas Meiser, Xiaoqiu Huang, Ling Ma
  • Publication number: 20200140370
    Abstract: The invention relates to novel ester compounds of the general formula (I) to a process for preparation thereof and to the use thereof. These ester compounds may contain a mixture of at least two compounds of the general formula (I).
    Type: Application
    Filed: April 11, 2018
    Publication date: May 7, 2020
    Inventors: Tobias Betke, Carmen Plass, Harald Gröger, Dirk Loderer, Stefan Seemeyer, Thomas Kilthau, Ling Ma
  • Publication number: 20200134182
    Abstract: Embodiments of the specification provide a method and an apparatus for updating shared data in a multi-core processor environment. The multi-processor environment comprises a multi-core processor. The multi-core processor comprises a plurality of separate processing units (referred to as cores, or core processing units (CPUs) in the specification); the multi-core processor is configured to process a multi-threaded task; the multi-threaded task has shared data to update. The method is executed by any CPU. The method may comprise: requesting, by a first CPU, for a lock to execute a critical section function on the shared data, wherein the lock provides permission to update the shared data, and the critical section function updates the shared data; and setting, by the first CPU if the lock is occupied by a second CPU, a memory index corresponding to the critical section function in a memory of the lock for the second CPU to execute the critical section function based on the memory index.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 30, 2020
    Inventors: Ling MA, Changhua HE
  • Patent number: 10593664
    Abstract: A semiconductor substrate has a main surface, a rear surface, an active device region, and an inactive region adjacent the active device region. Doped source, body, drift and drain regions, and electrically conductive gate and field electrodes are disposed in the active device region. The gate electrode is configured to control an electrical connection between the source and drain regions. The field electrode is adjacent to the drift region. An intermetal dielectric layer is disposed on the main surface, an electrically conductive source pad is formed in a first metallization layer that is formed on the intermetal dielectric layer. A resistor is connected between the source pad and the field electrode. The resistor includes an electrically conductive resistance section that is disposed in a resistor trench. The resistor trench is formed within the inactive region and is electrically isolated from every active device within the active device region.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: March 17, 2020
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Hugo Burke, Kapil Kelkar, Ling Ma
  • Publication number: 20200071256
    Abstract: Ester compounds, such as for use in a lubricant, are based on di-, tri- or higher functional carboxylic acids according to formula (I)
    Type: Application
    Filed: March 26, 2018
    Publication date: March 5, 2020
    Inventors: Stefan Seemeyer, Maximilian Erhard, Thomas Kilthau, Ling Ma