Patents by Inventor Ling Wang

Ling Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11758780
    Abstract: Provided are a display substrate and display apparatus. The display substrate includes a display region and non-display region; base substrate, driving structure layer and wiring layer. The driving structure layer located in the display region includes a first power supply line, data signal line and reference signal line extending along a first direction; the wiring layer located in the non-display region includes a first power supply wiring electrically connected to first power supply line and located on first side of the display region, a data wiring located on second side, different from the first side, of the display region, and a reference wiring located on second side of the display region. For the first power supply line, data signal line and reference signal line with the same length, resistance of first power supply line is greater than that of the data signal line and that of the reference signal line.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: September 12, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Pan Xu, Yicheng Lin, Ling Wang, Guoying Wang, Xing Zhang, Ying Han
  • Patent number: 11746125
    Abstract: The present disclosure provides peptides comprising a motif having four amino acids, wherein each of the amino acids at N-terminus and C-terminus of the sequence independently has a same or different positively charged side chain, and each of the amino acids between the N-terminal and C-terminal of the motif independently has a same or different uncharged side chain. The present disclosure surprisingly found that these peptides have advantageous effects in inhibiting or decreasing collagen breakdown, increasing production of collagen, elastin and/or hyaluronic acid, retarding aging, improving skin and inhibiting inflammation.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: September 5, 2023
    Assignee: TCI CO., LTD.
    Inventors: Yung-Hsiang Lin, Yu-Ling Wang
  • Publication number: 20230272109
    Abstract: Provided are an antibody targeting Claudin 18.2, an antibody-drug conjugate, and use thereof in treatment of cancer. Also provided are a nucleotide encoding the Claudin 18.2 antibody, a polynucleotide combination, an expression vector, an expression vector combination, a pharmaceutical composition comprising the Caudill 18.2 antibody and the antibody-drug conjugate, and an application thereof in preparation of a medication for treatment or prevention of cancer.
    Type: Application
    Filed: May 7, 2022
    Publication date: August 31, 2023
    Inventors: Jianmin FANG, Yuanhao LI, Marie M. ZHU, Jing JIANG, Yuelei SHEN, Shenjun LI, Wenting LUO, Xiaoping ZHANG, Lili WANG, Ling WANG, Qinbin ZHANG, Fang YANG
  • Patent number: 11739382
    Abstract: Methods for the rapid detection of the presence or absence of Hepatitis B Virus (HBV) in a biological or non-biological sample are described. The methods can include performing an amplifying step, a hybridizing step, and a detecting step. Furthermore, primers, competitive blocking oligonucleotides, and probes targeting HBV (in particular HBV RNA, in particular, HBV RNA transcribed from cccDNA, such as pgRNA) and kits are provided that are designed for the detection of HBV (in particular HBV RNA, in particular, HBV RNA transcribed from cccDNA, such as pgRNA).
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: August 29, 2023
    Assignee: Roche Molecular Systems, Inc.
    Inventors: Jeffery Fong, Aaron T. Hamilton, Marintha Heil, Igor Kozlov, Ed Gustavo Marins, Elizabeth Marie Scott, Ling Wang
  • Patent number: 11730035
    Abstract: Provided are a display substrate, a manufacturing method thereof and a display device. The display substrate includes a base and a plurality of subpixels arranged on the base in an array form. Each subpixel includes a light-emitting element, a subpixel driving circuitry coupled to the light-emitting element, and a light-emission detection circuitry configured to detect luminescence of light emitted by the light-emitting element. The light-emission detection circuitry includes a first control transistor and a PIN-type photodiode laminated in that order in a direction away from the base, a first electrode of the first control transistor is coupled to a cathode of the PIN-type photodiode, and an orthogonal projection of the first control transistor onto the base at least partially overlaps an orthogonal projection of the PIN-type photodiode onto the base. The display substrate provided by the present disclosure is used for display.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: August 15, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ling Wang, Yicheng Lin, Guoying Wang, Ying Han
  • Publication number: 20230252933
    Abstract: A shift register, a gate driving circuit, and a display panel. The shift register includes a first input module, a second input module, a first output module, a second output module, a first output control module, and a second output control module, where the first input module is configured to control the potential of a first node according to a first start signal and a first clock signal, the second input module is configured to control the potential of a second node according to a second start signal and the first clock signal, and the second start signal and the first start signal have opposite potentials; the first output module includes a first coupling unit configured to couple the potential of a third node according to the potential of a first output terminal in the case where the potential of the first output terminal jumps.
    Type: Application
    Filed: April 13, 2023
    Publication date: August 10, 2023
    Applicant: YUNGU (GU’AN) TECHNOLOGY CO., LTD.
    Inventors: Enqing GUO, Junfeng LI, Cuili GAI, Ling WANG
  • Patent number: 11723178
    Abstract: Disclosed are a power grid-friendly control method and system for a data center cooling system. The method includes: dividing an equipment room into a plurality of pieces of subspace in advance, with a plurality of servers and a cooling device comprised in each piece of subspace; obtaining total power consumption of the servers in each piece of subspace; performing priority sorting on the total power consumption of the servers in each piece of subspace; obtaining a real-time power supply energy consumption value of a power grid; determining, whether an energy supply is sufficient; and if the energy supply is sufficient, skipping turning off the cooling device in the subspace; or if the energy supply is not sufficient, turning off a cooling device, till it is determined that the energy supply is sufficient, thus minimizing impact of turning off the cooling system on stability.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: August 8, 2023
    Assignees: State Grid Jiangsu Electric Power Co., Ltd. Information & Telecommunication Branch, State Grid Jiangsu Electric Power Co., Ltd.
    Inventors: Haodong Zou, Mingming Zhang, Ling Zhuang, Fei Xia, Jinling He, Guoquan Yuan, Zheng Lou, Ran Zhao, Lei Fan, Xinwen Shan, Yuanhan Du, Ming Tang, Ling Wang, Linjiang Shang
  • Patent number: 11715532
    Abstract: A risk assessment method based on data priority, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a query command from a host system; in response to the query command, performing a data health detection on a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module stores data with multiple data priorities; generating risk assessment information according to a detection result, wherein the risk assessment information reflects a health degree of data with different data priorities in the rewritable non-volatile memory modules by different risk levels; and transmitting the risk assessment information to the host system.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: August 1, 2023
    Assignee: Hefei Core Storage Electronic Limited
    Inventors: Chih-Ling Wang, Yue Hu, Qin Qin Tao, Dong Sheng Rao, Shao Feng Yang, Yang Chen
  • Publication number: 20230231035
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first recess and a second recess are formed in a first region and a second region of a semiconductor substrate, respectively. A bottom surface of the first recess is lower than a bottom surface of the second recess in a vertical direction. A first gate oxide layer and a second gate oxide layer are formed concurrently. At least a portion of the first gate oxide layer is formed in the first recess, and at least a portion of the second gate oxide layer is formed in the second recess. A removing process is performed for removing a part of the second gate oxide layer. A thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer after the removing process.
    Type: Application
    Filed: February 17, 2022
    Publication date: July 20, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Lun Huang, Chia-Ling Wang, Chia-Wen Lu, Ta-Wei Chiu, Ping-Hung Chiang
  • Publication number: 20230223306
    Abstract: Semiconductor device and method of fabricating the same, the semiconductor device includes a substrate, a first transistor, a second transistor, a third transistor, and a plurality of shallow trench isolations. The first transistor is disposed in a medium-voltage region and includes a first plane, a first gate dielectric layer, and a first gate electrode. The second transistor is disposed in a boundary region and includes a second plane, a second gate dielectric layer, and a second gate electrode. The third transistor is disposed in a lower-voltage region and includes a third plane, a third gate dielectric layer, and a third gate electrode. The shallow trench isolations are disposed in the substrate, wherein top surfaces of the shallow trench isolations in the medium-voltage region, the boundary region and the low-voltage region are coplanar with top surfaces of the first gate dielectric layer and the second gate dielectric layer.
    Type: Application
    Filed: February 15, 2022
    Publication date: July 13, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ta-Wei Chiu, Ping-Hung Chiang, Chia-Wen Lu, Chia-Ling Wang, Wei-Lun Huang
  • Publication number: 20230207620
    Abstract: A semiconductor structure includes a substrate having a first device region and a second device region in proximity to the first device region. A trench isolation structure is disposed in the substrate between the first device region and the second device region. The trench isolation structure includes a first bottom surface within the first device region and a second bottom surface within the second device region. The first bottom surface is coplanar with the second bottom surface.
    Type: Application
    Filed: January 18, 2022
    Publication date: June 29, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Ling Wang, Ping-Hung Chiang, Wei-Lun Huang, Chia-Wen Lu, Ta-Wei Chiu
  • Patent number: 11688178
    Abstract: The embodiments of the present disclosure provide a system for calculating a regional crowd movement and a method thereof. The system is applied to a target monitoring environment, a plurality of key travel nodes are planned in the target monitoring environment, and the system includes radio frequency labels deployed on pedestrians, calculation apparatuses deployed at the key travel nodes and a plurality of directional antennas. The directional antenna is configured to, when driven by the calculation apparatus, send a read-write signal to the radio frequency label in a coverage region; the directional antenna is further configured to forward a radio frequency signal simultaneously reflected by the radio frequency label at the time of obtaining the read-write signal to the calculation apparatus; the calculation apparatus is configured to, based on a tempo-spatial distribution circumstance of the radio frequency signals in the region.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: June 27, 2023
    Assignees: China Construction First Group Corporation Limited, China Construction First group Huabei Construction Co., Ltd., Lanjian (Suzhou) Technology Co., Ltd
    Inventors: Lei Chen, Wei Xu, Zhiyu Zhao, Ruoxuan Mei, Weiyu Su, Ziqi Zhou, Zhengang Zhao, Yuze Wang, Yanting He, Xiaojiao Xiao, Guoxu Zhang, Jing Tong, Le Wang, Ling Wang, Zijin Liao
  • Publication number: 20230191735
    Abstract: A method of manufacturing a multicolor shoe material includes the following steps. Step S1: blank molds are provided, and a mold chamber of each of the blank molds is injected by one of the foamed materials in different colors to form unfoamed semi-finished products in different colors. Step S2: the semi-finished products are put into a foaming mold, when the foaming mold is preheated and completely closed, a ratio of a total volume of the semi-finished products to a volume of the mold chamber of the foaming mold is ranged between 0.96 and 1.04. Thus, the semi-finished products could be evenly foamed. After foaming, adjacent two of the semi-finished products could be connected by heat fusion to obtain the multicolor shoe material. Additionally, a semi-finished product and a multicolor shoe material are provided in the present invention.
    Type: Application
    Filed: April 13, 2022
    Publication date: June 22, 2023
    Inventors: Yi-Liang Chen, Pao-Ling Wang
  • Publication number: 20230189924
    Abstract: A method of manufacturing the foamed shoe material and semi-finished product including the following steps. Step S1: a foamable material is injected into a cavity of a blank mold to solidify, thereby generating a semi-finished product of the shoe material and a runner waste that are unfoamed. The runner waste could be shed for reusing directly as the foamable material without a granulating process. Step S2: the semi-finished product is cooled down and put into a cavity of the foaming mold, and the semi-finished product is evenly foamed in the cavity of the foaming mold to obtain a shoe material wherein the waste generated during the method of manufacturing the foamed shoe material could be effectively reused, and the yield rate of the shoe material thereby enhanced.
    Type: Application
    Filed: April 28, 2022
    Publication date: June 22, 2023
    Inventors: Yi-Liang Chen, Pao-Ling Wang
  • Patent number: 11674133
    Abstract: Methods and compositions for extracting nucleic acids such as microRNAs (miRNAs) from biological samples are provided. Aspects of the methods include contacting a biological sample with proteinase K followed by contact with ferric oxide particles under acidic conditions to induce binding between the ferric oxide particles and nucleic acids (e.g., miRNAs) of the sample. In some cases, the ferric oxide particles are provided as part of a dissolvable film, which releases the ferric oxide particles upon solvation. In some embodiments, after nucleic acids bind to the ferric oxide particles, the particles are magnetically separated from the sample and are contacted with an alkaline elution buffer to release the nucleic acids.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: June 13, 2023
    Assignee: BECTON, DICKINSON AND COMPANY
    Inventors: Eric P. Dixon, John Joseph Harrington, Yutao Chen, Nikhil Rao, Ling Wang
  • Publication number: 20230174660
    Abstract: This disclosure provides therapeutic methods for treating cancer including combination therapy with a multimeric anti-DR5 antibody and a cancer therapy, e.g., radiation, an anthracycline, a folic acid analog, a platinum-based agent, a taxane, a topoisomerase II inhibitor, a SMAC mimetic, a vinca alkaloid, a Brutons tyrosine kinase (BTK) inhibitor, a phosphoinositide 3-kinase delta (PI3K?) inhibitor, a myeloid cell leukemia-1 (Mcl-1) inhibitor, or any combination thereof.
    Type: Application
    Filed: May 12, 2021
    Publication date: June 8, 2023
    Inventors: Beatrice WANG, Thomas J. MATTHEW, Eric William HUMKE, Angus SINCLAIR, Daniel S. CHEN, Bruce Alan KEYT, Ling WANG
  • Publication number: 20230152820
    Abstract: An automated guided vehicle (AGV) scheduling method is disclosed. All the possible paths of the current AGV are calculated using the A* search algorithm. Time windows information tables are calculated according to shortest paths. Time windows of executed tasks are compared to find optimal paths. Types of conflicts are determined and priorities of the AGVs are modified and the time window information tables are updated according to the comparison result. When an obstacle is detected or the current AGV is malfunctioning, abnormal issues are dynamically processed and the time window information tables of the tasks are modified as the current AGV reaches a target workstation.
    Type: Application
    Filed: November 29, 2021
    Publication date: May 18, 2023
    Inventors: TAO-NIAN HUANG, LIU-LING WANG
  • Publication number: 20230146528
    Abstract: A display substrate, a display panel, and a display device are provided. The display substrate includes a substrate, a plurality of sub-pixels located on the substrate, a plurality of driving circuits and a plurality of light sensors, an orthographic projection of the light sensors on the substrate is within a range of an orthographic projection of the driving circuits on the substrate.
    Type: Application
    Filed: January 11, 2021
    Publication date: May 11, 2023
    Inventors: Ying HAN, Yicheng LIN, Ling WANG, Pan XU, Guoying WANG, Xing ZHANG
  • Publication number: 20230147375
    Abstract: A display substrate having a plurality of subpixels is provided. A respective one of the plurality of subpixels includes alight emitting element; a first thin film transistor configured to driving light emission of the light emitting element; and a light emitting brightness value detector. The light emitting brightness value detector includes a second thin film transistor; and a photosensor electrically connected to the second thin film transistor and configured to detect a light emitting brightness value. The display substrate further includes a silicon organic glass layer on a side of at least one of the first thin film transistor or the second thin film transistor away from a base substrate; and the photosensor is on a side of the silicon organic glass layer away from the base substrate.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 11, 2023
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Guoying Wang, Yicheng Lin, Ling Wang, Zhen Song, Pan Xu, Xing Zhang, Ying Han, Zhan Gao
  • Patent number: D995031
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: August 15, 2023
    Assignee: McCain Foods Limited
    Inventors: Wei Zhang, Hao Wang, Ling Wang