Abstract: An patterned Si substrate-based LED epitaxial wafer and a preparation method therefor, the LED epitaxial wafer comprising: a patterned Si substrate (1) and an Al2O3 coating (2) growing on the patterned Si substrate (1); sequentially growing on the Al2O3 coating (2) are a nucleating layer (3), a first buffer layer (4), a first insertion layer (5), a second buffer layer (6), a second insertion layer (7), an n-GaN layer (8), a quantum well layer (9), a p-GaN layer (10), an n-electrode (14) electrically connected to the n-GaN layer and a p-electrode (13) electrically connected to the p-GaN layer. The present invention is suitable for the preparation of large-sized LED epitaxial wafers. Furthermore, the crystal quality is improved, and the light extraction efficiency of the LED die is improved.

Abstract: A fan-out circuit structure, a display panel, and a display device are provided. The fan-out circuit structure includes: a first metal layer, a second metal layer, and a third metal layer, wherein the first metal layer includes a first metal sub-layer and a second metal sub-layer; the third metal layer includes a third metal sub-layer and a fourth metal sub-layer; the first metal sub-layer is connected with a first end of the second metal layer through the third metal sub-layer; and a second end of the second metal layer is connected with the second metal sub-layer through the fourth metal sub-layer.

Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.

Abstract: The embodiment of the present invention provides a data voltage adjusting method of a liquid crystal display panel, comprising: obtaining a total variation amount of data voltages on all data lines in the liquid crystal display panel; calculating a maximum variation amount of the data voltages corresponding to a horizontal crosstalk index according to the horizontal crosstalk index of the liquid crystal display panel; determining whether an absolute value of the total variation amount of the data voltages is larger than an absolute value of the maximum variation amount of the data voltages corresponding to the horizontal crosstalk index; if yes, implementing a data voltage adjustment to data lines, in which with data voltages having variations in the liquid crystal display panel according to the total variation amount of the data voltages. The embodiment of the present invention further provides a data voltage adjusting device of a liquid crystal display panel.

Abstract: An array substrate includes multiple gate lines, multiple data lines, and multiple light-shielding electrode lines. The multiple gate lines and the multiple data lines intersect each other to circumferentially delimit a plurality of sub pixels. The multiple light-shielding electrode lines are arranged to correspond to the multiple data lines. The plurality of sub pixels includes a blue sub pixel column corresponding to a blue color filter. At least one sub pixel of the blue sub pixel column includes a light-shielding electrode. The light-shielding electrode is connected to light-shielding electrode lines that are located on two opposite sides of the blue sub pixel column. Displaying abnormality that occurs in displaying pure blue or pure yellow images can be avoided. Also provided is a display panel.

Abstract: A thin film transistor array substrate and a display panel are provided. A parasitic capacitor is formed from a common line and a data line, and a capacitance value of the parasitic capacitor formed from the data line connected to the connecting line with a larger resistance value and the corresponding common line is less than that of the parasitic capacitor formed from the data line connected to the connecting line with a smaller resistance value and the corresponding common line. Thus the displayed image bright stripes with inconsistent brightness can be avoided from appearing.

Abstract: The present application provides an array substrate, which comprises a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, and a plurality of conductive members. In each of the pixel regions, a control terminal of the TFT is electrically connected with the gate line, an input terminal of the TFT is electrically connected with the data line, and an output terminal of the TFT is electrically connected with the pixel electrode. The output terminal comprises a body, and a first contact and a second contact which are connected with the body. The first contact and one of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other. The second contact and another of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other.

Abstract: An array substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes a common electrode, a first insulation layer, a sub pixel electrode, a second insulation layer, and a conductor plate that are sequentially stacked. The conductor plate is electrically connected to the common electrode. The common electrode and the sub pixel electrode collectively form therebetween a first confronting area and the conductor plate and the sub pixel electrode collectively form therebetween a second confronting area, such that a storage capacitor is formed, collectively, between the common electrode and the sub pixel electrode and between the conductor plate and the sub pixel electrode. The above-described array substrate provides a relatively large storage capacitor. Also disclosed is a display panel.

Abstract: A display panel includes a plurality of pixel units arranged in an array and each including a light transmitting zone and a light shielding zone arranged on a circumference of the light transmitting zone. The display panel includes a first substrate and a second substrate opposite to each other. The first substrate includes a black matrix and a first common electrode covering the black matrix. The black matrix is arranged in the light shielding zone. The second substrate includes a plurality of main pixel electrodes, which correspond, in a one-to-one manner, to the pixel units and face exactly to the light transmitting zones. In each individual pixel unit, the black matrix has edges facing the light transmitting zone and provided with notches. The first common electrode has a first portion that covers the notches and flush with a second portion thereof located in the light transmitting zone.

Abstract: A mask is provided for fabrication of a common electrode on an array substrate and includes a central portion, a first portion, and a second portion. The first portion is connected to the central portion and extends in a first direction. The second portion is connected to the central portion and extends in a second direction. The first direction and the second direction intersect each other. A first notch is formed in an interfacing site of the first portion and the central portion. A second notch is formed in an interfacing site of the second portion and the central portion. The second notch is connected to and in communication with the first notch to collectively form a first recessed zone. The mask helps reduce the potential risk of displaying defects appearing in a liquid crystal display panel using the array substrate.

Abstract: A liquid crystal panel includes a plurality of color resist blocks and a plurality of spacers arranged at one side of the color resist blocks. Each color resist block includes a first zone and a second zone arranged in sequence in the first direction. The plurality of color resist blocks include a first color resist block, a second color resist block, and a third color resist block arranged in sequence in the first direction. The first zone of the third color resist block is formed with a first through hole. The third color resist block includes a first extension extending from the second zone of the third color resist block in a first direction. The plurality of spacers include a first spacer, which is set at a location corresponding to and the first extension section or the second zone of the third color resist block.

Abstract: Data includes data with labels and data without labels. For data without labels a fuzzy rules system assigns pseudo labels. A computer processes the data with labels using a first cognitive neural network; processes the data with pseudo labels using a second cognitive neural network; and produces system outcomes by combining the results of the first and second cognitive neural networks. The computer obtains feedback on the system outcomes, and modifies parameters of the fuzzy rule system in response to the feedback.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: a substrate, a bonding metal layer, a reflective layer, a first conductive layer, an active layer, a second conductive layer, first electrode(s) and second electrode(s). The first electrode(s) extends, from one side of the bonding metal layer away from the substrate, to the first conductive layer, to be connected with the bonding metal layer and the first conductive layer. The second electrode(s) penetrates through the substrate and the bonding metal layer to be in contact with the reflective layer. The semiconductor device, forming a structure sharing the first conductive layer, has more uniform illumination and a higher light extraction rate, and eliminates interferences between pixel units, achieves better uniformity of emitted light wavelength and makes distribution of electric current flowing through different pixel units more even.

Abstract: The present disclosure provides a liquid crystal display panel composed of red pixel units, green pixel units and blue pixel units that are arranged in the form of matrix. Every adjacent two rows of pixel units form a pixel-unit group. Polarities of pixel units located at the same column in the same pixel-unit group are the same, and polarities of pixel units located at the same column in adjacent two pixel-unit groups are opposite, thus solving problem of color shift at large viewing angles. Polarities of adjacent red pixel units in each row of pixel units are alternately changed and polarities of adjacent blue pixel units in each row of the pixel units are alternately changed to alleviate grainy effect generated on the entire display image, thereby display effect is greatly enhanced. The present disclosure also provides a liquid crystal display device having the liquid crystal display panel.

Abstract: The invention includes a method including the steps of obtaining a plurality of images, each of the images in the plurality having at least one corresponding region, generating a merged image, the merged image also having the corresponding region. The step of generating includes selecting an image source from the plurality of images to source image data for the corresponding region in the merged image by comparing attributes of the corresponding regions of the plurality of images to identify the image source having preferred attributes.

Abstract: A semiconductor light-emitting device comprises: an insulating base, a current diffusion layer, light-emitting structure layers and an insulating layer. The current diffusion layer includes: a first electrode connecting part, a second electrode connecting part, N contact parts and N+1 flat parts. N+1 light-emitting structure layers are correspondingly disposed on the N+1 flat parts, and each of the N+1 light-emitting structure layers includes: a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked on a corresponding flat part. N grooves are formed on a side of the second semiconductor layer away from the active layer, depth of the N grooves is less than the thickness of the second semiconductor layer, and the N contact parts correspond to the N grooves.

Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.

Abstract: A liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal layer interposed therebetween. The array substrate includes scan lines and data lines insulated from the scan lines and arranged mutually perpendicular to each other to define pixels that are arranged in an array. Each pixel includes a thin-film transistor and a pixel electrode connected to the thin-film transistor. The thin-film transistor is connected to one of the data lines and one of the scan lines corresponding thereto. A separation zone is formed between adjacent ones of the pixel electrodes. The thin-film transistor and the scan line are arranged in the separation zone. The pixels further comprise a transparent wiring line arranged along an outer circumference of the scan line. The transparent wiring line is supplied with an electrical voltage that is a common voltage of the array substrate.

Abstract: A liquid crystal pixel circuit and a liquid crystal display device are provided. The liquid crystal pixel circuit has a plurality of pixels, and each of the pixels comprises a first pixel area, a second pixel area, and a capacitor coupling module; wherein when the scanning line is turned on, the first pixel area and the second pixel area are charged to a first potential value; and when a second one of the scanning lines is turned on, the first pixel area is charged to a second potential value and the second pixel area is charged to a third potential value.

Abstract: A fan-out circuit structure, a display panel, and a display device are provided. The fan-out circuit structure includes: a first metal layer, a second metal layer, and a third metal layer, wherein the first metal layer includes a first metal sub-layer and a second metal sub-layer; the third metal layer includes a third metal sub-layer and a fourth metal sub-layer; the first metal sub-layer is connected with a first end of the second metal layer through the third metal sub-layer; and a second end of the second metal layer is connected with the second metal sub-layer through the fourth metal sub-layer.