Abstract: An array substrate includes multiple gate lines, multiple data lines, and multiple light-shielding electrode lines. The multiple gate lines and the multiple data lines intersect each other to circumferentially delimit a plurality of sub pixels. The multiple light-shielding electrode lines are arranged to correspond to the multiple data lines. The plurality of sub pixels includes a blue sub pixel column corresponding to a blue color filter. At least one sub pixel of the blue sub pixel column includes a light-shielding electrode. The light-shielding electrode is connected to light-shielding electrode lines that are located on two opposite sides of the blue sub pixel column. Displaying abnormality that occurs in displaying pure blue or pure yellow images can be avoided. Also provided is a display panel.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: a substrate, a bonding metal layer, a reflective layer, a first conductive layer, an active layer, a second conductive layer, first electrode(s) and second electrode(s). The first electrode(s) extends, from one side of the bonding metal layer away from the substrate, to the first conductive layer, to be connected with the bonding metal layer and the first conductive layer. The second electrode(s) penetrates through the substrate and the bonding metal layer to be in contact with the reflective layer. The semiconductor device, forming a structure sharing the first conductive layer, has more uniform illumination and a higher light extraction rate, and eliminates interferences between pixel units, achieves better uniformity of emitted light wavelength and makes distribution of electric current flowing through different pixel units more even.

Abstract: The present invention discloses a wind noise prevention microphone and an earphone cable control apparatus. The microphone comprises: a microphone chamber enclosed by a bottom and a first side wall; a microphone unit arranged inside the microphone chamber and of which a sound pick-up hole of the microphone unit is arranged opposite to the bottom, a set gap being arranged between the sound pick-up hole and the bottom; and a sound channel in communication with the sound pick-up hole and an outer space, and led out of the first side wall. The sound channel of the microphone is arranged on a side of the sound pick-up hole of the microphone, other than directly opposite to the sound pick-up hole of the microphone, which can effectively reduce wind noise and improve the sound pick-up quality.

Abstract: A liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal layer interposed therebetween. The array substrate includes scan lines and data lines insulated from the scan lines and arranged mutually perpendicular to each other to define pixels that are arranged in an array. Each pixel includes a thin-film transistor and a pixel electrode connected to the thin-film transistor. The thin-film transistor is connected to one of the data lines and one of the scan lines corresponding thereto. A separation zone is formed between adjacent ones of the pixel electrodes. The thin-film transistor and the scan line are arranged in the separation zone. The pixels further comprise a transparent wiring line arranged along an outer circumference of the scan line. The transparent wiring line is supplied with an electrical voltage that is a common voltage of the array substrate.

Abstract: The present application provides an array substrate, which comprises a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, and a plurality of conductive members. In each of the pixel regions, a control terminal of the TFT is electrically connected with the gate line, an input terminal of the TFT is electrically connected with the data line, and an output terminal of the TFT is electrically connected with the pixel electrode. The output terminal comprises a body, and a first contact and a second contact which are connected with the body. The first contact and one of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other. The second contact and another of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other.

Abstract: An array substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes a common electrode, a first insulation layer, a sub pixel electrode, a second insulation layer, and a conductor plate that are sequentially stacked. The conductor plate is electrically connected to the common electrode. The common electrode and the sub pixel electrode collectively form therebetween a first confronting area and the conductor plate and the sub pixel electrode collectively form therebetween a second confronting area, such that a storage capacitor is formed, collectively, between the common electrode and the sub pixel electrode and between the conductor plate and the sub pixel electrode. The above-described array substrate provides a relatively large storage capacitor. Also disclosed is a display panel.

Abstract: A display panel includes a plurality of pixel units arranged in an array and each including a light transmitting zone and a light shielding zone arranged on a circumference of the light transmitting zone. The display panel includes a first substrate and a second substrate opposite to each other. The first substrate includes a black matrix and a first common electrode covering the black matrix. The black matrix is arranged in the light shielding zone. The second substrate includes a plurality of main pixel electrodes, which correspond, in a one-to-one manner, to the pixel units and face exactly to the light transmitting zones. In each individual pixel unit, the black matrix has edges facing the light transmitting zone and provided with notches. The first common electrode has a first portion that covers the notches and flush with a second portion thereof located in the light transmitting zone.

Abstract: A carburized La2O3 and Lu2O3 co-doped Mo filament cathode is made from lanthanum oxide (La2O3) and lutetium oxide (Lu2O3) doped molybdenum (Mo) powders, the lanthanum oxide (La2O3) and lutetium oxide (Lu2O3) doped molybdenum (Mo) powders contain La2O3, Lu2O3 and Mo with the total concentration of La2O3 and Lu2O3 being 2.0-5.0 wt. % and the rest being Mo.

Abstract: Embodiments of the present disclosure describe a method of fabricating a semiconducting material, comprising fixing a first substrate to a second substrate via a bonding material sufficient to form a two-substrate support with a cavity region, applying an organo-lead halide perovskite precursor solution to the cavity region of the two-substrate support, and annealing sufficient to form in the cavity region a semiconducting material including an organo-lead halide perovskite thin single crystal. Embodiments of the present disclosure further describe a transistor comprising a source terminal, a drain terminal, a channel layer extending between the source terminal and the drain terminal and including an organo-lead halide perovskite thin single crystal, a gate terminal, and an insulating layer separating the gate terminal from the source terminal, drain terminal, and channel layer sufficient to form a transistor.

Abstract: Provided is a method for improving the corrosion resistance of a gold finger, which is applicable to a photovoltaic panel (1) including gold fingers (2), wherein a guide line (3) is arranged at a root portion of the gold fingers (2) of the photovoltaic panel (1). The method comprises the following steps in sequence: 1) electrical connection: using an outer lead (4) to electrically connect all gold fingers (2) of a photovoltaic panel (1); 2) solder resistance: performing solder resistance on an area other than the outer lead (4); 3) gold plating on the gold fingers (2); 4) etching of the outer lead (4); and 5) solder resistance: performing solder resistance on a vacancy after etching of the lead (4). In the method, an outer lead (4) is arranged to electrically connect all gold fingers (2) of a photovoltaic panel (1), so that all sides of the gold fingers (2) are plated with gold, thereby significantly improving the corrosion resistance of the gold fingers (2).

Abstract: An array substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes a common electrode, a first insulation layer, a sub pixel electrode, a second insulation layer, and a conductor plate that are sequentially stacked. The conductor plate is electrically connected to the common electrode. The common electrode and the sub pixel electrode collectively form therebetween a first confronting area and the conductor plate and the sub pixel electrode collectively form therebetween a second confronting area, such that a storage capacitor is formed, collectively, between the common electrode and the sub pixel electrode and between the conductor plate and the sub pixel electrode. The above-described array substrate provides a relatively large storage capacitor. Also disclosed is a display panel.

Abstract: The present disclosure provides a liquid crystal display panel composed of red pixel units, green pixel units and blue pixel units that are arranged in the form of matrix. Every adjacent two rows of pixel units form a pixel-unit group. Polarities of pixel units located at the same column in the same pixel-unit group are the same, and polarities of pixel units located at the same column in adjacent two pixel-unit groups are opposite, thus solving problem of color shift at large viewing angles. Polarities of adjacent red pixel units in each row of pixel units are alternately changed and polarities of adjacent blue pixel units in each row of the pixel units are alternately changed to alleviate grainy effect generated on the entire display image, thereby display effect is greatly enhanced. The present disclosure also provides a liquid crystal display device having the liquid crystal display panel.

Abstract: An patterned Si substrate-based LED epitaxial wafer and a preparation method therefor, the LED epitaxial wafer comprising: a patterned Si substrate (1) and an Al2O3 coating (2) growing on the patterned Si substrate (1); sequentially growing on the Al2O3 coating (2) are a nucleating layer (3), a first buffer layer (4), a first insertion layer (5), a second buffer layer (6), a second insertion layer (7), an n-GaN layer (8), a quantum well layer (9), a p-GaN layer (10), an n-electrode (14) electrically connected to the n-GaN layer and a p-electrode (13) electrically connected to the p-GaN layer. The present invention is suitable for the preparation of large-sized LED epitaxial wafers. Furthermore, the crystal quality is improved, and the light extraction efficiency of the LED die is improved.

Abstract: A fan-out circuit structure, a display panel, and a display device are provided. The fan-out circuit structure includes: a first metal layer, a second metal layer, and a third metal layer, wherein the first metal layer includes a first metal sub-layer and a second metal sub-layer; the third metal layer includes a third metal sub-layer and a fourth metal sub-layer; the first metal sub-layer is connected with a first end of the second metal layer through the third metal sub-layer; and a second end of the second metal layer is connected with the second metal sub-layer through the fourth metal sub-layer.

Abstract: A method is presented for creating an asymmetrical split-gate structure. The method includes forming a first device, forming a second device, forming a first gate stack between a first set of spacers of the first device, and a second gate stack between a second set of spacers of the second device. The method further includes depositing a hard mask over the first and second gate stacks, etching a first section of the first gate stack to create a first gap and a second section of the second gate stack to create a second gap, and forming a third gate stack within the first gap of the first gate stack and within the second gap of the second gate stack such that dual gate stacks are defined for each of the first and second devices. The method further includes annealing the dual gate stacks to form replacement metal gate stacks.

Abstract: The embodiment of the present invention provides a data voltage adjusting method of a liquid crystal display panel, comprising: obtaining a total variation amount of data voltages on all data lines in the liquid crystal display panel; calculating a maximum variation amount of the data voltages corresponding to a horizontal crosstalk index according to the horizontal crosstalk index of the liquid crystal display panel; determining whether an absolute value of the total variation amount of the data voltages is larger than an absolute value of the maximum variation amount of the data voltages corresponding to the horizontal crosstalk index; if yes, implementing a data voltage adjustment to data lines, in which with data voltages having variations in the liquid crystal display panel according to the total variation amount of the data voltages. The embodiment of the present invention further provides a data voltage adjusting device of a liquid crystal display panel.

Abstract: An array substrate includes multiple gate lines, multiple data lines, and multiple light-shielding electrode lines. The multiple gate lines and the multiple data lines intersect each other to circumferentially delimit a plurality of sub pixels. The multiple light-shielding electrode lines are arranged to correspond to the multiple data lines. The plurality of sub pixels includes a blue sub pixel column corresponding to a blue color filter. At least one sub pixel of the blue sub pixel column includes a light-shielding electrode. The light-shielding electrode is connected to light-shielding electrode lines that are located on two opposite sides of the blue sub pixel column. Displaying abnormality that occurs in displaying pure blue or pure yellow images can be avoided. Also provided is a display panel.

Abstract: A thin film transistor array substrate and a display panel are provided. A parasitic capacitor is formed from a common line and a data line, and a capacitance value of the parasitic capacitor formed from the data line connected to the connecting line with a larger resistance value and the corresponding common line is less than that of the parasitic capacitor formed from the data line connected to the connecting line with a smaller resistance value and the corresponding common line. Thus the displayed image bright stripes with inconsistent brightness can be avoided from appearing.

Abstract: The present application provides an array substrate, which comprises a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, a plurality of pixel electrodes, and a plurality of conductive members. In each of the pixel regions, a control terminal of the TFT is electrically connected with the gate line, an input terminal of the TFT is electrically connected with the data line, and an output terminal of the TFT is electrically connected with the pixel electrode. The output terminal comprises a body, and a first contact and a second contact which are connected with the body. The first contact and one of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other. The second contact and another of the conductive members extending into the pixel region are overlapping-disposed and insulated from each other.

Abstract: An array substrate includes a plurality of pixel units arranged in an array. Each of the pixel units includes a common electrode, a first insulation layer, a sub pixel electrode, a second insulation layer, and a conductor plate that are sequentially stacked. The conductor plate is electrically connected to the common electrode. The common electrode and the sub pixel electrode collectively form therebetween a first confronting area and the conductor plate and the sub pixel electrode collectively form therebetween a second confronting area, such that a storage capacitor is formed, collectively, between the common electrode and the sub pixel electrode and between the conductor plate and the sub pixel electrode. The above-described array substrate provides a relatively large storage capacitor. Also disclosed is a display panel.