Abstract: Provided are a semiconductor structure and a preparation method thereof. The semiconductor structure includes a substrate, a buffer layer located on the substrate and a light-emitting structure located on a side of the buffer layer away from the substrate. The buffer layer includes a first region and a second region surrounding the first region. The semiconductor structure further includes a photoresist structure. The photoresist structure is formed by selectively etching the second region of the buffer layer, and the photoresist structure is configured to suppress lateral propagation of light emitted by the light-emitting structure. The light-emitting structure includes a light-emitting unit, and the light-emitting unit is disposed corresponding to the first region.

Abstract: Provided is a method of manufacturing a semiconductor structure. The method includes: providing a substrate, where the substrate includes a plurality of component areas and peripheral areas surrounding the plurality of component areas; next, forming a sacrificial layer on each of the plurality of component areas, and forming a semiconductor active layer on the sacrificial layer and the substrate not covered with the sacrificial layer; patterning the semiconductor active layer to remove the semiconductor active layer on the peripheral areas so as to form a plurality of annular grooves which expose the sacrificial layer, such that the semiconductor active layer on each of the plurality of component areas is independent; afterwards, removing the sacrificial layer on each of the plurality of component areas through the annular grooves, such that the independent semiconductor active layer is separated from the substrate, where the independent semiconductor active layer forms a semiconductor structure.

Abstract: The present application provides a semiconductor device and a manufacturing method thereof. The manufacturing method of the semiconductor device includes: first forming a first conductive layer on a substrate, where the first conductive layer includes a heavily-doped group III-V compound, then forming an isolation structure on the first conductive layer, then growing a light-emitting structure by using the isolation structure as a mask, where the light-emitting structure includes a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially stacked on the first conductive layer, and a conductivity type of the first semiconductor layer is opposite to a conductivity type of the second semiconductor layer.

Abstract: A solid state circuit breaker has both solid state electronics and a physical switch. The solid state circuit breaker facilitates power measuring for end loads connected to a panel board circuit, e.g. receptacles, lighting, etc., over current protection, and disconnection all within one device. The solid state circuit breaker can be used at 100% of its rated capacity as opposed to 80% code-mandated limitation for thermal magnetic circuit breakers. The solid state circuit breaker also can provide power/current data (real-time) without the need of an additional device. The solid state circuit breaker further facilitates electronic, i.e. remote, opening, closing, and current limiting for demand response or load shedding.

Abstract: Disclosed are a light-emitting device structure and a preparation method therefor. The light-emitting device structure includes a buffer layer, where a material of the buffer layer is a transparent material; and a light-emitting structure disposed on a side of the buffer layer, where the light-emitting structure includes at least one light-emitting unit; where the buffer layer includes at least one microlens structure, the microlens structure includes at least two sub-layers, and each the light-emitting unit corresponds to at least one microlens structure. In the present disclosure, the buffer layer of the transparent material is utilized to manufacture the the microlens structure. On the one hand, a problem of total reflection is alleviated and light extraction efficiency of the light-emitting device is improved. On the other hand, no additional microlens structures is required, thereby reducing production cost.

Abstract: Provided are a full-color LED structure and a preparation method of a full-color LED structure. The full-color LED structure includes a first substrate, first-color light-emitting units, second-color light-emitting units, and third-color light-emitting units. The first-color light-emitting units and the second-color light-emitting units are disposed on a side of the first substrate, disposed in the same layer, and simultaneously prepared. The third-color light-emitting units are disposed on the side of the first-color light-emitting units and the second-color light-emitting units facing away from the first substrate, where a vertical projection of a third-color light-emitting unit on the first substrate does not overlap a vertical projection of a first-color light-emitting unit on the first substrate or a vertical projection of a second-color light-emitting unit on the first substrate.

Abstract: The disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a first group III nitride epitaxial layer disposed on a support substrate, a silicon substrate, a bonding layer and a second group III nitride epitaxial layer; wherein the first group III nitride epitaxial layer is bonded to the silicon substrate by the bonding layer; through-silicon-vias are formed in the silicon substrate, and first through-holes are formed in the bonding layer, wherein the through-silicon-vias communicate with the first through-holes; and the second group III nitride epitaxial layer is disposed within the first through-holes and the through-silicon-vias and on the silicon substrate, wherein the second group III nitride epitaxial layer is coupled to the first group III nitride epitaxial layer.

Abstract: Described herein are CAS12A mutants from Lachnospiraceae bacterium and methods for use thereof. These mutants have enhanced DNA cleavage activities at non-canonical TTTT protospacer adjacent motifs (PAM) compared to the wild-type enzyme.

Abstract: Described herein is a series of recombinantly engineered Cas12a proteins from Eubacterium rectale. In one aspect, various mutations to the wild type Eubacterium rectale Cas12a polypeptide (ERCAS12A) are provided that have enhanced activity.

Abstract: A semiconductor structure and a method for manufacturing a semiconductor structure are provided. The semiconductor structure includes a driving substrate, a first epitaxial structure coupled to the driving substrate, and a second epitaxial structure coupled to the first epitaxial structure, where the driving substrate is selectively coupled to a first semiconductor layer and a second semiconductor layer of the first epitaxial structure, and a third semiconductor layer and a fourth semiconductor layer of the second epitaxial structure by metal electrodes to independently control the first epitaxial structure and the second epitaxial structure.

Abstract: The present invention provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a substrate; forming an amorphous layer on the substrate, wherein the amorphous layer includes a plurality of patterns to expose part of the substrate; forming a metal nitride layer on the amorphous layer; removing the amorphous layer to form a plurality of cavities between the substrate and the metal nitride layer; removing the substrate to form the semiconductor structure. In the present invention, an amorphous layer is formed on the substrate, and a metal nitride layer is formed on the amorphous layer. The amorphous layer can inhibit slip or dislocation during epitaxial growth, thereby improving the quality of the metal nitride layer and improving the performance of the semiconductor structure, while the metal nitride layer can realize self-supporting.

Abstract: A solid state circuit breaker has both solid state electronics and a physical switch. The solid state circuit breaker facilitates power measuring for end loads connected to a panel board circuit, e.g. receptacles, lighting, etc., over current protection, and disconnection all within one device. The solid state circuit breaker can be used at 100% of its rated capacity as opposed to 80% code-mandated limitation for thermal magnetic circuit breakers. The solid state circuit breaker also can provide power/current data (real-time) without the need of an additional device. The solid state circuit breaker further facilitates electronic, i.e. remote, opening, closing, and current limiting for demand response or load shedding.

Abstract: A light-emitting device and a method for manufacturing a light-emitting device are provided. The light-emitting device includes: a substrate, provided with at least one light guide channel through the substrate, wherein each of the at least one light guide channel comprises a first opening and a second opening opposite to the first opening, an area of a section of the second opening is greater than an area of a section of the first opening, the substrate comprises a first substrate and a second substrate stacked, and the second substrate is configured to control a direction of light output through the light guide channel; and a light-emitting structure, provided at a side of the substrate where the first opening is located, wherein the light-emitting structure comprises at least one light-emitting unit, each of the at least one light guide channel corresponds to at least one light-emitting unit.

Abstract: A hot-dipped aluminum-zinc or zinc-aluminum-magnesium multiphase steel having a yield strength of greater than or equal to 450 MPa and a rapid heat-treatment hot plating manufacturing method therefor. The steel comprises the following components, in percentage by weight: 0.06-0.12% of C, 0.05-0.30% of Si, 1.0-1.8% of Mn, P?0.015%, S?0.015%, N?0.04%, Cr?0.50%, and further comprises one or both of Ti or Nb, with 0-0.045% of Nb and 0-0.045% of Ti, the balance being Fe and other unavoidable impurities. In addition, the following conditions also need to be met: 0.25?(C+Mn/6)?0.40; Mn/S?150; when no Ti is contained, Nb meets 0.01%?(Nb?0.22C?1.1N)?0.03%; when no Nb is contained, Ti meets 0.3?Ti/C?0.6; and when Ti and Nb are added in a compound mode, 0.03%?(Ti+Nb)?0.07%.

Abstract: Disclosed are a composite substrate, an epitaxial wafer, and a semiconductor device. The composite substrate includes: a support substrate layer; a first alumina layer disposed on the support substrate layer; and a sapphire substrate layer disposed on the first alumina layer. The first alumina layer may increase a bonding force between the sapphire substrate layer and the support substrate layer and release a stress between the sapphire substrate layer and the support substrate layer. Meanwhile, the existence of the first alumina layer may improve a breakdown voltage of a material without increasing a thickness of the sapphire substrate layer.

Abstract: Described herein are CAS12A mutants from Lachnospiraceae bacterium and methods for use thereof. These mutants have enhanced DNA cleavage activities at non-canonical TTTT protospacer adjacent motifs (PAM) compared to the wild-type enzyme.

Abstract: A low-carbon and low-alloy dual-phase steel and hot-dip galvanized dual-phase steel having tensile strength greater than or equal to 980 MPa and a method for manufacturing by means of rapid heat treatment. The steel has the following chemical components in percentage by mass: C: 0.05-0.17%, Si: 0.1-0.7%, Mn: 1.4-2.8%, P?0.020%, S?0.005%, B?0.005%, and Al: 0.02-0.055%, and may further contain two or more of Nb, Ti, Cr, Mo, and V, Cr+Mo+Ti+Nb+V?1.1%, the balance is Fe and other inevitable impurities. The method for manufacturing the steel comprises: smelting, casting, hot rolling, cold rolling and rapid heat treatment procedures. According to the present invention, the recovery, recrystallization and austenite transformation process of a deformed structure is changed, the nucleation rate is increased, the grain growth time is shortened, grains are refined, the strength of the material is improved, and the performance range of the material is expanded.

Abstract: A high-formability hot galvanized aluminum-zinc or hot galvanized aluminum-magnesium dual-phase steel having a tensile strength of ?590 MPa and a rapid heat treatment hot dipping fabrication method, the steel comprising the following components in mass percentage: C: 0.045-0.12%; Si: 0.1-0.5%; Mn: 1.0-2.0%; P: ?0.02%; S: ?0.006%; and Al: 0.02-0.055%. The steel may also contain one or two among Cr, Mo, Ti, Nb, and V, wherein the Cr+Mo+Ti+Nb+V?0.5%, and the remainder is Fe and other inevitable impurities. The present invention changes the recovery of a deformed structure, ferrite recrystallization and austenite transformation processes during annealing by means of rapid heat treatment, and the nucleation point of a crystal is increased, grain growth time is shortened, the strength and formability (n90 value) of the material is improved while heat treatment efficiency is improved, which thus extends the performance range of the material.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a silicon substrate having several through-silicon-vias therein; a first semiconductor layer located in each through-silicon-via and on the silicon substrate, an active layer located on the first semiconductor layer, and a second semiconductor layer located on the active layer, where a conductivity type of the second semiconductor layer is opposite to that of the first semiconductor layer, a material of the first semiconductor layer a group III nitride, a material of the active layer a group III nitride, and a material of the second semiconductor layer include a group III nitride.

Abstract: Disclosed are a manufacturing method for an epitaxial substrate, an epitaxial substrate, and a semiconductor structure. The manufacturing method includes: patterning a substrate to form a trench; manufacturing a transition layer in the trench, and performing crystal plane transformation processing on the transition layer based on a shape of the trench, so as to transform the transition layer into a single crystal layer, where a surface, away from the substrate, of the single crystal layer is a (111) crystal plane. Based on different shapes of the trench on the substrate, the transition layer is controlled to obtain a single crystal layer of a specific crystal plane after the crystal plane transformation processing, and a surface, away from the substrate, of the single crystal layer, is a (111) crystal plane. The (111) crystal plane of the single crystal layer facilitates subsequent epitaxial manufacturing of a semiconductor structure.