Patents by Inventor Liyang Zhang

Liyang Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240167140
    Abstract: A high-formability hot galvanized aluminum-zinc or hot galvanized aluminum-magnesium dual-phase steel having a tensile strength of ?590 MPa and a rapid heat treatment hot dipping fabrication method, the steel comprising the following components in mass percentage: C: 0.045-0.12%; Si: 0.1-0.5%; Mn: 1.0-2.0%; P: ?0.02%; S: ?0.006%; and Al: 0.02-0.055%. The steel may also contain one or two among Cr, Mo, Ti, Nb, and V, wherein the Cr+Mo+Ti+Nb+V?0.5%, and the remainder is Fe and other inevitable impurities. The present invention changes the recovery of a deformed structure, ferrite recrystallization and austenite transformation processes during annealing by means of rapid heat treatment, and the nucleation point of a crystal is increased, grain growth time is shortened, the strength and formability (n90 value) of the material is improved while heat treatment efficiency is improved, which thus extends the performance range of the material.
    Type: Application
    Filed: March 31, 2022
    Publication date: May 23, 2024
    Applicant: BAOSHAN IRON & STEEL CO., LTD.
    Inventors: Jian WANG, Jun LI, Liyang ZHANG, Xiaofeng DU, Zhilong DING, Huafei LIU, Yuling REN, Yao DU, Chuanhua LIN, Yi YANG
  • Publication number: 20240154063
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a silicon substrate having several through-silicon-vias therein; a first semiconductor layer located in each through-silicon-via and on the silicon substrate, an active layer located on the first semiconductor layer, and a second semiconductor layer located on the active layer, where a conductivity type of the second semiconductor layer is opposite to that of the first semiconductor layer, a material of the first semiconductor layer a group III nitride, a material of the active layer a group III nitride, and a material of the second semiconductor layer include a group III nitride.
    Type: Application
    Filed: April 15, 2021
    Publication date: May 9, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai CHENG, Liyang ZHANG
  • Publication number: 20240145628
    Abstract: Disclosed are a manufacturing method for an epitaxial substrate, an epitaxial substrate, and a semiconductor structure. The manufacturing method includes: patterning a substrate to form a trench; manufacturing a transition layer in the trench, and performing crystal plane transformation processing on the transition layer based on a shape of the trench, so as to transform the transition layer into a single crystal layer, where a surface, away from the substrate, of the single crystal layer is a (111) crystal plane. Based on different shapes of the trench on the substrate, the transition layer is controlled to obtain a single crystal layer of a specific crystal plane after the crystal plane transformation processing, and a surface, away from the substrate, of the single crystal layer, is a (111) crystal plane. The (111) crystal plane of the single crystal layer facilitates subsequent epitaxial manufacturing of a semiconductor structure.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 2, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240145626
    Abstract: The present application discloses a semiconductor structure including: a base, the base being made of an amorphous material and including at least one trench; a monocrystalline layer, at least part of the monocrystalline layer being provided in the trench; and an epitaxial structure layer, located on the side of the monocrystalline layer away from the base. The semiconductor structure disclosed in the present application includes the monocrystalline layer formed in the at least one trench of the base, and an amorphous material with a thermal expansion coefficient similar to that of the monocrystalline layer is selected as the base, which can relieve the tensile stress generated by the monocrystalline layer during the epitaxial process. At the same time, the epitaxial structure layer is grown on an independent monocrystalline layer, and the size is small, which alleviates the problem of semiconductor film cracking on the large-size substrate.
    Type: Application
    Filed: May 17, 2023
    Publication date: May 2, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang Zhang, Kai Cheng
  • Patent number: 11973335
    Abstract: A solid state circuit breaker has both solid state electronics and a physical switch. The solid state circuit breaker facilitates power measuring for end loads connected to a panel board circuit, e.g. receptacles, lighting, etc., over current protection, and disconnection all within one device. The solid state circuit breaker can be used at 100% of its rated capacity as opposed to 80% code-mandated limitation for thermal magnetic circuit breakers. The solid state circuit breaker also can provide power/current data (real-time) without the need of an additional device. The solid state circuit breaker further facilitates electronic, i.e. remote, opening, closing, and current limiting for demand response or load shedding.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: April 30, 2024
    Assignee: RENU, INC.
    Inventors: Jumie Yuventi, Bahman Sharifipour, Liyang Zhang, Bruno Bambaren
  • Patent number: 11965185
    Abstract: Described herein are CAS12A mutants from Lachnospiraceae bacterium and methods for use thereof. These mutants have enhanced DNA cleavage activities at non-canonical TTTT protospacer adjacent motifs (PAM) compared to the wild-type enzyme.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: April 23, 2024
    Assignee: INTEGRATED DNA TECHNOLOGIES, INC.
    Inventors: Liyang Zhang, Christopher Anthony Vakulskas
  • Publication number: 20240079232
    Abstract: Disclosed are a semiconductor structure and a method for manufacturing a semiconductor structure, the method includes: forming a first transition layer, a protection layer and an active structure layer sequentially epitaxially on a side of a growth substrate, where a surface, away from the growth substrate, of the first transition layer is a two-dimensional flat surface; on a first plane, an orthographic projection of the active structure layer is at least partially covered by an orthographic projection of the protection layer, and the first plane is perpendicular to an arrangement direction of the protection layer and the active structure layer; detaching the growth substrate by a laser lift-off process, to make the epitaxial layer transferred to a transfer substrate; etching the first transition layer up to the protection layer, to make a surface, away from the active structure layer, of the protection layer to be a planarization surface.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240079520
    Abstract: A light emitting device includes: a first substrate; a light emitting structure layer located on the first substrate; and an insertion layer located on the light emitting structure layer, a surface, away from the light emitting structure layer, of the insertion layer is a roughened surface, and the insertion layer has a protective effect on the light emitting structure layer. In the light emitting device provided by the present disclosure, the surface, away from the light emitting structure layer, of the insertion layer is the roughened surface, and the insertion layer has the protective effect on the light emitting structure layer during a peeling off process, which solves problems of reduced yield and reduced light extraction efficiency of a light emitting device.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240072123
    Abstract: Disclosed is a semiconductor structure, including a substrate; a V-shaped groove layer, a V-shaped groove enlargement layer and a semiconductor epitaxial layer stacked from bottom to top; a first V-shaped groove arranged on a surface of the V-shaped groove layer close to the V-shaped groove enlargement layer; a second V-shaped groove arranged on a surface of the V-shaped groove enlargement layer close to the semiconductor epitaxial layer, where a size of the second V-shaped groove is greater than a size of the first V-shaped groove In the present disclosure, a lateral epitaxy effect of the V-shaped groove enlargement layer and the semiconductor epitaxial layer is realized for two times, which makes dislocation fully bend, effectively improving crystal quality. Meanwhile, the first V-shaped groove and the second V-shaped groove are self-formed during an epitaxial growth process, which greatly reduces preparation cost and improves preparation efficiency.
    Type: Application
    Filed: July 13, 2023
    Publication date: February 29, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240021754
    Abstract: A composite substrate, a photoelectric device and a preparation method therefor. The composite substrate comprises a base substrate and a nano-diamond structure located on the base substrate; the nano-diamond structure comprises a plurality of nano-diamond protrusions arranged at intervals, and a gap is provided between two adjacent nano-diamond protrusions. The photoelectric device comprises the composite substrate, and further comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked on the composite substrate; the first semiconductor layer comprises protruding portions and a flat portion sequentially stacked in the vertical direction, the protruding portions are in the gaps and correspond one-to-one to the gaps, and the flat portion is located on the protruding portions and the nano-diamond structure. The preparation method for the photoelectric device is used for manufacturing the photoelectric device.
    Type: Application
    Filed: November 25, 2020
    Publication date: January 18, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang Zhang, Kai Cheng
  • Publication number: 20240006465
    Abstract: Disclosed are a micro light-emitting diode chip, a manufacturing method therefor, and an electronic device. The micro light-emitting diode chip includes: a substrate; a plurality of light-emitting units, where a light-emitting unit is located on a side of the substrate, the light-emitting unit includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in sequence, the first semiconductor layer is located on a side, away from the substrate, of the second semiconductor layer, and the light-emitting unit further includes a reflective sidewall, which constitutes a sidewall of the active layer, the second semiconductor layer and at least a part of the first semiconductor layer; and a blocking portion, where at least a part of the blocking portion is located between first semiconductor layers of two of the light-emitting units.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 4, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240006464
    Abstract: Disclosed are a light-emitting chip, a manufacturing method thereof and an electronic device. The light-emitting chip includes a first substrate; and at least one reflector and a light-emitting pixel layer sequentially located on the first substrate. The light-emitting pixel layer includes at least one light-emitting pixel. The reflector is arranged corresponding to the light-emitting pixel. A first surface, close to the light-emitting pixel, of the reflector is a bowl-shaped surface. The bowl-shaped surface is concave in a direction close to the first substrate. The reflector is configured to reflect light emitted by a corresponding light-emitting pixel and adjust an emission direction and/or an emission angle of the light, so that the light exit rate of the light-emitting chip can be improved, and the light-emitting brightness of the light-emitting chip and electronic device can be further improved.
    Type: Application
    Filed: June 30, 2023
    Publication date: January 4, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20230420434
    Abstract: A semiconductor structure includes: a stacked structure, including one stacked structure unit or a plurality of stacked structure units disposed along a horizontal direction, where each of the stacked structure units includes a plurality of stacked island structures separated from each other along the horizontal direction; and an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer sequentially laminated on the stacked structure. In the present disclosure, by providing the stacked structure, the light-emitting efficiency of the semiconductor device can be improved.
    Type: Application
    Filed: November 18, 2020
    Publication date: December 28, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20230387346
    Abstract: The present application provides a semiconductor structure and a manufacturing method therefor, and a light-emitting device and a manufacturing method therefor. The semiconductor structure includes a substrate, a first semiconductor layer, an isolation layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The second semiconductor layer is a conductive DBR structure. The first semiconductor layer includes a flat portion, a first protrusion and a second protrusion stacked sequentially in a vertical direction, the second protrusions correspond one-to-one to the first through-holes, and the second protrusions are arranged at intervals, and the side surface of the second protrusions are beveled. The active layer, the second semiconductor layer, and the first electrode are provided on the second protrusions of the first semiconductor layer stacked in sequence.
    Type: Application
    Filed: November 18, 2020
    Publication date: November 30, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Liyang ZHANG
  • Publication number: 20230378396
    Abstract: The present disclosure provides a full-color LED structure, a full-color LED structure unit, and a method for manufacturing the same. Different wavelengths of light emitted from the first sub-region, the second sub-region and the third sub-region of the light-emitting layer are achieved by controlling different surface dimensions of the bottom wall and the side wall of the first trench or the top wall of the first semiconductor layer. The above process is simple and can form full-color LED structure units during a single epitaxial growth process of the light-emitting layer, such that the size of the full-color LED is reduced, the cost is reduced, the service life is extended, and the reliability is improved.
    Type: Application
    Filed: November 20, 2020
    Publication date: November 23, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai Cheng, Liyang Zhang
  • Publication number: 20230343589
    Abstract: The disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a first group III nitride epitaxial layer disposed on a support substrate, a silicon substrate, a bonding layer and a second group III nitride epitaxial layer; wherein the first group III nitride epitaxial layer is bonded to the silicon substrate by the bonding layer; through-silicon-vias are formed in the silicon substrate, and first through-holes are formed in the bonding layer, wherein the through-silicon-vias communicate with the first through-holes; and the second group III nitride epitaxial layer is disposed within the first through-holes and the through-silicon-vias and on the silicon substrate, wherein the second group III nitride epitaxial layer is coupled to the first group III nitride epitaxial layer.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 26, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai Cheng, Liyang Zhang
  • Publication number: 20230335576
    Abstract: Disclosed are a light emitting device and a method for manufacturing a light emitting device. The light emitting device according to the present application may be formed by an epitaxial growth process. In addition, the light emitting device according to the present application includes a first semiconductor layer, a light emitting layer and a second semiconductor layer. Light emitting wavelengths of the first region, the second region and the third region are different by setting composition of the light emitting layer of the top walls of the plurality of protrusions, the side walls of the plurality of protrusions and the recessed region between the plurality of protrusions to be different, therefore, the light-emitting device may emit light of different wavelengths without using phosphors or quantum dots for wavelength conversion, thereby prolonging the lifespan of the light-emitting device and improving the reliability of the light-emitting device.
    Type: Application
    Filed: January 9, 2023
    Publication date: October 19, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Liyang ZHANG
  • Publication number: 20230317877
    Abstract: A semiconductor light-emitting device and a manufacturing method for same. The manufacturing method for the semiconductor light-emitting device comprises: forming a dielectric layer on a substrate, the dielectric layer being provided with a plurality of openings exposing the substrate; performing epitaxial growth on the substrate using the dielectric layer as a mask to form first reflectors in the openings of the dielectric layer; growing a light-emitting structure on the side of each first reflector away from the substrate; and forming a second reflector on the side of the light-emitting structure away from the first reflector. The manufacturing process can be simplified.
    Type: Application
    Filed: November 27, 2020
    Publication date: October 5, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC
    Inventors: Zhizhong GUO, Liyang ZHANG
  • Publication number: 20230290886
    Abstract: Semiconductor structures and manufacturing methods thereof. A semiconductor structure includes: a first epitaxial layer; a bonding layer, on first epitaxial layer and provided with a first through-hole exposing first epitaxial layer; a silicon substrate, on a side of bonding layer away from first epitaxial layer, first epitaxial layer and the silicon substrate being bonded through the bonding layer; a through-silicon-via, in silicon substrate, through-silicon-via communicating with first through-hole; a second epitaxial layer, on first epitaxial layer exposed by first through-hole; a first electrode, on a side of first epitaxial layer away from bonding layer, and electrically coupled with first epitaxial layer; a second electrode, on a side of second epitaxial layer away from first epitaxial layer, and electrically coupled with second epitaxial layer.
    Type: Application
    Filed: April 15, 2021
    Publication date: September 14, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai Cheng, Liyang Zhang
  • Publication number: 20230290905
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure may include: a first epitaxial layer disposed on a substrate; a bonding layer disposed on the first epitaxial layer (where the bonding layer is provided with a first through-hole to expose the first epitaxial layer); a silicon substrate disposed on a side of the bonding layer away from the first epitaxial layer (where the first epitaxial layer is bonded to the silicon substrate by the bonding layer, the silicon substrate is provided with a through-silicon-via, and the through-silicon-via communicates with the first through-hole); a silicon device disposed on the silicon substrate; and a second epitaxial layer disposed on the first epitaxial layer exposed by the first through-hole. The present disclosure can improve the quality of the second epitaxial layer, and realize the integration of a silicon device and a III-V semiconductor device.
    Type: Application
    Filed: April 15, 2021
    Publication date: September 14, 2023
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai Cheng, Liyang Zhang