Patents by Inventor Liyang Zhang
Liyang Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10636836Abstract: A semiconductor light-emitting device comprises: an insulating base, a current diffusion layer, light-emitting structure layers and an insulating layer. The current diffusion layer includes: a first electrode connecting part, a second electrode connecting part, N contact parts and N+1 flat parts. N+1 light-emitting structure layers are correspondingly disposed on the N+1 flat parts, and each of the N+1 light-emitting structure layers includes: a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked on a corresponding flat part. N grooves are formed on a side of the second semiconductor layer away from the active layer, depth of the N grooves is less than the thickness of the second semiconductor layer, and the N contact parts correspond to the N grooves.Type: GrantFiled: October 1, 2018Date of Patent: April 28, 2020Assignee: Enkris Semiconductor, Inc.Inventors: Liyang Zhang, Kai Cheng
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Publication number: 20200109382Abstract: The present disclosure concerns polynucleotides and amino acids of Acidaminococcus sp. Cas12a (Cpf1) and methods for their use for genome editing in eukaryotic cells.Type: ApplicationFiled: August 8, 2019Publication date: April 9, 2020Inventors: Liyang Zhang, Christopher Anthony Vakulskas, Nicole Mary Bode, Michael Allen Collingwood, Kristin Renee Beltz, Mark Aaron Behlke
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Publication number: 20200043867Abstract: A substrate and a method for preparing the same relate to the field of semiconductors. The substrate includes a base substrate (10); a thin film layer (11), wherein the thin film layer (11) covers a part of a surface of the base substrate (10), so that the base substrate (10) is provided with an exposed surface (100) that is not covered by the thin film layer (11); and recessed hole(s) (101) formed in at least a part of the exposed surface (100). The substrate with the recessed hole(s) may release stresses that are generated due to lattice mismatch and thermal stress mismatch when an epitaxial layer is grown on the substrate and reduce the risk of occurrence of defects and cracks due to excessive pressure, thereby reducing the warping of a semiconductor subsequently prepared on the substrate and making it have a better quality and performance.Type: ApplicationFiled: October 15, 2019Publication date: February 6, 2020Inventors: Liyang ZHANG, Kai CHENG
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Patent number: 10446605Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: a substrate, a bonding metal layer, a reflective layer, a first conductive layer, an active layer, a second conductive layer, first electrode(s) and second electrode(s). The first electrode(s) extends, from one side of the bonding metal layer away from the substrate, to the first conductive layer, to be connected with the bonding metal layer and the first conductive layer. The second electrode(s) penetrates through the substrate and the bonding metal layer to be in contact with the reflective layer. The semiconductor device, forming a structure sharing the first conductive layer, has more uniform illumination and a higher light extraction rate, and eliminates interferences between pixel units, achieves better uniformity of emitted light wavelength and makes distribution of electric current flowing through different pixel units more even.Type: GrantFiled: January 12, 2017Date of Patent: October 15, 2019Assignee: Enkris Semiconductor, Inc.Inventor: Liyang Zhang
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Publication number: 20190148586Abstract: An patterned Si substrate-based LED epitaxial wafer and a preparation method therefor, the LED epitaxial wafer comprising: a patterned Si substrate (1) and an Al2O3 coating (2) growing on the patterned Si substrate (1); sequentially growing on the Al2O3 coating (2) are a nucleating layer (3), a first buffer layer (4), a first insertion layer (5), a second buffer layer (6), a second insertion layer (7), an n-GaN layer (8), a quantum well layer (9), a p-GaN layer (10), an n-electrode (14) electrically connected to the n-GaN layer and a p-electrode (13) electrically connected to the p-GaN layer. The present invention is suitable for the preparation of large-sized LED epitaxial wafers. Furthermore, the crystal quality is improved, and the light extraction efficiency of the LED die is improved.Type: ApplicationFiled: March 28, 2017Publication date: May 16, 2019Applicant: ENKRIS SEMICONDUCTOR, INCInventors: Liyang ZHANG, Kai CHENG
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Publication number: 20190051697Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes: a substrate, a bonding metal layer, a reflective layer, a first conductive layer, an active layer, a second conductive layer, first electrode(s) and second electrode(s). The first electrode(s) extends, from one side of the bonding metal layer away from the substrate, to the first conductive layer, to be connected with the bonding metal layer and the first conductive layer. The second electrode(s) penetrates through the substrate and the bonding metal layer to be in contact with the reflective layer. The semiconductor device, forming a structure sharing the first conductive layer, has more uniform illumination and a higher light extraction rate, and eliminates interferences between pixel units, achieves better uniformity of emitted light wavelength and makes distribution of electric current flowing through different pixel units more even.Type: ApplicationFiled: January 12, 2017Publication date: February 14, 2019Inventor: Liyang Zhang
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Publication number: 20190035845Abstract: A semiconductor light-emitting device comprises: an insulating base, a current diffusion layer, light-emitting structure layers and an insulating layer. The current diffusion layer includes: a first electrode connecting part, a second electrode connecting part, N contact parts and N+1 flat parts. N+1 light-emitting structure layers are correspondingly disposed on the N+1 flat parts, and each of the N+1 light-emitting structure layers includes: a first semiconductor layer, an active layer and a second semiconductor layer sequentially stacked on a corresponding flat part. N grooves are formed on a side of the second semiconductor layer away from the active layer, depth of the N grooves is less than the thickness of the second semiconductor layer, and the N contact parts correspond to the N grooves.Type: ApplicationFiled: October 1, 2018Publication date: January 31, 2019Inventors: Liyang ZHANG, Kai CHENG
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Patent number: 10100385Abstract: A high-formability, super-high-strength, hot-dip galvanized steel plate, the chemical composition of which comprises, based on weight percentage, C: 0.15-0.25 wt %, Si: 1.00-2.00 wt %, Mn: 1.50-3.00 wt %, P?0.015 wt %, S?0.012 wt %, Al: 0.03-0.06 wt %, N?0.008 wt %, and the balance of iron and unavoidable impurities. The room temperature structure of the steel plate comprises 10-30% ferrite, 60-80% martensite and 5-15% residual austenite. The steel plate has a yield strength of 600-900 MPa, a tensile strength of 980-1200 MPa, and an elongation of 15-22%. Through an appropriate composition design, a super-high-strength, cold rolled, hot-dip galvanized steel plate is manufactured by continuous annealing, wherein no expensive alloy elements are added; instead, remarkable increase of strength along with good plasticity can be realized just by appropriate augment of Si, Mn contents in combination with suitable processes of annealing and furnace atmosphere control.Type: GrantFiled: February 21, 2013Date of Patent: October 16, 2018Assignee: Baoshan Iron & Steel Co., Ltd.Inventors: Yong Zhong, Li Wang, Weijun Feng, Liyang Zhang
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Patent number: 10044334Abstract: A power amplifier gain attenuation circuit includes: a gain attenuation (reduction) circuit configured to receive an input signal, an external drive signal and a bias voltage, and output a secondary input signal after attenuating the input signal depending on the drive signal and bias voltage; an amplifier including: a bias input terminal configured to receive a bias voltage; a signal input terminal configured to receive a secondary input signal, and an output terminal configured to output a gained output signal. The power amplifier gain attenuation circuit can reduce a gain effectively, and the amount of phase jump caused by the attenuation is quite small.Type: GrantFiled: December 24, 2017Date of Patent: August 7, 2018Assignee: LANSUS TECHNOLOGIES INC.Inventors: Hua Long, Liyang Zhang, Zhenjuan Cheng, Dongjie Tang, Qian Zhao
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Patent number: 10044335Abstract: A multi-mode multi-band power amplifier includes a controller, a wide-band amplifier channel and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives single-band or multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer includes a first segment shared by RF signals in all bands, second segments respectively special for RF signals in all bands, and a switching circuit controlled by the controller to separate RF signals subject to power amplification to the second segment in a switchable manner for multiplexed outputs.Type: GrantFiled: December 26, 2017Date of Patent: August 7, 2018Assignee: LANSUS TECHNOLOGIES INC.Inventors: Hua Long, Liyang Zhang, Zhenjuan Cheng, Dongjie Tang, Qian Zhao
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Publication number: 20180138881Abstract: A power amplifier output power control circuit includes a first operational amplifier with a negative input terminal configured to receive a power control signal; a first PMOS transistor with a grid electrode connected to an output terminal of the first operational amplifier, a source electrode connected to an external power source, and a drain electrode grounded via a voltage dividing network; a power amplifier with a power end connected to the drain electrode of the first PMOS transistor, an input terminal configured to access to a signal to be amplified, and an output terminal configured to amplify the signal; and a current sampling circuit configured to produce sampling current after sampling current across the first PMOS transistor and providing a negative feedback signal for the positive input terminal of the first operational amplifier according to the sampling current such that total output power of the power amplifier keeps unchanged.Type: ApplicationFiled: December 25, 2017Publication date: May 17, 2018Applicant: LANSUS TECHNOLOGIES INC.Inventors: Hua LONG, Liyang ZHANG, Zhenjuan CHENG, Dongjie TANG, Qian ZHAO
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Publication number: 20180138880Abstract: A power amplifier gain attenuation circuit includes: a gain attenuation (reduction) circuit configured to receive an input signal, an external drive signal and a bias voltage, and output a secondary input signal after attenuating the input signal depending on the drive signal and bias voltage; an amplifier including: a bias input terminal configured to receive a bias voltage; a signal input terminal configured to receive a secondary input signal, and an output terminal configured to output a gained output signal. The power amplifier gain attenuation circuit can reduce a gain effectively, and the amount of phase jump caused by the attenuation is quite small.Type: ApplicationFiled: December 24, 2017Publication date: May 17, 2018Applicant: LANSUS TECHNOLOGIES INC.Inventors: Hua LONG, Liyang ZHANG, Zhenjuan CHENG, Dongjie TANG, Qian ZHAO
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Patent number: 9973164Abstract: A power amplifier output power control circuit includes a first operational amplifier with a negative input terminal configured to receive a power control signal; a first PMOS transistor with a grid electrode connected to an output terminal of the first operational amplifier, a source electrode connected to an external power source, and a drain electrode grounded via a voltage dividing network; a power amplifier with a power end connected to the drain electrode of the first PMOS transistor, an input terminal configured to access to a signal to be amplified, and an output terminal configured to amplify the signal; and a current sampling circuit configured to produce sampling current after sampling current across the first PMOS transistor and providing a negative feedback signal for the positive input terminal of the first operational amplifier according to the sampling current such that total output power of the power amplifier keeps unchanged.Type: GrantFiled: December 25, 2017Date of Patent: May 15, 2018Assignee: LANSUS TECHNOLOGIES INC.Inventors: Hua Long, Liyang Zhang, Zhenjuan Cheng, Dongjie Tang, Qian Zhao
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Publication number: 20180123539Abstract: A multi-mode multi-band power amplifier includes a controller, a wide-band amplifier channel and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives single-band or multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer includes a first segment shared by RF signals in all bands, second segments respectively special for RF signals in all bands, and a switching circuit controlled by the controller to separate RF signals subject to power amplification to the second segment in a switchable manner for multiplexed outputs.Type: ApplicationFiled: December 26, 2017Publication date: May 3, 2018Applicant: LANSUS TECHNOLOGIES INC.Inventors: Hua LONG, Liyang ZHANG, Zhenjuan CHENG, Dongjie TANG, Qian ZHAO
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Patent number: 9887679Abstract: A power amplifier gain switching circuit includes: a gain controller configured to receive an external input signal, output a first input signal, receive an external drive signal, and output a control signal based on the drive signal; an amplifier including: a bias input terminal configured to receive an external bias voltage; a signal input terminal configured to receive the first input signal; a control terminal configured to receive the control signal; and an output terminal configured to output an output signal with a gain; wherein the amplifier is configured to switch a gain factor of the output signal based on the control signal.Type: GrantFiled: January 29, 2017Date of Patent: February 6, 2018Assignee: LANSUS TECHNOLOGIES INC.Inventors: Qian Zhao, Liyang Zhang, Hua Long, Zhenjuan Cheng, Dongjie Tang
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Publication number: 20170141749Abstract: A power amplifier gain switching circuit includes: a gain controller configured to receive an external input signal, output a first input signal, receive an external drive signal, and output a control signal based on the drive signal; an amplifier including: a bias input terminal configured to receive an external bias voltage; a signal input terminal configured to receive the first input signal; a control terminal configured to receive the control signal; and an output terminal configured to output an output signal with a gain; wherein the amplifier is configured to switch a gain factor of the output signal based on the control signal.Type: ApplicationFiled: January 29, 2017Publication date: May 18, 2017Applicant: LANSUS TECHNOLOGIES INC.Inventors: Qian ZHAO, Liyang ZHANG, Hua LONG, Zhenjuan CHENG, Dongjie TANG
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Patent number: 9595933Abstract: A multi-mode multi-band power amplifier and its circuits are provided. The power amplifier comprises a controller, a wide-band amplifier channel, and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives a single-band or a multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer comprises a first segment shared by RF signals in all bands, second segments respectively specific to RF signals in all bands, and a switching circuit controlled by the controller to separate a RF signal which is subject to power amplification to the second segment in a switchable manner for multiplexed outputs. A power amplifier output power control circuit, a gain switching circuit, and a gain attenuation circuit are also provided.Type: GrantFiled: April 26, 2016Date of Patent: March 14, 2017Assignee: LANSUS TECHNOLOGIES INC.Inventors: Qian Zhao, Liyang Zhang, Hua Long, Zhenjuan Cheng, Dongjie Tang
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Publication number: 20160241213Abstract: A multi-mode multi-band power amplifier and its circuits are provided. The power amplifier comprises a controller, a wide-band amplifier channel, and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives a single-band or a multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer comprises a first segment shared by RF signals in all bands, second segments respectively specific to RF signals in all bands, and a switching circuit controlled by the controller to separate a RF signal which is subject to power amplification to the second segment in a switchable manner for multiplexed outputs. A power amplifier output power control circuit, a gain switching circuit, and a gain attenuation circuit are also provided.Type: ApplicationFiled: April 26, 2016Publication date: August 18, 2016Applicant: LANSUS TECHNOLOGIES INC.Inventors: Qian ZHAO, Liyang ZHANG, Hua LONG, Zhenjuan CHENG, Dongjie TANG
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Publication number: 20160108492Abstract: A high-formability, super-high-strength, hot-dip galvanized steel plate, the chemical composition of which comprises, based on weight percentage, C: 0.15-0.25 wt %, Si: 1.00-2.00 wt %, Mn: 1.50-3.00 wt %, P?0.015 wt %, S?0.012 wt %, Al: 0.03-0.06 wt %, N?0.008 wt %, and the balance of iron and unavoidable impurities. The room temperature structure of the steel plate comprises 10-30% ferrite, 60-80% martensite and 5-15% residual austenite. The steel plate has a yield strength of 600-900 MPa, a tensile strength of 980-1200 MPa, and an elongation of 15-22%. Through an appropriate composition design, a super-high-strength, cold rolled, hot-dip galvanized steel plate is manufactured by continuous annealing, wherein no expensive alloy elements are added; instead, remarkable increase of strength along with good plasticity can be realized just by appropriate augment of Si, Mn contents in combination with suitable processes of annealing and furnace atmosphere control.Type: ApplicationFiled: February 21, 2013Publication date: April 21, 2016Applicant: Baoshan Iron & Steel Co., Ltd.Inventors: Yong ZHONG, Li WANG, Weijun FENG, Liyang ZHANG
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Publication number: 20130307628Abstract: A radio frequency (RF) power amplifier includes: a pre-stage amplifier configured to amplify an input power to the RF power amplifier; and a post-stage amplifier configured to amplify an output power of the pre-stage amplifier; wherein the pre-stage amplifier comprises a CMOS (Complementary Metal Oxide Semiconductor) amplifier, and the post-stage amplifier comprises a GaAs (Gallium Arsenide) amplifier or a SiGe (Silicon Germanium) amplifier.Type: ApplicationFiled: July 22, 2013Publication date: November 21, 2013Applicant: NATIONZ TECHNOLOGIES INC.Inventors: Pingxi MA, Liyang ZHANG, Qian ZHAO