Patents by Inventor Lokesh Mohan Gupta

Lokesh Mohan Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210256147
    Abstract: Aspects of the present disclosure relate to encryption management. An indication of a data set to be tagged with an encryption tag is received. A location for the encryption tag is determined. The encryption tag is stored at the location, where the encryption tag includes an encryption status indicator specifying whether or not the data is encrypted and an encryption algorithm indicator specifying an encryption algorithm used to encrypt the data.
    Type: Application
    Filed: February 17, 2020
    Publication date: August 19, 2021
    Inventors: Lokesh Mohan Gupta, Matthew G. Borlick, Mark Elliott Hack, Micah Robison
  • Publication number: 20210255795
    Abstract: Provided are a computer program product, system, and method for using storage access statistics to determine mirrored extents to migrate from a primary storage system and a secondary storage system to a third storage system. A determination is made of access statistics with respect to mirrored extents of data at the primary storage mirrored to the secondary storage to migrate to the third storage. A first set of the mirrored extents associated with access statistics indicating a highest level of access of the mirrored extents are migrated from the secondary storage to the third storage. A second set of the mirrored extents associated with access statistics indicating a lower level of access than the mirrored extents in the first set are migrated from the primary storage to the secondary storage.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 19, 2021
    Inventors: Edward Hsiu-Wei Lin, Lokesh Mohan Gupta, Clint A. Hardy
  • Patent number: 11093156
    Abstract: Provided are a computer program product, system, and method for using storage access statistics to determine mirrored extents to migrate from a primary storage system and a secondary storage system to a third storage system. A determination is made of access statistics with respect to mirrored extents of data at the primary storage mirrored to the secondary storage to migrate to the third storage. A first set of the mirrored extents associated with access statistics indicating a highest level of access of the mirrored extents are migrated from the secondary storage to the third storage. A second set of the mirrored extents associated with access statistics indicating a lower level of access than the mirrored extents in the first set are migrated from the primary storage to the third storage.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: August 17, 2021
    Assignee: International Business Machines Corporation
    Inventors: Edward Hsiu-Wei Lin, Lokesh Mohan Gupta, Clint A. Hardy
  • Publication number: 20210240618
    Abstract: A computer-implemented method, according to one approach, includes: receiving an I/O request. In response to determining that the I/O request does not include a bypass indication, the I/O request is satisfied using a primary cache which is coupled to a data storage device and a secondary cache having SCM. In response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request: the updated data is destaged from the primary cache to the data storage device, the updated data is copied to the secondary cache, and the updated data is demoted from the primary cache. Yet, in response to determining that the data associated with the I/O request has not been updated: the data associated with the I/O request is copied to the secondary cache, and the data associated with the I/O request is demoted from the primary cache.
    Type: Application
    Filed: February 3, 2020
    Publication date: August 5, 2021
    Inventors: Lokesh Mohan Gupta, Edward Hsiu-Wei Lin, Beth Ann Peterson, Matthew G. Borlick
  • Publication number: 20210232712
    Abstract: A portable handheld device receives from a central repository, information on a failed hardware component of a computational device, wherein the information includes an authentication code to permit access to the failed hardware component and a time window in which the failed hardware component is permitted to be accessed. The portable handheld device uses the authentication code to access the failed hardware component for repair or replacement during the time window.
    Type: Application
    Filed: January 28, 2020
    Publication date: July 29, 2021
    Inventors: Markus Navarro, Micah Robison, Matthew G. Borlick, Lokesh Mohan Gupta, John Charles Elliott
  • Publication number: 20210224197
    Abstract: Provided are techniques for using a memory subsystem for a workload job. A section of a memory subsystem is allocated to a workload job, where the memory subsystem is comprised of a plurality of heterogeneous memory devices. In response to a track being modified for the workload job in a cache, it is determined that modified tracks have reached a threshold portion of the cache. In response to determining that the track exists in the section of the memory subsystem, data in the track in the section of the memory subsystem is overwritten with data in the track in the cache. in response to determining that the track does not exist in the section of the memory subsystem, the data in the track in the cache is copied to the track in the section of the memory subsystem, and the track is demoted from the cache.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Lokesh Mohan GUPTA, Matthew G. BORLICK, Kevin J. ASH, Kyler A. ANDERSON
  • Publication number: 20210224200
    Abstract: Provided are a computer program product, system, and method for staging data from storage to a fast cache tier of a multi-tier cache in a non-adaptive sector caching mode in which data staged in response to a read request is limited to track sectors required to satisfy the read request. Data is also staged from storage to a slow cache tier of the multi-tier cache in a selected adaptive caching mode of a plurality of adaptive caching modes available for staging data of tracks. Adaptive caching modes are selected for the slow cache tier as a function of historical access ratios. Prestage requests for the slow cache tier are enqueued in one of a plurality of prestage request queues of various priority levels as a function of the selected adaptive caching mode and historical access ratios. Other aspects and advantages are provided, depending upon the particular application.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 22, 2021
    Inventors: Lokesh Mohan GUPTA, Kyler A. ANDERSON, Kevin J. ASH, Matthew G. BORLICK
  • Patent number: 11061828
    Abstract: A computer-implemented method, according to one approach, includes: receiving an I/O request which includes supplemental information pertaining to an anticipated workload of the I/O request. The supplemental information is used to determine whether to satisfy the I/O request using a primary cache. In response to determining to satisfy the I/O request using the primary cache, the I/O request is initiated using the primary cache, and performance characteristics experienced by the primary cache while satisfying the I/O request are evaluated. The supplemental information and the performance characteristics are further used to determine whether to satisfy a remainder of the I/O request using the secondary cache. In response to determining to satisfy a remainder of the I/O request using the secondary cache, the I/O request is demoted from the primary cache to the secondary cache, and a remainder of the I/O request is satisfied using the secondary cache.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: July 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Beth Ann Peterson, Chung Man Fung, Lokesh Mohan Gupta, Kyler A. Anderson
  • Publication number: 20210208792
    Abstract: Provided are a computer program product, system, and method for maintaining data structures in a virtual memory comprised of a plurality of heterogeneous memory devices. Access counts are maintained for a plurality of data structures stored in a first level memory device. A determination is made of data structures in the first level memory device having lowest access counts. The determined data structures are deleted from the first level memory device and retaining copies of the data structures in a second level memory device, wherein the first level memory device has lower latency than the second level memory device.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 8, 2021
    Inventors: Beth Ann PETERSON, Lokesh Mohan GUPTA, Matthew Richard CRAIG, Matthew G. BORLICK
  • Publication number: 20210208790
    Abstract: Provided are computer program product, system, and method for managing data structures in a plurality of memory devices that are indicated to demote after initialization of the data structures. Indication is made to data structures to demote after initialization from a first level memory device to a second level memory device. The first level memory device has lower latency than the second level memory device. In response to completing initialization of the data structures in the first level memory device, the data structures indicated to demote after initialization are copied from the first level memory device to the second level memory device and removing the data structures indicate to move after initialization from the first level memory device.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 8, 2021
    Inventors: Beth Ann Peterson, Lokesh Mohan Gupta, Matthew Richard Craig, Matthew G. Borlick
  • Publication number: 20210208791
    Abstract: Provided are a computer program product, system, and method for managing swappable data structures in a plurality of memory devices based on access counts of the data structures. Data structures indicated as swappable are updated less frequently than most frequently updated data structures. Data structures not indicated as swappable are maintained in a first level memory device and not moved to a second level memory device. The first level memory device has lower latency than the second level memory device. Access counts are maintained for the data structures stored in the first level memory device that are indicated as swappable. Data structures are selected in the first level memory device having lowest access counts. The selected data structures are removed from the first level memory device and retained in the second level memory device.
    Type: Application
    Filed: January 7, 2020
    Publication date: July 8, 2021
    Inventors: Beth Ann Peterson, Lokesh Mohan Gupta, Matthew G. Borlick, Matthew Richard Craig
  • Patent number: 11030104
    Abstract: Provided are a computer program product, system, and method for queuing prestage requests in one of a plurality of prestage request queues as a function of the number of track holes determined to be present in a track cached in a multi-tier cache. A prestage request when executed prestages read data from storage to a slow cache tier of the multi-tier cache, for one or more sectors identified by one or more track holes. In another aspect, allocated tasks are dispatched to execute prestage requests queued on selected prestage request queues as a function of priority associated with each prestage request queues. Other aspects and advantages are provided, depending upon the particular application.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: June 8, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lokesh Mohan Gupta, Kevin J. Ash, Kyler A. Anderson, Matthew G. Borlick
  • Patent number: 9733991
    Abstract: Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis. A global lock for the set of operations is periodically acquired, the set of operations is performed, and the global lock is freed so as to avoid excessive duty cycling of lock and unlock operations in the computing storage environment.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 15, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Kenneth Wayne Todd, David Blair Whitworth
  • Patent number: 9626113
    Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count defined by a predetermined lower maximum count of Task Control Blocks (TCBs) of a rank for performing destage operations, and a higher maximum count of TCBs to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Kenneth Wayne Todd
  • Publication number: 20160253107
    Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count defined by a predetermined lower maximum count of Task Control Blocks (TCBs) of a rank for performing destage operations, and a higher maximum count of TCBs to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.
    Type: Application
    Filed: May 6, 2016
    Publication date: September 1, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, Kenneth Wayne TODD
  • Patent number: 9430395
    Abstract: A method, system, and computer program product for grouping and dispatching scans in a cache directory of a processing environment is provided. A plurality of scan tasks is aggregated from a scan wait queue into a scan task queue. The plurality of scan tasks is determined by selecting one of (1) each of the plurality of scan tasks on the scan wait queue, (2) a predetermined number of the plurality of scan tasks on the scan wait queue, and (3) a set of scan tasks of a similar type on the scan wait queue. A first scan task from the plurality of scan tasks is selected from the scan task queue. The scan task is performed.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: August 30, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Thomas Benhase, Susan Kay Candelaria, Lokesh Mohan Gupta, Kenneth Wayne Todd
  • Patent number: 9396102
    Abstract: For cache/data management in a computing storage environment, incoming data segments into a Non Volatile Storage (NVS) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 19, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Kenneth Wayne Todd
  • Patent number: 9367479
    Abstract: A processor, operable in a computing storage environment, for each rank in a storage management device in the computing storage environment, allocates a lower maximum count, and a higher maximum count, of Task Control Blocks (TCBs) to be implemented for performing a storage operation, and performs the storage operation using up to the lower maximum count of TCBs, yet only allows those TCBs above the lower maximum count to be allocated for performing the storage operation satisfying at least one criterion.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: June 14, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Kenneth Wayne Todd
  • Patent number: 9092155
    Abstract: A method for performing a write to a volume x in a cascaded architecture is described. In one embodiment, such a method includes determining whether the volume x has a child volume, wherein each of the volume x and the child volume have a target bit map (TBM) associated therewith. The method then determines whether the TBMs of both the volume x and the child volume are set. If the TBMs are set, the method finds a higher source (HS) volume from which to copy the desired data to the child volume. Finding the HS volume includes travelling up the cascaded architecture until the source of the data is found. Once the HS volume is found, the method copies the data from the HS volume to the child volume and performs the write to the volume x. A method for performing a read is also disclosed herein.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Jr., Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
  • Patent number: 9063945
    Abstract: An apparatus and method for copying data are disclosed. A data track to be replicated using a peer-to-peer remote copy (PPRC) operation is identified. The data track is encoded in a non-transitory computer readable medium disposed in a first data storage system. At a first time, a determination of whether the data track is stored in a data cache is made. At a second time, the data track is replicated to a non-transitory computer readable medium disposed in a second data storage system. The second time is later than the first time. If the data track was stored in the data cache at the first time, a cache manager is instructed to not demote the data track from the data cache. If the data track was not stored in the data cache at the first time, the cache manager is instructed that the data track may be demoted.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: June 23, 2015
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Lokesh Mohan Gupta, Joseph Smith Hyde, II, Warren Keith Stanley