Patents by Inventor Lokesh Mohan Gupta
Lokesh Mohan Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9058217Abstract: A set of like tasks to be performed is organized into a first group. Upon a determined imbalance between dispatch queue depths greater than a predetermined threshold, the set of like tasks is reassigned to an additional group.Type: GrantFiled: September 14, 2012Date of Patent: June 16, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Trung Ngoc Nguyen
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Patent number: 8918607Abstract: Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.Type: GrantFiled: November 19, 2010Date of Patent: December 23, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Lokesh Mohan Gupta, Yu-Cheng Hsu, Alfred Emilio Sanchez
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Patent number: 8892834Abstract: A method for performing a write to a volume x in a cyclic point-in-time-copy architecture is described. In one embodiment, such a method includes determining whether the volume x has a child volume. The method then determines whether the target bit maps (TBMs) of both the volume x and the child volume are set. If the TBMs are set, the method finds a higher source (HS) volume from which to copy the desired data to the child volume. Once the HS volume is found, the method determines whether the HS volume and the child volume are the same volume. If the HS volume and the child volume are not the same volume, the method copies the data from the HS volume to the child volume. The method then performs the write to the volume x.Type: GrantFiled: April 28, 2012Date of Patent: November 18, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Jr., Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
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Patent number: 8850147Abstract: A method for deleting a relation between a source and a target in a multi-target architecture is described. The multi-target architecture includes a source and multiple targets mapped thereto. In one embodiment, such a method includes initially identifying a relation for deletion from the multi-target architecture. A target associated with the relation is then identified. The method then identifies a sibling target that inherits data from the target. Once the target and the sibling target are identified, the method copies the data from the target to the sibling target. The relation between the source and the target is then deleted. A corresponding computer program product is also disclosed and claimed herein.Type: GrantFiled: March 15, 2013Date of Patent: September 30, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Jr., Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
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Patent number: 8843719Abstract: A method for performing a write to a source volume in a multi-target architecture is described. The multi-target architecture includes a source volume and multiple target volumes mapped thereto. In one embodiment, such a method includes copying data in a track of the source volume to a corresponding track of a target volume (target x). The method enables one or more sibling target volumes (siblings) mapped to the source volume to inherit the data from the target x. When the data is successfully copied to the target x, the method performs a write to the track of the source volume. Other methods for reading and writing data to volumes in the multi-target architecture are also described.Type: GrantFiled: March 15, 2013Date of Patent: September 23, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
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Patent number: 8832379Abstract: A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB).Type: GrantFiled: September 14, 2012Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, Kenneth Wayne Todd
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Patent number: 8782362Abstract: A method for performing a write to a volume x in a cyclic point-in-time-copy architecture is described. In one embodiment, such a method includes determining whether the volume x has a child volume. The method then determines whether the target bit maps (TBMs) of both the volume x and the child volume are set. If the TBMs are set, the method finds a higher source (HS) volume from which to copy the desired data to the child volume. Once the HS volume is found, the method determines whether the HS volume and the child volume are the same volume. If the HS volume and the child volume are not the same volume, the method copies the data from the HS volume to the child volume. The method then performs the write to the volume x. A corresponding computer program product is also described.Type: GrantFiled: March 8, 2011Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Jr., Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
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Patent number: 8719504Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. A total number of I/O operations to be awoken at each of an iterated instance of the waking is limited.Type: GrantFiled: September 14, 2012Date of Patent: May 6, 2014Assignee: International Business Machines CorporationInventors: Kevin John Ash, Michael Thomas Benhase, Lokesh Mohan Gupta, David Blair Whitworth
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Publication number: 20140082254Abstract: For cache/data management in a computing storage environment, incoming data segments into a Non Volatile Storage (NVS) device of the computing storage environment are validated against a bitmap to determine if the incoming data segments are currently in use. Those of the incoming data segments determined to be currently in use are designated to the computing storage environment to protect data integrity.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, Kenneth Wayne TODD
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Publication number: 20140082292Abstract: A processor, operable in a computing storage environment, allocates portions of a Scatter Index Table (SIT) disproportionately between a larger portion dedicated for meta data tracks, and a smaller portion dedicated for user data tracks, and processes a storage operation through the disproportionately allocated portions of the SIT using an allocated number of Task Control Blocks (TCB).Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, Kenneth Wayne TODD
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Publication number: 20140082296Abstract: Data operations, requiring a lock, are batched into a set of operations to be performed on a per-core basis. A global lock for the set of operations is periodically acquired, the set of operations is performed, and the global lock is freed so as to avoid excessive duty cycling of lock and unlock operations in the computing storage environment.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, Kenneth Wayne TODD, David Blair WHITWORTH
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Publication number: 20140082231Abstract: For a plurality of input/output (I/O) operations waiting to assemble complete data tracks from data segments, a process, separate from a process responsible for the data assembly into the complete data tracks, is initiated for waking a predetermined number of the waiting I/O operations. A total number of I/O operations to be awoken at each of an iterated instance of the waking is limited.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, David Blair WHITWORTH
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Publication number: 20140082629Abstract: A set of like tasks to be performed is organized into a first group. Upon a determined imbalance between dispatch queue depths greater than a predetermined threshold, the set of like tasks is reassigned to an additional group.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin John ASH, Michael Thomas BENHASE, Lokesh Mohan GUPTA, Trung Ngoc NGUYEN
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Patent number: 8667237Abstract: A method for deleting a relation between a source and a target in a multi-target architecture is described. The multi-target architecture includes a source and multiple targets mapped thereto. In one embodiment, such a method includes initially identifying a relation for deletion from the multi-target architecture. A target associated with the relation is then identified. The method then identifies a sibling target that inherits data from the target. Once the target and the sibling target are identified, the method copies the data from the target to the sibling target. The relation between the source and the target is then deleted. A corresponding computer program product is also disclosed and claimed herein.Type: GrantFiled: March 8, 2011Date of Patent: March 4, 2014Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Jr., Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren
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Patent number: 8549225Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.Type: GrantFiled: March 26, 2012Date of Patent: October 1, 2013Assignee: Internatioal Business Machines CorporationInventors: Stephen LaRoux Blinick, Cheng-Chung Song, Lokesh Mohan Gupta, Yu-Cheng Hsu
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Patent number: 8478945Abstract: Method, system, and computer program product embodiments for facilitating data transfer from a write cache and NVS via a device adapter to a pool of storage devices by a processor or processors are provided. The processor(s) adaptively varies the destage rate based on the current occupancy of the NVS for a particular storage device and stage activity related to that storage device. The stage activity includes one or more of the storage device stage activity, device adapter stage activity, device adapter utilized bandwidth and the read/write speed of the storage device. These factors are generally associated with read response time in the event of a cache miss and not ordinarily associated with dynamic management of the destage rate. This combination maintains the desired overall occupancy of the NVS while improving response time performance.Type: GrantFiled: February 1, 2010Date of Patent: July 2, 2013Assignee: International Business Machines CorporationInventors: Kevin John Ash, Lokesh Mohan Gupta
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Patent number: 8458134Abstract: A method for providing rolling continuous data protection of source data is disclosed. In one embodiment, such a method includes enabling a user to select source data and establish a first interval when point-in-time copies of the source data are generated. The method further enables the user to specify a first number of point-in-time copies to retain at the first interval. The method further enables the user to specify a second number of point-in-time copies to retain at a second interval, wherein the second interval is a (n?2) multiple of the first interval. The method further enables the user to specify a third number of point-in-time copies to retain at a third interval, wherein the third interval is a (n?2) multiple of the second interval. A corresponding apparatus and computer program product are also disclosed.Type: GrantFiled: March 30, 2011Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Theresa Mary Brown, Lokesh Mohan Gupta, Carol Santich Mellgren, Gail Andrea Spear
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Patent number: 8255627Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed and claimed herein.Type: GrantFiled: October 10, 2009Date of Patent: August 28, 2012Assignee: International Business Machines CorporationInventors: Stephen LaRoux Blinick, Cheng-Chung Song, Lokesh Mohan Gupta, Yu-Cheng Hsu
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Publication number: 20120131293Abstract: Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.Type: ApplicationFiled: November 19, 2010Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael Thomas Benhase, Lokesh Mohan Gupta, Yu-Cheng Hsu, Alfred Emilio Sanchez
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Patent number: 8095738Abstract: A method for allocating space in a cache based on media I/O speed is disclosed herein. In certain embodiments, such a method may include storing, in a read cache, cache entries associated with faster-responding storage devices and cache entries associated with slower-responding storage devices. The method may further include implementing an eviction policy in the read cache. This eviction policy may include demoting, from the read cache, the cache entries of faster-responding storage devices faster than the cache entries of slower-responding storage devices, all other variables being equal. In certain embodiments, the eviction policy may further include demoting, from the read cache, cache entries having a lower read-hit ratio faster than cache entries having a higher read-hit ratio, all other variables being equal. A corresponding computer program product and apparatus are also disclosed and claimed herein.Type: GrantFiled: June 15, 2009Date of Patent: January 10, 2012Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Lawrence Yiumchee Chiu, Lokesh Mohan Gupta, Yu-Cheng Hsu