Abstract: A compiler and a method of compiling code that reduces memory bandwidth when processing code on a computer are provided herein. In one embodiment, the method includes: (1) automatically identifying a sequence of operations for fusing, wherein the sequence of operations correspond to instructions from a source code, (2) determining subdivisions of a final output of the sequence of operations, (3) determining input data and intermediate operations needed to obtain a final subdivision output for each of the subdivisions and (4) automatically generating code to fuse the sequence of operations employing the subdivisions, wherein the automatically identifying and the automatically generating are performed by a processor.

Abstract: The present invention relates to use of novel securinine and norsecurine analogs to bind and/or inhibit myeloperoxidase activity.

Abstract: A method and system for security authorization on an electronic device are disclosed. The method includes detecting whether a trusted device is present in proximity to the electronic device. The trusted device is associated with a user profile of the electronic device, and the user profile includes access to private information. The method further includes allowing access to the user profile in response to detecting that the trusted device is present in proximity to the electronic device, and defaulting access to a public user profile of the electronic device in response to detecting a lack of presence of the trusted device in proximity to the electronic device.

Abstract: A method of constructing seismic shock absorbing structure which transfers horizontal and vertical forces from the floor to allow buildings to withstand earthquake shocks. In a first embodiment, foundation column is structurally designed and casted in the form of a fin shape below plinth level. In another embodiment, strength of the construction frame is enhanced by structurally designing, casting and slotting in at least one of rhombus shaped beams, diagonal cross beams, corner beams, plus shaped beams, rectangle shaped beams, semi-quarter circular beams in horizontal, vertical and inclined directions at the plinth level, below and above the plinth level. In another embodiment, wall is interlocked with at least one of Reinforced Cement Concrete (RCC), cement composites, steel, iron, metal, concrete, polystyrene, polyurethane, wood, plastic, fired bricks, cardboard and clay blocks. In another embodiment, interlocked wall is reinforced with GI (Galvanized) welded mesh, fiberglass mesh and wire mesh.

Abstract: An integrated circuit design may include registers and combinational logic. Integrated circuit design computing equipment may perform retiming for the circuit design, where registers are moved across one or more portions of the combinational logic. The registers may be retimed while considering hybrid initial states of the registers. At least some of the registers may have don't-care initial states. When performing backward retiming, initial states of the retimed registers may be computed that is consistent with the original initial state and functionality of the combinational logic while maximizing the number of don't-care initial states. When performing forward retiming across non-justifiable combinational elements, any don't-care initial states may be assumed to be equal to a deterministic binary value, and the initial states of the retimed registers may be computed that is consistent with the original initial states and functionality of the combinational logic.

Abstract: Embodiments of processors, methods, and systems for reconfiguring a processor without a system reset are described. In an embodiment, a processor includes configuration storage, shadow configuration storage, trigger storage, and a trigger circuit. The trigger circuit is to cause, based on trigger storage content, shadow configuration storage content to be copied to the configuration storage.

Abstract: Platform controller, computer-readable storage media, and methods associated with initialization of a computing device. In embodiments, a platform controller may comprise a boot controller and one or more non-volatile memory modules, coupled with the boot controller. In embodiments, the one or more non-volatile memory modules may have first instructions and second instructions stored thereon. The first instructions may, when executed by a processor of a computing device hosting the platform controller, cause initialization of the computing device. The second instructions, when executed by the boot controller, may cause the boot controller to monitor at least a portion of the execution of the first instructions by the computing device and may generate a trace of the monitored portion of the execution of the first instructions. In embodiments, the trace may be stored in the one or more non-volatile memory modules. Other embodiments may be described and/or claimed.

Abstract: The present invention is related to detecting location of a navigation device using sensor data analysis, where the sensor is coupled to the navigation device. A hierarchical algorithm is used for making a series of decisions regarding the location of the navigation device, with each decision corresponding to a class among a plurality of classes related to the possible motion modes and/or precise location of the device, including the location of the device with respect to a person's body. By accurately identifying the device location, the hierarchical algorithm facilitates in providing relevant contextual information, thereby enhancing situational awareness.

Abstract: Various embodiments of the present invention are directed to methods, systems and computer program products for conducting an online transaction on a website involving sensitive information. Such embodiments provide methods, systems and computer program products to: (a) register at least one entity with a gate keeper module, the registering comprising associating the entity with a subscription level; (b) associate a sub-string of a character string with a unique token so that a direct link does not exist between the unique token and the character string; and (c) during processing of the online transaction: (i) using the unique token for intermediate steps during the processing of the online transaction; and (ii) only accessing the character string in storage memory to complete the online transaction after receiving a request from at least one registered entity associated with a subscription level associated with a privilege to receive the requested sensitive information.

Abstract: A system and method for performing text-to-speech (TTS) processing of textual works, such a literary works. The system and method process text of these works and determine offsets corresponding to one or more of chapters, paragraphs, sentences, words, section of dialogs, sections of other context. Using these offsets, the system and method determine which portion and how much of a work to process using TTS processing at a time to produce a high quality audio output. This audio output may then be sent to a user device to allow the user device to play the audio output of the TTS processing.

Abstract: The present application provides a method for treating patients in need of psychiatric treatment, wherein said patient is being treated with the 3-month formulation of paliperidone palmitate and fails to take the next scheduled dose of the 3-month formulation of paliperidone palmitate.

Abstract: A serial point-to-point link interface to enable communication between a processor and a device, the high speed serial point-to-point link interface including a transmitter to transmit serial data, a receiver to deserialize serial data, and control logic to implement a protocol stack. The protocol stack supports a plurality of power management states, including an active state, a first off state, in which a supply voltage is maintained, and a second off state, in which the supply voltage is not to be provided to the device. The protocol stack provides a default recovery time to allow the device to begin a transition from the first off state to the active state prior to accessing the device. The protocol stack further provides for accessing the device prior to expiration of the default recovery time to complete the transition based on a device-advertised recovery time.

Abstract: Systems for prequalifying components for a processing chamber are described. The systems may be used to clean particulates from chamber parts and concurrently quantify the cleanliness. The systems may be used to qualify replacement parts before sending to a customer site for installation. The systems have three adjacent compartments separated by impermeable barriers. All three compartments are filled with liquid while cleaning a chamber component. The center compartment contains a submerged component for cleaning and qualifying. Two compartments on either side of the center compartment are configured with submerged ultrasonic transducers to deliver ultrasonic energy to either side of the component being cleaned and prequalified. A liquid pump is connected to the cleaning tub to recirculate water from the cleaning bath and another liquid pump is configured to remove a small amount of the cleaning bath to sample particulates.

Abstract: The present disclosure relates to skin adhesives, antimicrobial compositions, and articles thereof, including methods and processes of forming such antimicrobial compositions, medical devices, and articles thereof. The antimicrobial compositions include, for example, adhesive compositions, gels, cleansers, wound dressings and foams.

Abstract: A global navigation satellite system (GNSS) antenna sharing receiver (GNSSASR) for sharing a GNSS antenna with one or more secondary GNSS receivers is provided. The GNSSASR includes an input radio frequency (RF) port for receiving a GNSS signal from the GNSS antenna, one or more output RF ports for transmitting the GNSS signal to the secondary GNSS receivers, a coupler for reducing attenuation in the GNSS signal transmitted to the secondary GNSS receivers, a power supply circuit for supplying a direct current (DC) voltage with reduced loss to the GNSS antenna based on availability of a secondary GNSS receiver, and a current monitoring circuit for monitoring DC flow to the GNSS antenna from the power supply circuit, limiting an increase in the DC flow due to a fault in the GNSS antenna, and indicating a fault in the GNSS antenna to the GNSSASR and the secondary GNSS receivers.

Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a capacitor, where the capacitor includes a first capacitor plate and a second capacitor plate. The first capacitor plate includes a first memory cell, and the second capacitor plate includes a second memory cell. The capacitor is utilized as a functional capacitor in the integrated circuit.

Abstract: Provided are methods of assessing the cleanliness of a flow cell of a flow cytometric system. The provided methods include computing a ratio of post-flow cell and pre-flow cell light beam intensities and using such a ratio to assess the cleanliness of the flow cell. Flow cytometric systems capable of monitoring the cleanliness of a flow cell contained within the system are also provided.

Abstract: Ethernet fault management systems and methods using programmable Type-Length-Value (TLV) offsets combine software-based Operations, Administration, and Maintenance (OAM) protocol support with hardware-based fault management support to delegate generation and processing of OAM protocol messages to hardware devices with the software-based protocol support used to program hardware based on fixed offsets in the OAM protocol messages. The hardware can be designed to be flexible since the hardware can be agnostic to the logic within the OAM protocol which would reside in the software. The Ethernet fault management systems and methods combine the flexibility of software-based approaches with the speed and efficiency of hardware-based approaches.

Abstract: An apparatus includes a memory and one or more processors operably connected to the memory. The one or more processors are configured to receive data collected from a process facility system, detect anomalies for field device or process failures associated with the process facility system that are not monitored by alarms, detect leading indicators for field device or process failures that are monitored by alarms, and monitor the process facility system to detect further anomalies and leading indicators before failures occur.

Abstract: Disclosed herein is a sensor chip including at least one sensing device and a control circuit. The control circuit is configured to receive configuration data as input, and acquire data from the at least one sensing device in accordance with the configuration data. The control circuit classifies a context of the at least one sensing device relative to its surroundings based on analysis of the acquired data in accordance with the configuration data.