Abstract: A thin-film element assembly includes: a base having flexibility and a plurality of thin-film elements provided on a first surface of the base, wherein a second region where no thin-film element is provided is formed in the base in an outer side of a first region where a plurality of thin-film elements are provided, and wherein convex portions are formed in the second region of the first surface of the base, or the second region of a second surface, or the second region of each of the first and second surfaces.

Abstract: Disclosed herein is an encoding apparatus which combines an RLL code word and an error correction code word, with an interleaving technique when encoding, including: an error correction encoding section; an interleaving section; and an RLL encoding section, wherein, if an address i (i is an integer satisfying relations 0?i<k×m) is assigned to each symbol of k×m error correction code words and xij is denoting the number of symbols included in n symbols of a jth (j is an integer satisfying relations 0?j<m) code word of m error correction code words to serve as symbols corresponding to the address i of an information word of an RLL code, for any j, the interleaving section interleaves a series inside an information word of the RLL code word so that the following relations are satisfied: ? i ? x ij = n ? ? and ? ? x ij > 0.

Abstract: A phase synchronization apparatus includes: a sampling section; a phase-error detection section; a first computation section; a second computation section; and an interpolation section.

Abstract: An encoding method encodes by using a quasi-cyclic code having a code length of n=m n0 and an information word length of k=m k0. The method includes the steps of: creating a systematic code with as many as (n0?k0) parity bits inserted therein in units of an information word k0; making all combinations of (n0?k0) parity bit positions that may occur in units of n0 bits; describing many of m×m cyclic matrices by rearranging the sequence of columns in a parity check matrix in the combinations; subjecting the parity check matrix to elementary transformation to create a unit matrix in which (n?k)×(n?k) matrices made up of the columns corresponding to the parity bit positions; regarding the transformed matrix as a first matrix and this matrix minus the unit matrix as a second matrix; and allocating (n?k) bit positions for the parity bits in such a manner that the number of non-zero elements included in the second matrix is minimized.

Abstract: Disclosed herein is a coding method including the step of: coding an information sequence in such a manner that upon performing error correction coding after carrying out RLL coding of the information sequence, the maximum number of consecutive 1-bits or 0-bits is ??? or less in an RLL code word over a range from bit p?? to bit p+??1 of the RLL code word and that a ?-bit error correcting code parity sequence is inserted between bit p?1 and bit p of the RLL code word, where ? is a number larger than 1 representing the maximum number of consecutive 0-bits or 1-bits in an n-bit RLL code word and where p is a natural number.

Abstract: In an encoding and/or decoding method utilizing a self-orthogonal Quasi-Cyclic (QC) code whose parity check matrix is expressed by at least one circulant matrix, a code sequence is generated which satisfies a check matrix. The check matrix is designed so that a column weight w of each circulant matrix is three or larger and a minimum hamming distance of the code is w+2 or larger.

Abstract: The present invention relates to a device and a method for transmission, a device and a method for reception, and a program that make it possible to obtain an undetected error probability characteristic close to a limit value in a system using a CRC for a plurality of pieces of data having different code lengths. A generator polynomial for header data which generator polynomial is used when a CRC coding process is performed on header data and a generator polynomial for sub-header data which generator polynomial is used when the CRC coding process is performed on sub-header data are set in a transmitting device 101. The transmitting device 101 selects a generator polynomial according to data set as an object of the CRC coding process. The generator polynomial for header data is a generator polynomial whose undetected error probability becomes lower when used for data of 176 bits equal to the code length of header data.

Abstract: Disclosed herein is a decoding apparatus including: with N and x each being a positive integer and k being a positive integer being equal to or greater than 1, a shift register of k stages configured to accumulate path select information for k inputs that is information about a survivor path of xN bits made up of radix-2x in each transient state of a convolutional code of the number of states N; a path memory having one bank configured to store, at one address, the path select information for k inputs accumulated in the shift register; and a traceback circuit configured to trace back paths for m=rkx time in one clock by use of the path select information read from the path memory with t being a divisor of kx and r being 2 or 1/t.

Abstract: A coder converts M-bit information words into N-bit code words by generating a first and a second provisional code sequence using a coding rule by which, code words are logically assigned to information words so that a two's complement of a sum of coding bits included in the first provisional code sequence, is always different from a two's complement of a sum of coding bib included in the second provisional code sequence, when a first code state of the first sequence encoded starting from a predetermined original state is identical to a second code state of the second sequence encoded starting from said predetermined original state. Then, selecting either the first sequence or the second sequence depending on a value of at least one parameter that correlates with a DC content of the coded bit stream.

Abstract: The present invention relates to coding method and coding device that allow Rate-Compatible LDPC (low-density parity-check) codes to have favorable BER performance both with a low code rate and with a high code rate. In coding of LDPC codes that have plural code rates and whose all parity check matrices are composed of plural cyclic matrices, a coder 121 performs the coding in such a way that 1<w0 and w1<w0 are satisfied when the maximum column weight of the cyclic matrices in the check matrix of a certain code whose code rate is not the minimum value among the LDPC codes is defined as w0 and the maximum column weight of the cyclic matrices in the check matrix of a code having a code rate lower than that of the certain code is defined as w1.

Abstract: A transmission apparatus includes: a CRC encoding processing unit configured to include a plurality of generating polynomials for an CRC encoding processing with each of a plurality of data of which the code lengths differ as a target, and employ the optimal generating polynomial out of the plurality of generating polynomials to perform the CRC encoding processing; and a transmission unit configured to transmit data obtained by the CRC encoding processing unit performing the CRC encoding processing.

Abstract: Disclosed herein is an encoding apparatus which combines an RLL code word and an error correction code word, with an interleaving technique when encoding, including: an error correction encoding section; an interleaving section; and an RLL encoding section, wherein, if an address i (i is an integer satisfying relations 0?i<k×m) is assigned to each symbol of k×m error correction code words and xij is denoting the number of symbols included in n symbols of a jth (j is an integer satisfying relations 0?j<m) code word of m error correction code words to serve as symbols corresponding to the address i of an information word of an RLL code, for any j, the interleaving section interleaves a series inside an information word of the RLL code word so that the following relations are satisfied: ? i ? x ij = n ? ? and ? ? x ij > 0.

Abstract: An encoding method is disclosed for use with an encoding apparatus for carrying out variable-length conversion encoding involving a look-ahead operation of at least either one information word or one code word upon encoding. The encoding method includes the step of performing conversion encoding in such a manner as to permit decoding of encoded words in units of a code word.

Abstract: A flat discharge lamp includes a projection formed on an outer surface of a case body. The projection forms a thick portion, which is relatively thick, in the case body. An intake-outtake port is formed in the thick portion so that it can receive a chip tube having an outer diameter of a size larger than or the same as a gap. The large chip tube can be coupled to a hermetic case without any limitations resulting from the gap of a discharge chamber (15). The large chip tube resists damaging and improves gas replacement efficiency in the discharge chamber without affecting discharge characteristics of the flat discharge lamp.

Abstract: Systems and methods for ending, storing and transmitting data generate error correcting code words for data that is provided for each of a plurality of channels. The error correcting code words include data from each of the plurality of channels and the resultant data is rearranged into a plurality of data blocks such that a loss of the rearranged physically adjacent data block reduces an amount of data lost from a common error correcting code word.

Abstract: A flat discharge lamp (19) for an illumination device includes a transparent electrode (15) formed on a glass plate (12) located on an illumination surface side. A shield plate (34) is arranged between at attachment surface (31) and an electrode (14). The attachment surface has ground potential, and the transparent electrode and shield plate are electrically connected to a ground terminal (28E) of the drive circuit (28). The shield plate and transparent electrode, which have ground potential, electromagnetically shields the discharge lamp.

Abstract: Presently known d=1 codes have long trains consisting of consecutive 2T runs and an overall high frequency of occurrence of the shortest 2T runs that reduce the performance of the bit detector By using a code with an MTR constraint of 2 an improvement in the bit detection is achieved. A code constructed in a systematic way that provides an MTR constraint of 2 is presented. A variation of such a code is disclosed where one sub-code is used, where coding states are divided into coding classes and where code words are divided into code word types. Then, for a given sub-code, an code word of type t can be concatenated with an code word of the next sub-code if said subsequent code word of said next sub-code belongs to one of coding states of the coding class with index Tmax+1 t.

Abstract: Disclosed herein is a CRC generator polynomial select method for selecting a generator polynomial to be used in CRC coding processing and/or CRC processing of inspecting a CRC processing result, the CRC generator polynomial select method may include a first process of finding largest minimum Hamming distances Max.dmin; a second process of finding code lengths n for each of the largest minimum Hamming distances Max.dmin and determining a range expressed by relations nmin (r, Max.dmin)?n?nmax (r, Max.dmin); a third process of searching all generator polynomials G(x) for specific generator polynomials G(x); and a fourth process of selecting final generator polynomials G(x) each having a smallest term count w and a lowest code undetected-error probability Pud from the specific generator polynomials G(x).

Abstract: In the present application, there is provided a decoding apparatus for decoding low density parity check codes, including: a plurality of storage sections configured to store logarithmic likelihood ratios or logarithmic posteriori probability ratios for one codeword into addresses thereof which are independent of each other thereamong; and a readout section configured to simultaneously read out, from among the logarithmic likelihood ratios or logarithmic posteriori probability ratios for the one codeword stored in the storage sections, a plurality of ones of the logarithmic likelihood ratios or logarithmic posteriori probability ratios which correspond to non-zero value elements in a predetermined one row of the check matrix used in a coding process of the low density parity check codes.

Abstract: An encoding method encodes by using a quasi-cyclic code having a code length of n=m n0 and an information word length of k=m k0. The method includes the steps of: creating a systematic code with as many as (n0?k0) parity bits inserted therein in units of an information word k0; making all combinations of (n0?k0) parity bit positions that may occur in units of no bits; describing many of m×m cyclic matrices by rearranging the sequence of columns in a parity check matrix in the combinations; subjecting the parity check matrix to elementary transformation to create a unit matrix in which (n?k)×(n?k) matrices made up of the columns corresponding to the parity bit positions; regarding the transformed matrix as a first matrix and this matrix minus the unit matrix as a second matrix; and allocating (n?k) bit positions for the parity bits in such a manner that the number of non-zero elements included in the second matrix is minimized.