Patents by Inventor Makoto Noda

Makoto Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050168357
    Abstract: A code sequence is encoded using a code conversion table in which the parity of the code sequence varies until the code states become equal to each other. The code word assignment used in this code conversion table is such that the decoded code word constraint length is 3 blocks and q0?q1 for an arbitrary information sequence is satisfied even if a DC control bit is inserted at any of the first and second bits of an information word. For example, code states s0 and s1 when information sequences do and d1 resulted from insertion of provisional DC control bits 1 and 0 inserted at the top of an information sequence “1, 1, 0, 0, 0, 1, 0” are encoded starting with a state 3 according to a predetermined code conversion table are equal to each other, namely, s0=s1=6, in a third block, and two's complement q0 of a sum of code sequences co up to a time when the code states are equal to each other is “0” while two's complement q1 of a sum of code sequences c1 up to that time is “1”.
    Type: Application
    Filed: March 31, 2005
    Publication date: August 4, 2005
    Inventors: Makoto Noda, Hiroyuki Yamagishi
  • Publication number: 20050166123
    Abstract: A transmission/reception system is provided. In a transmitter, error correction data is added to each set of N TS packets, an RTP packet is generated by collecting M (N>M) TS packets with the added error correction data and sequentially assigning a sequence number to each set of the M TS packets, and each RTP packet is transmitted by converting the RTP packets into data transmittable to a receiver. In the receiver, the data from the transmitter is received, the RTP packet is acquired from the data received, it is judged, from the sequence number of the RTP packet, whether there is any dropped packet not received, and the dropped packet is corrected by using the RTP packets, if there is a dropped packet not received.
    Type: Application
    Filed: December 22, 2004
    Publication date: July 28, 2005
    Applicant: SONY CORPORATION
    Inventors: Kaoru Yanamoto, Makoto Noda, Keitarou Kondou, Masashi Shinagawa, Takatsuna Sasaki
  • Patent number: 6891483
    Abstract: A code sequence is encoded using a code conversion table in which the parity of the code sequence varies until the code states become equal to each other. The code word assignment used in this code conversion table is such that the decoded code word constraint length is 3 blocks and q0?q1 for an arbitrary information sequence is satisfied even if a DC control bit is inserted at any of the first and second bits of an information word. Code states s0 and s1 when information sequences d0 and d1 resulted from insertion of provisional DC control bits 1 and 0 inserted at the top of an information sequence “1, 1, 0, 0, 0, 1, 0” are encoded starting with a state 3 according to a predetermined code conversion table are equal to each other, namely, s0=s1=6, in a third block, and two's complement q0 of a sum of code sequences c0 up to a time when the code states are equal to each other is “0” while two's complement q1 of a sum of code sequences c1 up to that time is “1”. That is, the condition that q0?q1 is met.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: May 10, 2005
    Assignee: Sony Corporation
    Inventors: Makoto Noda, Hiroyuki Yamagishi
  • Patent number: 6850573
    Abstract: More code words are assigned to the data word. There are 71949 code words that can take the start point at the state 4 and there are 71949 code words that can take the start point at the state 5, and out of these code words, there are 27126 duplicate code words that can take the start point at both the state 4 and the state 5. In this example, the duplicate code word can be discriminated during decoding, and therefore assigned to the data word in one-to-one relation. Because 44823 (=71949?27126) code words that can take the start point at only the state 4 and 44823 code words that can take the start point at only the state 5 are different from each other, two code words, namely a code word that can take only the state 4 and a corresponding code word that can take only the state 5 are assigned to one data word. In other words, 71949 (=44823×2÷2+27126) code words are selected.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: February 1, 2005
    Assignee: Sony Corporation
    Inventor: Makoto Noda
  • Publication number: 20040251504
    Abstract: A field effect transistor comprises, at least, a channel forming region formed in a semiconductor layer, and a gate electrode provided in face-to-face relation with the channel forming region via a gate insulating film, wherein the semiconductor layer is made of a mixture of a semiconductor material layer and conductive particles. The field effect transistor is capable of enhancing a carrier mobility.
    Type: Application
    Filed: May 6, 2004
    Publication date: December 16, 2004
    Applicant: Sony Corporation
    Inventor: Makoto Noda
  • Publication number: 20040243914
    Abstract: The present invention is to reduce the maximum magnetization reversal interval of a trellis code. A trellis diagram for the trellis code takes into consideration a constraint condition on the DSV of a code and an inter-symbol-interference for three bits. The minimum squared Euclidean distance is 4. When a non-interleaving encoder and a non-de-interleaving code detector are constructed using the trellis diagram, the maximum magnetization reversal interval of a trellis code to be used is reduced to half of that in a known case while having the error rate and circuit size approximately equal to those in the known case. The trellis diagram has a basic repeating unit for two bits. In the actual apparatus, the trellis diagram is repeatedly used. The present invention is applicable to a read/write apparatus.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 2, 2004
    Inventor: Makoto Noda
  • Publication number: 20040217888
    Abstract: A code sequence is encoded using a code conversion table in which the parity of the code sequence varies until the code states become equal to each other. The code word assignment used in this code conversion table is such that the decoded code word constraint length is 3 blocks and q0≠q1 for an arbitrary information sequence is satisfied even if a DC control bit is inserted at any of the first and second bits of an information word.
    Type: Application
    Filed: March 10, 2004
    Publication date: November 4, 2004
    Inventors: Makoto Noda, Hiroyuki Yamagishi
  • Publication number: 20040136467
    Abstract: The present invention establishes a metric calculation method which has an accuracy higher than that in which an approximation is used and which does not use a multiplier. A constant calculation circuit 31 calculates constants V/2−A, V/2+A, and A/2, which are required to calculate branch metrics by using an average voltage V/2, corresponding to a parameter R input from an asymmetrical register, which is input from an average voltage register, and outputs them to adders 33, 35, and 36, respectively. A multiplier 32 multiplies an equalized signal yk by a value P of 1 or −1 input from a polarity register. A bit shifter 37 shifts by c bits A/2−yk, corresponding to the parameter R input from the asymmetrical register, which is input from the adder 36. That is, the bit shifter 37 multiplies A/2−yk by &agr;, and outputs it to adders 38 and 39. However, when the parameter R is 0, the bit shifter 37 outputs 0 to the adders 38 and 39.
    Type: Application
    Filed: June 3, 2003
    Publication date: July 15, 2004
    Inventor: Makoto Noda
  • Patent number: 6680583
    Abstract: An abnormality detection circuit detects abnormality relating to ground fault in secondary winding circuitry of transformer, non-grounding fault of transformer assembly casing or false connection of the AC power source to the transformer assembly in reverse polarity. An interrupter circuit turns a switch off in response to detection of the abnormality by the abnormality detection circuit to interrupt the supply of the AC power to the transformer. When the supply of the AC power is interrupted, the switch is connected to a restart circuit, whereupon the circuit is activated to allow a charging current to flow to a capacitor, which is connected in series in a drive current path of a drive circuit with a time delay on the order of 0.5 to 1.0 second which is determined by a delay circuit thereof. The charging current drives a restoring circuit, which controls the interrupter circuit to its restoring condition temporally so that the switch is turned to its “on” condition only once.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: January 20, 2004
    Assignee: Lecip Corporation
    Inventors: Makoto Noda, Yoshihiro Nakamura, Hideki Shimizu, Ikuo Suzuki, Daiki Goshima, Yoshihiro Matsui, Tadayoshi Samura, Ryoichi Uda, Takahiro Takizuka
  • Patent number: 6480983
    Abstract: A code state determining method for spectral-null type trellis code of which the number of states of start points and end points of code words is restricted to two or more is disclosed, that comprises the step of determining states of end points of code corresponding to a state-determination state transition diagram of which prohibited output code is newly assigned as an additional path to a code output prohibited state of a state transition diagram having a particular restriction with respect to a cumulated value.
    Type: Grant
    Filed: April 13, 1999
    Date of Patent: November 12, 2002
    Assignee: Sony Corporation
    Inventor: Makoto Noda
  • Publication number: 20020133782
    Abstract: A code state determining method for spectral-null type trellis code of which the number of states of start points and end points of code words is restricted to two or more is disclosed, that comprises the step of determining states of end points of code corresponding to a state-determination state transition diagram of which prohibited output code is newly assigned as an additional path to a code output prohibited state of a state transition diagram having a particular restriction with respect to a cumulated value.
    Type: Application
    Filed: April 13, 1999
    Publication date: September 19, 2002
    Inventor: MAKOTO NODA
  • Publication number: 20020125837
    Abstract: An abnormality detection circuit 22 delivers a detected abnormality relating to a transformer 11. An interrupter circuit 23 turns a switch 16 off to interrupt the supply of the power to the transformer 11. When the supply of the power is interrupted, the switch 16 is connected to a restart circuit 31, whereupon the circuit 31 is activated to allow a charging current to flow to a capacitor, which is connected in series in a drive current path of a drive circuit 32 with a time delay on the order of 0.5 to 1.0 second which is determined by a delay circuit thereof. The charging current drives a restoring circuit 33, which controls the interrupter circuit 23 so that the switch 16 is turned on.
    Type: Application
    Filed: March 8, 2002
    Publication date: September 12, 2002
    Applicant: LECIP CORPORATION
    Inventors: Makoto Noda, Yoshihiro Nakamura, Hideki Shimizu, Ikuo Suzuki, Daiki Goshima, Yoshihiro Matsui, Tadayoshi Samura, Ryoichi Uda, Takahiro Takizuka
  • Patent number: 6377063
    Abstract: The semiconductor device includes a circuit, such as, an ECL circuit for comparing input signals with a reference potential determined as a circuit threshold value and outputting an output signal according to the comparison result. The semiconductor device further includes a switching circuit for switching the reference potential level between ordinary operation and burn-in operation of the ECL circuit. The time required for the burn-in operation can be reduced markedly.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: April 23, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahiro Kuroda, Makoto Noda
  • Patent number: 6133661
    Abstract: The invention relates to a rotating electric machine including a coil of a wire having thereon an insulating coating comprising a polybenzimidazole. This rotating electric machine is stably maintained for a long time in dielectric strength even under a highly radioactive environment, due to the use of the special insulating coating. With this, the rotating electric machine can be driven stably for a long time. The invention further relates to another rotating electric machine including (a) a rotor having a rotating shaft; (b) a bearing for supporting the rotating shaft; and (c) a grease applied to the bearing. This grease contains (1) a polyphenyl ether having at least three aromatic rings in the molecule and (2) a urea. The rotor of this rotating electric machine is stably supported in the bearing for a long time even under a highly radioactive environment, due to the use of the special grease. Thus, this rotating electric machine can also be rotated stably for a long time.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: October 17, 2000
    Assignees: Kabushiki Kaisha Meidensha, Kandenko Co., Ltd., Sumitomo Wiring Systems, Ltd.
    Inventors: Yoshinao Okawa, Yoshihiro Murano, Isao Ito, Kenichi Okada, Kazuo Funabashi, Masanori Miyamoto, Kiyohito Mizuide, Yasuhiko Onishi, Masaaki Hoko, Hirotugu Kinoshita, Fumihiro Itano, Makoto Noda, Takeshi Uesugi, Kiyoshi Nagasawa, Shuzo Tanigaki, Yoshiyuki Ema
  • Patent number: 5969536
    Abstract: The semiconductor device includes a circuit, such as, an ECL circuit for comparing input signals with a reference potential determined as a circuit threshold value and outputting an output signal according to the comparison result. The semiconductor device further includes a switching circuit for switching the reference potential level between ordinary operation and burn-in operation of the ECL circuit. The time required for the burn-in operation can be reduced markedly.
    Type: Grant
    Filed: February 13, 1997
    Date of Patent: October 19, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahiro Kuroda, Makoto Noda
  • Patent number: 5627477
    Abstract: The semiconductor device includes a circuit, such as, an ECL circuit for comparing input signals with a reference potential determined as a circuit threshold value and outputting an output signal according to the comparison result. The semiconductor device further includes a switching circuit for switching the reference potential level between ordinary operation and burn-in operation of the ECL circuit. The time required for the burn-in operation can be reduced markedly.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: May 6, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahiro Kuroda, Makoto Noda
  • Patent number: 5607740
    Abstract: A magnetic disc according to this invention is of a structure in which underlying layer and magnetic layer are formed in succession on non-magnetic substrate, and one non-magnetic intermediate layer or more and one second magnetic layer or more are further stacked one after another thereon. The non-magnetic intermediate layer is formed as film layer by sputtering, and film thickness calculated by film formation rate and film formation time is 0.2 nm.about.1.0 nm. Thus, with this magnetic disc, coercive force is improved. Accordingly, signals can be recorded at higher density. As a result, application to magnetic disc devices of larger memory capacity can be made.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: March 4, 1997
    Assignee: Sony Corporation
    Inventor: Makoto Noda
  • Patent number: 5497310
    Abstract: DC power is converted by an inverter to high-frequency power, which is supplied to the primary winding of a neon transformer. One or more neon tubes are connected in series across the secondary winding of the neon transformer. A saturable reactor is connected across the secondary winding or the neon transformer. The saturable reactor has a characteristic that its magnetic flux is saturated when the output voltage from the secondary winding of the neon transformer increases 1.1 to 2.0 times the rated voltage.
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: March 5, 1996
    Assignee: Kabushiki Kaisha Sanyo Denki Seisakusho
    Inventors: Makoto Noda, Fumio Ichimiya, Ryoichi Uda
  • Patent number: 5303092
    Abstract: A magnetic transfer method for transferring information signals recorded on a master medium onto a slave medium which is placed in pressure contact with the master medium by impressing a bias magnetic field wherein the relationship between the longitudinal remanent coercivity Hr.sub.1 of the master medium is equal to or twice the perpendicular remanent coercivity Hr.sub.2 of the slave medium.
    Type: Grant
    Filed: March 5, 1991
    Date of Patent: April 12, 1994
    Assignee: Sony Corporation
    Inventor: Makoto Noda
  • Patent number: 5122255
    Abstract: An atmosphere control system, including, a standard gas supplying device for supplying a gas of a determined composition, an oxygen concentration controlling device connected to the standard gas supplying device for adjusting oxygen concentration of the gas of the determined composition, an atmosphere holding device connected to the oxygen concentration controlling device for receiving the oxygen concentration adjusted gas, and an oxygen concentration measuring device arranged at the upstream side of the atmosphere holding device between the standard gas supplying device and the oxygen concentration controlling device or between the oxygen concentration controlling device and the atmosphere holding device or at the downstream side of the atmosphere holding device for measuring oxygen concentration in the gas at the position of the oxygen concentration measuring device is provided.
    Type: Grant
    Filed: November 24, 1989
    Date of Patent: June 16, 1992
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Noda, Toru Kikuchi