Patents by Inventor Manfred Schneegans

Manfred Schneegans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9640419
    Abstract: In accordance with an alternative embodiment of the present invention, a method for forming a semiconductor device includes applying a paste over a semiconductor substrate, and forming a ceramic carrier by solidifying the paste. The semiconductor substrate is thinned using the ceramic carrier as a carrier.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: May 2, 2017
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Martin Mischitz, Michael Roesner, Michael Pinczolits
  • Patent number: 9620466
    Abstract: A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: April 11, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Mischitz, Markus Heinrici, Barbara Eichinger, Manfred Schneegans, Stefan Krivec
  • Publication number: 20160379947
    Abstract: A semiconductor device includes a semiconductor die that having a conductive structure. A metal structure is electrically connected to the conductive structure and contains a first metal. An auxiliary layer stack is sandwiched between the conductive structure and the metal structure and includes an adhesion layer that contains a second metal. The auxiliary layer stack further includes a metal diffusion barrier layer between the adhesion layer and the conductive structure. The adhesion layer contains the first metal and a second metal.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 29, 2016
    Inventors: Manfred Schneegans, Franziska Haering, Hans-Joachim Schulze, Bernhard Weidgans
  • Publication number: 20160284648
    Abstract: In various embodiments, a die is provided. The die may include a die body, and at least one of a front side metallization structure on a front side of the die body and a back side metallization structure on a back side of the die body such that the die is plane or includes a positive radius of curvature at a die attach process temperature range.
    Type: Application
    Filed: March 16, 2016
    Publication date: September 29, 2016
    Inventors: Markus ZUNDEL, Manfred SCHNEEGANS
  • Patent number: 9449876
    Abstract: A method of separating individual dies of a semiconductor wafer includes forming a metal layer on a first surface of a semiconductor wafer, the semiconductor wafer including a plurality of dies, separating the plurality of dies from one another, and electrical discharge machining the metal layer into individual segments each of which remains attached to one of the dies. A corresponding semiconductor die produced by such a method is also provided.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: September 20, 2016
    Assignee: Infineon Technologies AG
    Inventors: Michael Roesner, Gudrun Stranzl, Manfred Schneegans
  • Publication number: 20160260658
    Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.
    Type: Application
    Filed: May 16, 2016
    Publication date: September 8, 2016
    Inventors: Manfred Schneegans, Andreas Meiser, Martin Mischitz, Michael Roesner, Michael Pinczolits
  • Publication number: 20160168739
    Abstract: An electrolyte may be provided. The electrolyte may include at least one additive configured to decompose or evaporate at a temperature above approximately 100° C., and a water soluble metal salt, and the electrolyte may be free from carbon nanotubes. In various embodiments, a method of forming a metal layer may be provided: The method may include depositing a metal layer on a carrier using an electrolyte, wherein the electrolyte may include at least one additive configured to decompose or evaporate at a temperature above approximately 100° C. and a water soluble metal salt, wherein the electrolyte is free from carbon nanotubes; and annealing the metal layer to form a metal layer comprising a plurality of pores. In various embodiments, a semiconductor device may be provided.
    Type: Application
    Filed: November 23, 2015
    Publication date: June 16, 2016
    Inventors: Werner ROBL, Michael MELZL, Manfred SCHNEEGANS, Bernhard WEIDGANS, Franziska HAERING
  • Patent number: 9368436
    Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: June 14, 2016
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Andreas Meiser, Martin Mischitz, Michael Roesner, Michael Pinczolits
  • Publication number: 20160141259
    Abstract: Various embodiments provide a method of forming a bondpad, wherein the method comprises providing a raw bondpad, and forming a recess structure at a contact surface of the raw bondpad, wherein the recess structure comprises sidewalls being inclined with respect to the contact surface.
    Type: Application
    Filed: November 15, 2015
    Publication date: May 19, 2016
    Inventors: Magdalena HOIER, Peter CHERL, Manfred SCHNEEGANS
  • Publication number: 20160035654
    Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.
    Type: Application
    Filed: February 4, 2015
    Publication date: February 4, 2016
    Inventors: Manfred Schneegans, Andreas Meiser
  • Publication number: 20160035560
    Abstract: In accordance with an alternative embodiment of the present invention, a method for forming a semiconductor device includes applying a paste over a semiconductor substrate, and forming a ceramic carrier by solidifying the paste. The semiconductor substrate is thinned using the ceramic carrier as a carrier.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 4, 2016
    Inventors: Manfred Schneegans, Martin Mischitz, Michael Roesner, Michael Pinczolits
  • Patent number: 9209080
    Abstract: A semiconductor device includes a semiconductor chip including a first main face and a second main face. The second main face is the backside of the semiconductor chip. The second main face includes a first region and a second region. The second region is a peripheral region of the second main face and the level of the first region and the level of the second region are different. The first region may be filled with metal and may be planarized to the same level as the second region.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: December 8, 2015
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Bernhard Weidgans, Franco Mariani, Alexander Heinrich
  • Patent number: 9190322
    Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: November 17, 2015
    Assignee: Infineon Technologies AG
    Inventors: Martin Mischitz, Manfred Schneegans, Markus Heinrici
  • Publication number: 20150235855
    Abstract: Various techniques, methods and devices are disclosed where metal is deposited on a substrate, and stress caused by the metal to the substrate is limited, for example to limit a bending of the wafer.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Inventors: Manfred Schneegans, Juergen Foerster, Bernhard Weidgans, Norbert Urbansky, Tilo Rotth
  • Publication number: 20150214095
    Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 30, 2015
    Inventors: Martin Mischitz, Manfred Schneegans, Markus Heinrici
  • Publication number: 20150206802
    Abstract: A method of separating individual dies of a semiconductor wafer includes forming a metal layer on a first surface of a semiconductor wafer, the semiconductor wafer including a plurality of dies, separating the plurality of dies from one another, and electrical discharge machining the metal layer into individual segments each of which remains attached to one of the dies. A corresponding semiconductor die produced by such a method is also provided.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 23, 2015
    Inventors: Michael Roesner, Gudrun Stranzl, Manfred Schneegans
  • Patent number: 9006798
    Abstract: A semiconductor device includes a trench transistor cell array in a silicon semiconductor body with a first main surface and a second main surface opposite to the first main surface. A main lateral face of the semiconductor body between the first main surface and the second main surface has a first length along a first lateral direction parallel to the first and second main surfaces. The first length is equal or greater than lengths of other lateral faces of the semiconductor body. The trench transistor cell array includes predominantly linear gate trench portions. At least 50% of the linear gate trench portions extend along a second lateral direction or perpendicular to the second lateral direction. An angle between the first and second lateral directions is in a range of 45°±15°.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: April 14, 2015
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Manfred Schneegans
  • Patent number: 8993372
    Abstract: Exemplary embodiments of a method for producing a semiconductor component having a polycrystalline semiconductor body region are disclosed, wherein the polycrystalline semiconductor body region is produced between the first and second surfaces of the semiconductor body in a semiconductor component section, wherein an electromagnetic radiation having a wavelength of at least 1064 nm is introduced into the semiconductor body in a manner focused onto a position in the semiconductor component section of the semiconductor body and wherein the power density of the radiation at the position is less than 1×108 W/cm2.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: March 31, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Manfred Schneegans, Carsten Ahrens, Adolf Koller, Gerald Lackner, Anton Mauder, Hans-Joachim Schulze
  • Publication number: 20140327053
    Abstract: A semiconductor device includes a trench transistor cell array in a silicon semiconductor body with a first main surface and a second main surface opposite to the first main surface. A main lateral face of the semiconductor body between the first main surface and the second main surface has a first length along a first lateral direction parallel to the first and second main surfaces. The first length is equal or greater than lengths of other lateral faces of the semiconductor body. The trench transistor cell array includes predominantly linear gate trench portions. At least 50% of the linear gate trench portions extend along a second lateral direction or perpendicular to the second lateral direction. An angle between the first and second lateral directions is in a range of 45°±15°.
    Type: Application
    Filed: May 3, 2013
    Publication date: November 6, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Markus Zundel, Manfred Schneegans
  • Publication number: 20140264865
    Abstract: A semiconductor device may include: a barrier layer; an adhesion layer disposed over the barrier layer; a metallization layer disposed over the adhesion layer, wherein the metallization layer is part of a final metallization level of the semiconductor device.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Infineon Technologies AG
    Inventors: Manfred Schneegans, Juergen Foerster