Abstract: This invention relates to method and apparatus for verification of circuit designs containing memories. At a register transfer abstraction level, verification of a circuit design requires showing that the register transfer language (RTL) abstraction of the design is logically equivalent to the design implementation represented at the logic (e.g., gate and/or flip-flop) and/or the transistor (e.g. implementation verification) abstraction levels, as well as logic simulation of the design RTL embedded in a system-level test bench for verification at the system-abstraction level.

Abstract: A method of developing growth of <111> crystal texture within at least one layer of composition of a magnetic memory cell. The method is comprised of applying the at least one layer of composition with a level of ion that is sufficiently high to enable alignment of the at least one layer of composition to a high degree of quality for the <111> crystal texture.

Abstract: An exemplary nonvolatile memory array comprises a substrate and a plurality of memory cells formed on the substrate, each of the memory cells being addressable via at least first and second conductors during operations. An exemplary memory cell in the exemplary memory array includes a ferromagnetic annular data layer having an opening, the opening enabling the second conductor to electrically contact the first conductor, an intermediate layer on at least a portion of the annular data layer, and a soft reference layer on at least a portion of the intermediate layer.

Abstract: A process and system are provided for representing object interactions, by means of a sequence diagram or the like, wherein the object interactions are recovered from source code written in Java or other object-oriented programming language. Initially, a Method Information Parser determines the respective methods declared inside the source code and extracts their names. A Method Detail Parser then extracts the method calls to other objects within a method, to resolve each complex method call into multiple lines of single method calls. Information derived from the multiple lines of single method calls is then used to generate the sequence diagram.

Abstract: Embodiments of the present invention provide a drive and biasing circuit for an input/output stage of a device. Embodiments of the present invention provide live-insertion protection by driving and biasing various nodes in the input/output stage. Embodiments of the present invention also provide over-voltage protection by biasing various nodes in the input/output stage during normal and live-insertion operating conditions. Embodiments of the present invention utilize the voltage on the supply and/or voltage present on the input/output terminal to provide the drive and bias voltage levels. Embodiments of the present invention are thus able to turn off current paths and protect various junctions against breakdown during over-voltage and live-insertion operating conditions.

Abstract: A method and apparatus estimate hydrogen concentration in a reformate stream produced by a fuel processor of a fuel cell. A sensor measures carbon monoxide, carbon dioxide, and water in the reformate stream. A fuel meter controls fuel input to the fuel processor. An air meter controls air input to the fuel processor. A water meter controls water input to the fuel processor. A transport delay estimator recursively estimates transport delay of the fuel processor. A hydrogen estimator associated with the transport delay estimator, the air, water and fuel meters, and the sensor estimates hydrogen concentration in the reformate stream. The hydrogen estimator includes a fuel processor model that is adjusted using the estimated transport delay. The carbon monoxide, the carbon dioxide and the water are measured using a nondispersive infrared (NDIR) sensor.

Abstract: Methods for consolidation and densification of fibrous monolith composite structures are provided. Consolidation and densification of two- and three-dimensional fibrous monolith components having complex geometries can be achieved by pressureless sintering. The fibrous monolith composites are formed from filaments having at least a first material composition generally surrounded by a second material composition. The composites are sintered in an inert gas or nitrogen gas at a pressure of no more than about 30 psi to provide consolidated and densified fibrous monolith composites.

Abstract: Various embodiments of methods and systems for reducing the amount of contamination that enters the optical path of an optical device are disclosed. In one embodiment, an optical device includes a housing containing at least one optical component (active, passive, or both) that is configured to process an optical signal. The optical device also includes a first sleeve that encloses a portion of an optical fiber, an optical path configured to convey the optical signal between the optical component(s) and the end of the optical fiber. A flexible seal contacts a portion of the surface of the first sleeve and contacts the surface of a portion of the housing through which the first sleeve passes.

Abstract: An integrated-cavity output spectroscopy (ICOS) instrument adapted for measuring liquid samples has a low-scatter flow cell arrangement passing through a stable optical cavity defined by an arrangement of two or more mirrors. The flow cell provides a sample volume within the cavity of at most one microliter at any given time. The optical cavity has an effective cavity length of at most one centimeter and mirror radii of curvature for the stable cavity arrangement are much longer than the cavity length. A light beam with stable characteristics is introduced into the cavity, passes through the liquid sample cell multiple times, and a detector measures a portion of the light from the cavity. The light measurement is analyzed to determine absorption by the liquid sample, and related information.

Abstract: The invention provides a directional ion etching process to pattern self-aligned via contacts in the manufacture of semiconductor devices such as high density magnetic random access memory (MRAM). In a particular embodiment, a semiconductor wafer is prepared with vertically arranged layers, including a patterned layer in electrical contact with a conductive row layer. The patterned layer may be a magnetic tunnel junction layer. A photoresist is deposited on the junction layer, masked, exposed and developed. The non-protected junction layer is etched to provide appropriate junction stacks. The remaining photoresist caps are not dissolved, rather they and the surface of the wafer are coated with a dielectric. Directional ion etching at a low angle relative to the junction stack layer removes the coated photoresist caps and thereby provides at least one patterned self-aligned via contact.

Abstract: A magnetoresistive device includes a free ferromagnetic layer; a pinned structure; and a spacer layer between the free layer and the pinned structure. The pinned structure may include first, second and third ferromagnetic layers that are ferromagnetically coupled. The first and third layers are separated by the second layer. The second layer has a lower magnetic moment than the first and third layers. In the alternative, the pinned structure may include a single layer of Co50Fe50.

Abstract: A top-pinned magnetoresistive device includes a free ferromagnetic layer; a spacer layer on the free layer; and a pinned ferromagnetic layer on the spacer layer. At least one interface property at an upper surface of the pinned layer is adjusted during fabrication of the magnetoresistive device.

Abstract: A coupled ferromagnetic structure includes a first ferromagnetic layer, a spacer layer on a first surface of the first ferromagnetic layer, and a second ferromagnetic layer on the spacer layer. Interlayer exchange coupling occurs between the first and second ferromagnetic layers. The coupling may be ferromagnetic or antiferromagnetic. Morphology of the first surface is modified to tailor the interlayer exchange coupling. The structure may form a part of a magnetoresistive device such as a magnetic tunnel junction.

Abstract: The present invention is a modular optical switch fabric that includes optical modules that are inserted into an optical chassis by way of plug-in electrical connectors. Each optical module includes a collimator panel and a beam steering panel secured to a frame member. The frame member is configured to position the collimator panel in fixed optical alignment relative to the beam steering panel. The modular optical switch fabric is upgradeable. The optical switch fabric allows users to expand the switch fabric capacity by simply adding switch fabric modules. The optical switch fabric also features modules that can be replaced and repaired without causing interruptions in service.

Abstract: A thermal-assisted probe based magnetic memory storage device. In a particular embodiment, magnetic tunnel junction memory cells and at least one movable probe with a tip characterized by a conductor and a heat generator are provided. The movable probe may be placed in electrical and thermal contact with a given memory cell. The memory cells include a material wherein the coercivity is decreased upon an increase in temperature. The magnetic field provided by the read conductor will not alter the orientation of an unheated cell, but may alter the orientation of a heated cell. A related method of use is also provided.

Abstract: This invention provides a probe based magnetic memory storage device. In a particular embodiment, magnetic memory cells are provided in an array. Each cell provides a magnetic data layer and a conductor. At least one movable probe having a tip characterized by a conductor and a soft reference layer is also provided. In addition, an intermediate layer joined to either the movable probe or each memory cell is provided. The movable probe may be placed in contact with a given memory cell, the probe and cell thereby forming a tunnel junction memory cell with the intermediate layer serving as the tunnel junction. The magnetic field provided by the probe conductor may be combined with a field provided by the cell conductor to produce a switching field to alter the orientation of the data layer. The memory cells may include a material wherein the coercivity is decreased upon an increase in temperature. The probe may also include a heat generator.

Abstract: The invention includes an integrated adjustable resistor. The integrated adjustable resistor includes a first electrode, a second electrode, and a phase change medium electrically connected to the first electrode and the second electrode. The integrated adjustable resistor further includes an adjustable pulse generator for applying a variable amount of energy to the phase change medium. A resistance of the phase change medium is continuously dependent upon the amount of energy applied to the phase change medium. A resistance dependent circuit is electrically connected to the first electrode and the second electrode. Operation of the resistance dependent circuit is continuously dependent upon the resistance of the phase change medium.

Abstract: A system and method for integrating microfluidic components in a microfluidic system enables the microfluidic system to perform a selected microfluidic function. A capping module includes a microfluidic element for performing a microfluidic function. The capping module is stacked on a microfluidic substrate having microfluidic plumbing to incorporate the microfluidic function into the system. The microfluidic element may comprise a matrix having an affinity for selected molecules in a sample. The matrix binds, reacts with and/or retains the selected molecules without affecting other molecules in the sample.

Abstract: A method and apparatus in a data processing system for dispatching events. An event from a first object is received. A type for the event is identified. A dispatching strategy is selected for the event based on parameter settings, a source of the event, and default settings to form a selected dispatching strategy. The event is dispatched using the selected dispatching strategy.

Abstract: A magnetic tunnel junction is fabricated by forming pinned and sense layers; and re-setting a magnetization vector of at least one of the layers.