Patents by Inventor Manish

Manish has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050125185
    Abstract: A method and apparatus for improved formal equivalence checking to verify the operation of components in a VLSI integrated circuit. The present invention enhances previous techniques for dynamic circuits by generating a multi-level transistor abstraction for dynamic circuits. Two-levels of abstracted code are generated. First, an abstracted legal Verilog® is generated for the evaluate phase of a dynamic circuit. Second, “comment-logic” in Verilog® syntax is generated for the pre-charge phase of the dynamic circuit. Using the method and apparatus of the present invention, it is possible to obtain a multi-level transistor abstraction for both the “clk=0” and the “clk=1” conditions. The binary decision diagram property of the circuit being analyzed is used to generate multi-level representations for both the pre-charge (clk=0) and the evaluate phases (clk=1). The multi-level abstracted model of the present invention has several advantages over the prior art.
    Type: Application
    Filed: December 9, 2003
    Publication date: June 9, 2005
    Inventors: Manish Singh, Arun Chandra
  • Publication number: 20050122560
    Abstract: A light modulator is arranged as an array of rows and columns of interferometric display elements. Each element is divided into sub-rows of sub-elements. Array connection lines transmit operating signals to the display elements, with one connection line corresponding to one row of display elements in the array. Sub-array connection lines electrically connect to each array connection line. Switches transmit the operating signals from each array connection line to the sub-rows to effect gray scale modulation.
    Type: Application
    Filed: December 9, 2003
    Publication date: June 9, 2005
    Inventors: Jeffrey Sampsell, Clarence Chui, Manish Kothari
  • Publication number: 20050123450
    Abstract: A microfabricated sheath flow structure for producing a sheath flow includes a primary sheath flow channel for conveying a sheath fluid, a sample inlet for injecting a sample into the sheath fluid in the primary sheath flow channel, a primary focusing region for focusing the sample within the sheath fluid and a secondary focusing region for providing additional focusing of the sample within the sheath fluid. The secondary focusing region may be formed by a flow channel intersecting the primary sheath flow channel to inject additional sheath fluid into the primary sheath flow channel from a selected direction. A sheath flow system may comprise a plurality of sheath flow structures operating in parallel on a microfluidic chip.
    Type: Application
    Filed: November 1, 2004
    Publication date: June 9, 2005
    Applicant: Cytonome, Inc.
    Inventors: John Gilbert, Manish Deshpande, Bernard Bunner
  • Publication number: 20050125371
    Abstract: Triggers are dynamically created and destroyed on an application database. Rules are represented in active databases as ECA (event-condition-action) items, in which an action formulates a reaction to an event and is executed after the rule is triggered when the condition is evaluated to true. The event is defined as an instantaneous and atomic (that is, the event either happens completely, or not at all) point of occurrence within an application. Events can be classified as either database, temporal, or user-defined events, and their type can be either primitive or composite.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 9, 2005
    Inventors: Manish Bhide, Ajay Gupta, Mukul Joshi, Mukesh Mohania
  • Publication number: 20050121309
    Abstract: A method of providing nanoparticles, especially carbon nanoonions, comprises generating an arc discharge between an anode and a cathode, both being submerged in a liquid and collecting the nanoparticles from the surface of the liquid, which may be an aqueous liquid, liquid ammonia, liquid helium, ethanol, methanol. Acetone, toluene, or chloroform.
    Type: Application
    Filed: September 11, 2002
    Publication date: June 9, 2005
    Inventors: Manish Chhowalla, Gehan Amaratunga, Noriaki Sano, Haolan Wang
  • Patent number: 6903403
    Abstract: An exemplary nonvolatile memory array comprises a substrate and a plurality of memory cells formed on the substrate, each of the memory cells being addressable via at least first and second conductors during operations. An exemplary memory cell in the exemplary memory array includes a ferromagnetic annular data layer having an opening, the opening enabling the second conductor to electrically contact the first conductor, an intermediate layer on at least a portion of the annular data layer, and a soft reference layer on at least a portion of the intermediate layer.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: June 7, 2005
    Assignee: Hewlett-Packard Development Company, LP.
    Inventors: Manish Sharma, Lung Tran
  • Patent number: 6903909
    Abstract: A ferromagnetic layer of a magnetoresistive element includes a crystalline ferromagnetic sublayer and an amorphous ferromagnetic sublayer. The amorphous ferromagnetic sublayer has a smoothed surface.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 7, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Manish Sharma, Janice H. Nickel
  • Patent number: 6903157
    Abstract: A thickened aqueous coating composition (preferably paints and the like or adhesives) containing a film-forming polymeric binder which produces dried coatings having less sensitivity to water by using a thickener which is autoxidisable. Preferred autoxidisable moieties are provided by derivatives of long chain fatty acids of the type used in alkyd paints and association is the preferred thickener mechanism. The moieties may form part of a compound which can take part in a copolymerisation to form a polymeric backbone for the thickener and if the compound is not very soluble in water, the copolymerisation mixture is subjected to intensive agitation to form droplets of less than 500 nm which compensates for the lack of solubility. The thickener may serve as its own binder if sufficient amounts are used.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: June 7, 2005
    Assignee: Imperial Chemical Industries PLc
    Inventors: Manish Sarkar, Stephane Patrick Belmudes
  • Patent number: 6901554
    Abstract: A method and apparatus in a data processing system for displaying a component or container. The container is displayed within a display using a first component. A location of the component or container is controlled within the display using a second component, wherein the second component controls the location and geometry of the component or container in response to receiving an event. The component or container is selectively displayed using a third component, wherein the third component generates the event.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: May 31, 2005
    Assignee: International Business Machines Corporation
    Inventors: Peter C. Bahrs, Raphael Poole Chancey, Manish Mahesh Modh
  • Publication number: 20050114317
    Abstract: The ordered results set of a search engine based upon a search statement are processed to identify pages exhibiting patterns related to a recurring event. These pages are ranked and the ordered results set is reordered with the ranked pages appearing before those that do not exhibit the respective pattern.
    Type: Application
    Filed: November 26, 2003
    Publication date: May 26, 2005
    Inventors: Manish Bhide, Ajay Gupta, Mukesh Mahania
  • Publication number: 20050109410
    Abstract: A microfluidic system includes a bubble valve for regulating fluid flow through a microchannel. The bubble valve includes a fluid meniscus interfacing the microchannel interior and an actuator for deflecting the membrane into the microchannel interior to regulate fluid flow. The actuator generates a gas bubble in a liquid in the microchannel when a sufficient pressure is generated on the membrane.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 26, 2005
    Applicant: Cytonome, Inc.
    Inventors: John Gilbert, Sebastian Bohm, Manish Deshpande
  • Publication number: 20050114739
    Abstract: A hybrid method of predicting the occurrence of future critical events in a computer cluster having a series of nodes records system performance parameters and the occurrence of past critical events. A data filter filters the logged to data to eliminate redundancies and decrease the data storage requirements of the system. Time-series models and rule based classification schemes are used to associate various system parameters with the past occurrence of critical events and predict the occurrence of future critical events. Ongoing processing jobs are migrated to nodes for which no critical events are predicted and future jobs are routed to more robust nodes.
    Type: Application
    Filed: November 24, 2003
    Publication date: May 26, 2005
    Inventors: Manish Gupta, Jose Moreira, Adam Oliner, Ramendra Sahoo
  • Patent number: 6898642
    Abstract: A peer-to-peer protocol is based on the use of global timestamps and client priorities in serializing modifications to a shared workspace of real-time collaboration. The method caters to dynamic clients wherein a client can leave or join an ongoing collaboration session as long as there is always at least one client present/remaining in the collaboration session. The method can support multiple definitions of a modification, including partitioning-based definitions, wherein the method provides full support for locking of partitions, and a full treatment of inter-partition synchronization via a modification definition over multiple partitions. The method is capable of utilizing the many standard methods of creating a global, distributed, synchronized clock for the global timestamps utilized by it. The method is rollback-based for correcting tentative but incorrect serializations, and provides additional backup in terms of checkpoints for additional safety and for the support of lightweight, pervasive clients.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: May 24, 2005
    Assignee: International Business Machines Corporation
    Inventors: Girish Bhimrao Chafle, Manish Gupta, Neeran Mohan Karnik, Pradeep Varma
  • Patent number: 6897158
    Abstract: This invention provides a directional ion etching process for making nano-scaled angled features such as may be used, for example, in liquid crystal displays and or nanoimprinting templates. In a particular embodiment a semiconductor wafer substrate is prepared with at least one layer of material. A photoresist is applied, masked, exposed and developed. Anisotropic ion etching at a high angle relative to the wafer is performed to remove portions of the non protected material layer. The remaining photoresist caps shadow at least a portion of the material layer, and as the ion etching is performed at an angle, the protected portions of the material layer also appear at an angle.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: May 24, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Manish Sharma
  • Publication number: 20050104026
    Abstract: A two piece side split ball valve with internal corrosion resistant plastic lining (4, 5), with an integral actuator mounting flange (30) for easier, cheaper & direct mounting of any standard actuator, with a single piece ball-stem (3, 7) for accurate control of the rotation & positioning of the ball (3), with energized seat rings (8, 9) for bubble tight shut-off and with means (14, 15) to prevent cold flow of lining sealing faces (16, 17) of the two body halves (1, 2) having metal to metal contact.
    Type: Application
    Filed: February 22, 2002
    Publication date: May 19, 2005
    Inventor: Manish Tulaskar
  • Publication number: 20050108537
    Abstract: A method of and system for intercepting a transaction instantiated by a database application to determine if an electronic signature is necessary to commit the transaction to the database is disclosed. In one embodiment the method comprises calling an application program interface to raise an event in response to a triggering action generated by the database application; initiating a workflow process that executes a rule to determine if an electronic signature is required to approve the transaction; and if execution of the rule results in a determination that an electronic signature is required for the transaction, instantiating a signature collection process. Some embodiments further comprise obtaining an electronic signature in response to the signature collection process and thereafter, verifying the electronic signature and updating a filed of the electronic record to indicate a valid signature was collected if the electronic signature is verified.
    Type: Application
    Filed: December 8, 2003
    Publication date: May 19, 2005
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Srinivasulu Puri, Ravindra Akella, Savita Durgada, Mark Fisher, Hany Saleeb, Manish Gupta
  • Publication number: 20050108295
    Abstract: A method of and system for committing a transaction to a database. In one embodiment the method comprises initiating a database transaction; creating an electronic record that includes transaction data from the database transaction; executing a rule associated with the record to determine whether an electronic signature is required to connote review and/or approval of the electronic record, and requesting the electronic signature prior to committing the transaction to the database if execution of the rule results in a determination that an electronic signature is required.
    Type: Application
    Filed: December 8, 2003
    Publication date: May 19, 2005
    Applicant: ORACLE INTERNATIONAL CORPORATION, A California corporation
    Inventors: Srikanth Karimisetty, Ravindra Akella, Savita Durgada, John Danese, Sanjay Rastogi, Manish Gupta
  • Publication number: 20050108675
    Abstract: A method for recognizing a pattern in a design of an integrated circuit (IC), comprising identifying a pattern correspondence element in a pattern instance. A pattern tree corresponding to the pattern instance is built. A list of candidate design correspondence elements in a design instance of the IC are built. Iteratively, for each design correspondence element in said list of candidate design correspondence elements each rank in a tree representation of said design instance built around said each design correspondence element is compared with corresponding rank in said pattern tree.
    Type: Application
    Filed: February 23, 2004
    Publication date: May 19, 2005
    Inventors: Bernard Murphy, Pratyush Prasoon, Manish Bhatia
  • Patent number: 6894918
    Abstract: The invention includes an apparatus and a method that provides a memory back-up system. The memory back-up system includes a first memory cell, and a non-volatile memory cell that is interfaced to the first memory cell. Control circuitry allows data to be written to either the first memory cell or the non-volatile memory cell, and provides transfer of the data from either the first memory cell or the non-volatile memory cell, to the other of either the first memory cell or the non-volatile memory cell. The memory back-up system can also include a plurality of first memory cells, and a plurality of non-volatile memory cells that are interfaced to the first memory cells. Control circuitry allows data to be written to either the first memory cells or the non-volatile memory cells, and that provides transfer of the data from either the first memory cells or the non-volatile memory cells, to the other of either the first memory cells or the non-volatile memory cells.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: May 17, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Manish Sharma, Frederick Perner
  • Publication number: 20050102487
    Abstract: A microprocessor includes a branch unit, a load/store unit (LSU), an arithmetic logic unit (ALU), and a vector unit to execute a vector instruction. The vector unit includes a vector register file having a primary vector register and a secondary vector register. The processor preferably further includes a first data bus and a second data bus wherein the first and second data busses couple the vector unit to the data memory. The vector unit includes a first input multiplexer enabling data on the first data bus to be provided to the primary register file or the secondary register file and a second input multiplexer, independent of the first input multiplexer enabling data on the second data bus to be provided to the second data bus. The first and second data busses may comprise first and second portions of a data memory bus.
    Type: Application
    Filed: November 7, 2003
    Publication date: May 12, 2005
    Inventors: Siddhartha Chatterjee, Kenneth Dockser, Fred Gustayson, Manish Cupta