Patents by Inventor Mark C. Gilmer

Mark C. Gilmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5821172
    Abstract: A semiconductor manufacturing process in which a single crystal silicon semiconductor substrate is immersed in an oxidation chamber maintained at a first temperature preferably between 400.degree. and 700.degree. C. for a first duration. During the first duration, the oxidation chamber comprises a first ambient gas of N.sub.2 or Argon. Thereafter, the ambient temperature within the oxidation chamber is ramped to a second temperature in the range of approximately 600.degree. to 1100.degree. C. NH.sub.3 is then introduced into the oxidation chamber simultaneously with either NO or N.sub.2 O to form an oxynitride layer. Thereafter, a conductive gate structure is formed on the oxynitride layer and a source/drain impurity distribution is introduced into a pair of source/drain regions laterally displaced on either side of the channel region of the semiconductor substrate. The channel region is aligned with the conductive gate.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: October 13, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark C. Gilmer, Mark I. Gardner
  • Patent number: 5783469
    Abstract: A method of fabricating an integrated circuit in which nitrogen is incorporated into the gate dielectric and transistor gate. The method comprises the providing of a semiconductor substrate that has a p-well and a laterally displaced n-well, each including a channel region laterally displaced between a pair of source/drain regions. Preferably, the semiconductor substrate has a resistivity of approximately 10 to 15 .OMEGA.-cm. A dielectric layer is formed on an upper surface of the semiconductor substrate. The formation of the dielectric layer preferably comprises a thermal oxidation performed at a temperature of approximately 600.degree. to 900.degree. C. and the resulting thermal oxide has a thickness less than approximately 50 angstroms. A conductive gate layer is then formed on the dielectric layer. In a preferred embodiment, the conductive gate layer is formed by chemically vapor depositing polysilicon at a pressure of less than approximately 2 torrs at a temperature in the range of approximately 500.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: July 21, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark I. Gardner, Mark C. Gilmer