Patents by Inventor Mark Webster

Mark Webster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11922342
    Abstract: Systems and methods are disclosed for providing a subscription service.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: March 5, 2024
    Assignee: INSPIRATO, LLC
    Inventors: Brent Handler, Brad Handler, Ashley Roybal, Rodolfo Rodriguez, Cody Holloway, Mark Wilson, Michael Webster, Kevin Baird, Sam Schulte, Jesus Gandarilla, Sienna Stonesmith
  • Patent number: 11886056
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: January 30, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Adams, Prakash B. Gothoskar, Vipulkumar Patel, Mark Webster
  • Publication number: 20230384522
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Application
    Filed: August 11, 2023
    Publication date: November 30, 2023
    Inventors: Shiyi CHEN, Tao LING, Weizhuo LI, Mark A. WEBSTER
  • Patent number: 11810877
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Mark A. Webster, Craig S. Appel
  • Patent number: 11762150
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Shiyi Chen, Tao Ling, Weizhuo Li, Mark A. Webster
  • Patent number: 11728622
    Abstract: An optical apparatus comprises a semiconductor substrate and an optical waveguide emitter. The optical waveguide emitter comprises an input waveguide section extending from a facet of the semiconductor substrate, a turning waveguide section optically coupled with the input waveguide section, and an output waveguide section extending to the same facet and optically coupled with the turning waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section comprises an optically active region.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: August 15, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Dominic F. Siriani, Vipulkumar K. Patel, Matthew J. Traverso, Mark A. Webster
  • Publication number: 20230251510
    Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 10, 2023
    Inventors: Alexey V. VERT, Mark A. WEBSTER
  • Publication number: 20230243718
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Application
    Filed: April 7, 2023
    Publication date: August 3, 2023
    Inventors: Xunyuan ZHANG, Ravi S. TUMMIDI, Tony P. POLOUS, Mark A. WEBSTER
  • Patent number: 11693200
    Abstract: Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: July 4, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Ravi S. Tummidi, Mark A. Webster
  • Patent number: 11686648
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: June 27, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Ravi S. Tummidi, Tony P. Polous, Mark A. Webster
  • Patent number: 11650439
    Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: May 16, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Alexey V. Vert, Mark A. Webster
  • Publication number: 20230122662
    Abstract: A grating coupler with a wafer bonded configuration includes: a substrate; an oxide layer disposed on the substrate; a silicon nitride layer disposed above the oxide layer; a first silicon layer disposed above the silicon nitride layer; a second silicon layer disposed above the first silicon layer; and a bi-layer grating disposed above the silicon nitride layer. The bi-layer grating includes (i) a first etched layer of the first silicon layer and (ii) a second etched layer of the second silicon layer.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Eng Wen ONG, Mark A. WEBSTER
  • Publication number: 20230119450
    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Yi Ho LEE, Tao LING, Ravi S. TUMMIDI, Mark A. WEBSTER, Prakash B. GOTHOSKAR
  • Publication number: 20230076009
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 9, 2023
    Inventors: Tao LING, Ravi S. TUMMIDI, Yi Ho LEE, Mark A. WEBSTER
  • Publication number: 20230022612
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: Xunyuan ZHANG, Ravi S. TUMMIDI, Tony P. POLOUS, Mark A. WEBSTER
  • Publication number: 20230015671
    Abstract: Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.
    Type: Application
    Filed: July 19, 2021
    Publication date: January 19, 2023
    Inventors: Vipulkumar K. PATEL, Ravi S. TUMMIDI, Mark A. WEBSTER
  • Patent number: 11520106
    Abstract: An optical device is disclosed, including a phase delay, a first adiabatic coupler adapted to receive an input signal and adapted to be optically coupled to an input of the phase delay, and a second adiabatic coupler adapted to be optically coupled to an output of the phase delay. The second adiabatic coupler includes a first waveguide including a first portion optically coupled to the first output and including a first width, and a second waveguide including a second portion optically coupled to the second output and including a second width that is approximately equal to the first width.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: December 6, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Yi Ho Lee, Tao Ling, Ravi S. Tummidi, Mark A. Webster
  • Patent number: 11523192
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: December 6, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Ravi S. Tummidi, Yi Ho Lee, Mark A. Webster
  • Patent number: 11513375
    Abstract: A thermo-optic phase shifter comprises an optical waveguide comprising a P-type region comprising a first contact, an N-type region comprising a second contact, and a waveguide region disposed between the P-type region and the N-type region and having a raised portion. The thermo-optic phase shifter further comprises one or more heating elements. The one or more heating elements include one or more discrete resistive heating elements or the P-type and N-type regions driven as resistive heating elements.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: November 29, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Ming Gai Stanley Lo, Vipulkumar K. Patel, Mark A. Webster, Prakash B. Gothoskar
  • Patent number: 11480730
    Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: October 25, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Alexey V. Vert, Vipulkumar K. Patel, Mark A. Webster