Patents by Inventor Mark Webster

Mark Webster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11467420
    Abstract: Aspects described herein include an optical apparatus comprising an input port configured to receive an optical signal comprising a plurality of wavelengths, and a plurality of output ports. Each output port is configured to output a respective wavelength of the plurality of wavelengths. The optical apparatus further comprises a first plurality of two-mode Bragg gratings in a cascaded arrangement. Each grating of the first plurality of two-mode Bragg gratings is configured to reflect a respective wavelength of the plurality of wavelengths toward a respective output port of the plurality of output ports, and transmit any remaining wavelengths of the plurality of wavelengths.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: October 11, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Yi Ho Lee, Ravi S. Tummidi, Mark A. Webster
  • Publication number: 20220269004
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Application
    Filed: May 12, 2022
    Publication date: August 25, 2022
    Inventors: Shiyi CHEN, Tao LING, Weizhuo LI, Mark A. WEBSTER
  • Patent number: 11391888
    Abstract: Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: July 19, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Vipulkumar K. Patel, Mark A. Webster, Matthew J. Traverso
  • Patent number: 11366270
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: June 21, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Shiyi Chen, Tao Ling, Weizhuo Li, Mark A. Webster
  • Patent number: 11345576
    Abstract: A vertical reciprocating conveyor that can be transported in a storage condition and assembled at a work facility in an operating condition. The vertical reciprocating conveyor includes a carriage assembly that is movable along a pair of spaced vertical rails of a support frame. The carriage assembly includes a pair of spaced uprights and a carriage deck designed to support material moved along the pair of spaced vertical rails of the support frame. The carriage deck is movable between an operating condition and a storage condition, where the carriage deck is perpendicular to the pair of spaced uprights in the operating condition and parallel to the pair of spaced uprights in the storage condition. The movement of the carriage deck allows the overall size of the vertical reciprocating conveyor to be reduced for shipping.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: May 31, 2022
    Assignee: Pflow Industries, Inc.
    Inventor: Mark Webster
  • Publication number: 20220082875
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 17, 2022
    Inventors: Donald ADAMS, Prakash B. GOTHOSKAR, Vipulkumar PATEL, Mark WEBSTER
  • Publication number: 20220077084
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Vipulkumar K. PATEL, Mark A. WEBSTER, Craig S. APPEL
  • Patent number: 11249246
    Abstract: Aspects described herein include an optical apparatus comprising a multiple-stage arrangement of two-mode Bragg gratings comprising: at least a first Bragg grating of a first stage. The first Bragg grating is configured to transmit a first two wavelengths and to reflect a second two wavelengths of a received optical signal. The optical apparatus further comprises a second Bragg grating of a second stage. The second Bragg grating is configured to transmit one of the first two wavelengths and to reflect an other of the first two wavelengths. The optical apparatus further comprises a third Bragg grating of the second stage. The third Bragg grating is configured to transmit one of the second two wavelengths and to reflect an other of the second two wavelengths.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: February 15, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Yi Ho Lee, Ravi S. Tummidi, Mark A. Webster
  • Patent number: 11226505
    Abstract: An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: January 18, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Donald Adams, Prakash B. Gothoskar, Vipulkumar Patel, Mark Webster
  • Patent number: 11227847
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: January 18, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Mark A. Webster, Craig S. Appel
  • Publication number: 20210341672
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: Shiyi CHEN, Tao LING, Weizhuo LI, Mark A. WEBSTER
  • Publication number: 20210345022
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Application
    Filed: July 2, 2021
    Publication date: November 4, 2021
    Inventors: Tao LING, Ravi S. TUMMIDI, Yi Ho LEE, Mark A. WEBSTER
  • Patent number: 11156783
    Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: October 26, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Mark Webster, Ravi Sekhar Tummidi
  • Publication number: 20210311255
    Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.
    Type: Application
    Filed: June 16, 2021
    Publication date: October 7, 2021
    Inventors: Alexey V. VERT, Vipulkumar K. PATEL, Mark A. WEBSTER
  • Publication number: 20210286190
    Abstract: Aspects described herein include an optical apparatus comprising an input port configured to receive an optical signal comprising a plurality of wavelengths, and a plurality of output ports. Each output port is configured to output a respective wavelength of the plurality of wavelengths. The optical apparatus further comprises a first plurality of two-mode Bragg gratings in a cascaded arrangement. Each grating of the first plurality of two-mode Bragg gratings is configured to reflect a respective wavelength of the plurality of wavelengths toward a respective output port of the plurality of output ports, and transmit any remaining wavelengths of the plurality of wavelengths.
    Type: Application
    Filed: April 20, 2021
    Publication date: September 16, 2021
    Inventors: Tao LING, Yi Ho LEE, Ravi S. TUMMIDI, Mark A. WEBSTER
  • Publication number: 20210278589
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Inventors: Vipulkumar K. PATEL, Mark A. WEBSTER, Craig S. APPEL
  • Patent number: 11089391
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: August 10, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Ravi S. Tummidi, Yi Ho Lee, Mark A. Webster
  • Publication number: 20210231875
    Abstract: Aspects described herein include an optical waveguide emitter that includes a first optical waveguide and a second optical waveguide that are evanescently coupled and collectively configured to selectively propagate only a first mode of a plurality of optical modes. Each of the first optical waveguide and the second optical waveguide extend through an input waveguide section, a turning waveguide section, and an output waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section includes an optically active region. The optical waveguide emitter further includes a refractive index-increasing feature in the turning waveguide section.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 29, 2021
    Inventors: Dominic F. SIRIANI, Vipulkumar K. PATEL, Matthew J. TRAVERSO, Mark A. WEBSTER
  • Patent number: 11073661
    Abstract: Aspects described herein include an optical waveguide emitter that includes a first optical waveguide and a second optical waveguide that are evanescently coupled and collectively configured to selectively propagate only a first mode of a plurality of optical modes. Each of the first optical waveguide and the second optical waveguide extend through an input waveguide section, a turning waveguide section, and an output waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section includes an optically active region. The optical waveguide emitter further includes a refractive index-increasing feature in the turning waveguide section.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: July 27, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Dominic F. Siriani, Vipulkumar K. Patel, Matthew J. Traverso, Mark A. Webster
  • Patent number: 11067750
    Abstract: Embodiments disclosed herein generally relate to optical coupling between a highly-confined waveguide region and a low confined waveguide region in an optical device. The low confined waveguide region includes a trench in a substrate of the optical device in order to provide additional dielectric layer thickness for insulation between the substrate of the optical device and waveguides for light signals having a low optical mode. The low confined waveguide region is coupled to the highly-confined waveguide region via a waveguide overlap and in some embodiments via an intermediary coupling waveguide.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: July 20, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Alexey V. Vert, Vipulkumar K. Patel, Mark A. Webster