Patents by Inventor Martin Eckert
Martin Eckert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190018043Abstract: An adjustable load transmitter for adjusting an alignment between a probe card and a bridge beam of a wafer prober, where the probe card is separated from the bridge beam by a gap. The adjustable load transmitter located in the gap, the adjustable load transmitter comprising two rotatable plates adapted for transmitting a load via a load transmission path between the bridge beam and the wafer prober and each comprising two flat, non-parallel contact faces. The adjustable load transmitter removes an angular misalignment between the bridge beam and the set of plates by rotating each of the rotatable plates about a pre-determined adjustment angle such that two angles of inclination are adjusted to zero. The adjustable load transmitter establishes the load transmission path by closing a clearance between the bridge beam and the contact face.Type: ApplicationFiled: July 14, 2017Publication date: January 17, 2019Inventors: Martin Eckert, Roland Dieterle, Siegfried Tomaschko
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Publication number: 20190017861Abstract: The disclosure relates to an adjustable load transmitter for adjusting an alignment between planar members separated from each other by a gap. The load transmitter comprises a set of plates to be received inside the gap, the set comprising two rotatable plates and being adapted for transmitting a load via a load transmission path between the planar members. The load transmission path comprises the rotatable plates. Each of the plates comprises two flat, non-parallel contact faces, and one of the contact faces of the first rotatable plate is in permanent surface contact with one of the contact faces of the second rotatable plate. The rotatable plates are adapted for being rotated relative to each other around one of their respective normal axes.Type: ApplicationFiled: July 14, 2017Publication date: January 17, 2019Inventors: Martin Eckert, Siegfried Tomaschko, Roland Dieterle
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Patent number: 10146144Abstract: The disclosure relates to an adjustable load transmitter for adjusting an alignment between planar members separated from each other by a gap. The load transmitter comprises a set of plates to be received inside the gap, the set comprising two rotatable plates and being adapted for transmitting a load via a load transmission path between the planar members. The load transmission path comprises the rotatable plates. Each of the plates comprises two flat, non- parallel contact faces, and one of the contact faces of the first rotatable plate is in permanent surface contact with one of the contact faces of the second rotatable plate. The rotatable plates are adapted for being rotated relative to each other around one of their respective normal axes.Type: GrantFiled: October 27, 2017Date of Patent: December 4, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Siegfried Tomaschko, Roland Dieterle
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Patent number: 10114914Abstract: A system for layout effect characterization of an integrated circuit includes a memory having computer readable instructions and a processor for executing the computer readable instructions. The computer readable instructions include selecting an adjustable clock setting of an input clock for a layout effect characterization circuit of the integrated circuit and enabling a predetermined duty cycle of the input clock to pass through a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain. The computer readable instructions also include measuring a captured output of the one or more chains having the different inverting device arrangement and a captured output of the reference chain.Type: GrantFiled: November 28, 2017Date of Patent: October 30, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Thomas Strach, Otto A. Torreiter
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Patent number: 10114069Abstract: A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing.Type: GrantFiled: December 10, 2015Date of Patent: October 30, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin Eckert, Eckhard Kunigkeit, Otto A. Torreiter, Quintino L. Trianni
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Patent number: 10082419Abstract: The disclosure relates to an adjustable load transmitter for adjusting an alignment between planar members separated from each other by a gap. The load transmitter comprises a set of plates to be received inside the gap, the set comprising two rotatable plates and being adapted for transmitting a load via a load transmission path between the planar members. The load transmission path comprises the rotatable plates. Each of the plates comprises two flat, non-parallel contact faces, and one of the contact faces of the first rotatable plate is in permanent surface contact with one of the contact faces of the second rotatable plate. The rotatable plates are adapted for being rotated relative to each other around one of their respective normal axes.Type: GrantFiled: December 29, 2017Date of Patent: September 25, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Siegfried Tomaschko, Roland Dieterle
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Patent number: 10082526Abstract: An adjustable load transmitter for adjusting an alignment between a probe card and a bridge beam of a wafer prober, where the probe card is separated from the bridge beam by a gap. The adjustable load transmitter located in the gap, the adjustable load transmitter comprising two rotatable plates adapted for transmitting a load via a load transmission path between the bridge beam and the wafer prober and each comprising two flat, non-parallel contact faces. The adjustable load transmitter removes an angular misalignment between the bridge beam and the set of plates by rotating each of the rotatable plates about a pre-determined adjustment angle such that two angles of inclination are adjusted to zero. The adjustable load transmitter establishes the load transmission path by closing a clearance between the bridge beam and the contact face.Type: GrantFiled: December 29, 2017Date of Patent: September 25, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Roland Dieterle, Siegfried Tomaschko
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Patent number: 10056346Abstract: A chip attach frame is used to align pins of an integrated circuit chip with pads on a chip carrier. A frame block has a socket defining two alignment edges that form a reference corner. The chip is lowered into the socket, and the chip carrier is inclined while it supports the frame block and chip until the chip moves under force of gravity to the reference corner. Once located at the reference corner, the chip position is carefully adjusted by moving the frame block in the x- and y-directions until the pins are aligned with the pads. The frame block is spring biased against movement in the x- and y-directions, and the position of the frame block is adjusted using thumbscrews. A plunger mechanism can be used to secure the integrated circuit chip in forcible engagement with the chip carrier once the pins are aligned with the pads.Type: GrantFiled: February 20, 2017Date of Patent: August 21, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Otto Torreiter, Quintino L. Trianni
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Publication number: 20180204618Abstract: A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapted to output a discrete value out of more than two possible values based on the electrical quantity.Type: ApplicationFiled: December 7, 2017Publication date: July 19, 2018Inventors: Martin ECKERT, Alexander FRITSCH
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Patent number: 9977053Abstract: A wafer probe alignment system and method for aligning a probe to a chip wafer for testing a chip on the wafer are provided. At least two corners of the probe are adjustable in a same direction in relation to a primary corner of the probe. The alignment approach includes providing a grid of signal pins for corresponding contact pads of the chip under test, determining for each signal pin whether an electrical contact is established to a corresponding contact pad of the chip under contact force, and adjusting a position of each of the at least two corners by a corner individual delta position value with respect to the direction depending on a result of the determining in order to establish an electrical contact between each of the pins and the corresponding contact pads of the chip under test.Type: GrantFiled: June 8, 2016Date of Patent: May 22, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joerg G. Appinger, Eberhard Dengler, Roland Dieterle, Martin Eckert, Gabriele Kuczera, Siegfried Tomaschko, Otto Torreiter, Quintino Lorenzo Trianni
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Publication number: 20180107771Abstract: A system for layout effect characterization of an integrated circuit includes a memory having computer readable instructions and a processor for executing the computer readable instructions. The computer readable instructions include selecting an adjustable clock setting of an input clock for a layout effect characterization circuit of the integrated circuit and enabling a predetermined duty cycle of the input clock to pass through a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain. The computer readable instructions also include measuring a captured output of the one or more chains having the different inverting device arrangement and a captured output of the reference chain.Type: ApplicationFiled: November 28, 2017Publication date: April 19, 2018Inventors: Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Thomas Strach, Otto A. Torreiter
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Patent number: 9927463Abstract: A water probe alignment system and method for aligning a probe to a chip wafer for testing a chip on the wafer are provided. At least two corners of the probe are adjustable in a same direction in relation to a primary corner of the probe. The alignment approach includes providing a grid of signal pins for corresponding contact pads of the chip under test, determining for each signal pin whether an electrical contact is established to a corresponding contact pad of the chip under contact force, and adjusting a position of each of the at least two corners by a corner individual delta position value with respect to the direction depending on a result of the determining in order to establish an electrical contact between each of the pins and the corresponding contact pads of the chip under test.Type: GrantFiled: October 20, 2015Date of Patent: March 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joerg G. Appinger, Eberhard Dengler, Roland Dieterle, Martin Eckert, Gabriele Kuczera, Siegfried Tomaschko, Otto Torreiter, Quintino Lorenzo Trianni
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Patent number: 9904748Abstract: A layout effect characterization circuit includes a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain. A low pass filter is coupled to an output of the inverting device chains to produce a filtered output. An output capture circuit is coupled to the filtered output to enable a comparison of a captured filtered output of the one or more chains having the different inverting device arrangement to a captured filtered output of the reference chain.Type: GrantFiled: May 15, 2017Date of Patent: February 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Thomas Strach, Otto A. Torreiter
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Patent number: 9891272Abstract: A module plate is provided for use with a wafer handler and testing mechanism. The module plate has a diameter equivalent to an integrated circuit wafer and a height equivalent to or less than a height of a module lid associated with each module in a plurality of modules associated with the module plate. The module plate has a plurality of cutouts in the module plate that have a width equivalent to a width of the module lid and at least a length equivalent to a length of the module lid. The height of the module plate is such that, when a test head contacts a module base of each module in a plurality of modules, the module lid contacts a chuck on which the module plate resides during testing of the module thereby providing resistance in order to accurately test the module.Type: GrantFiled: August 27, 2015Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Eckhard Kunigkeit, Quintino L. Trianni, Christian Zoellin
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Patent number: 9892789Abstract: A logic circuit is provided including at least two input cells and a sense circuit. The input cells are connected to a common result line. Further, the input cells are operable for influencing an electrical quantity at the result line. The sense circuit is connected to the result line, and is adapted to output a discrete value out of more than two possible values based on the electrical quantity.Type: GrantFiled: January 16, 2017Date of Patent: February 13, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin Eckert, Alexander Fritsch
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Patent number: 9885748Abstract: A module plate is provided for use with a wafer handler and testing mechanism. The module plate has a diameter equivalent to an integrated circuit wafer and a height equivalent to or less than a height of a module lid associated with each module in a plurality of modules associated with the module plate. The module plate has a plurality of cutouts in the module plate that have a width equivalent to a width of the module lid and at least a length equivalent to a length of the module lid. The height of the module plate is such that, when a test head contacts a module base of each module in a plurality of modules, the module lid contacts a chuck on which the module plate resides during testing of the module thereby providing resistance in order to accurately test the module.Type: GrantFiled: June 9, 2015Date of Patent: February 6, 2018Assignee: International Business Machines CorporationInventors: Martin Eckert, Eckhard Kunigkeit, Quintino L. Trianni, Christian Zoellin
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Patent number: 9804231Abstract: A method is provided for determining a power noise histogram of a computer system. The computer system includes a skitter circuit with multiple skitter bins, each skitter bin of the multiple skitter bins being connected to a signal line at one or more clock cycles. The method includes: connecting each skitter bin to an individual counter circuit; and incrementing a counter when the respective skitter bin is enabled.Type: GrantFiled: April 7, 2014Date of Patent: October 31, 2017Assignee: GLOBALFOUNDRIES Inc.Inventors: Martin Eckert, Hubert Harrer, Thomas Strach
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Patent number: 9740813Abstract: An aspect includes forming a layout effect characterization circuit by incorporating a plurality of inverting device chains including a reference chain and one or more chains having a different inverting device arrangement and a same number of inverting devices per chain in an integrated circuit layout. A low pass filter is coupled to an output of the inverting device chains to produce a filtered output. An output capture circuit is coupled to the filtered output to enable a comparison of a captured filtered output of the one or more chains having the different inverting device arrangement to a captured filtered output of the reference chain.Type: GrantFiled: October 13, 2016Date of Patent: August 22, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Martin Eckert, Thomas Gentner, Jens Kuenzer, Antje Mueller, Thomas Strach, Otto A. Torreiter
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Patent number: 9709625Abstract: A method for determining power consumption of a power domain within an integrated circuit is presented. In a first step, a local power supply impedance profile (Z(f)) of this power domain is determined. Subsequently, a local time-resolved power supply voltage (U(t)) is measured while a well-defined periodic activity is executed in power domain. A set of time-domain measured voltage data (U(t)) is thus accumulated and transformed into the frequency domain to yield a voltage spectrum (U(f)). A current spectrum I(t) is calculated from this voltage profile (U(f)) by using the power supply impedance profile Z(f) of this power domain as I(t)=Ff?1{U(f)/Z(f)}. Finally, a time-resolved power consumption spectrum P(t) is determined from measured voltage spectrum U(t)) and calculated current spectrum (I(t)). This power consumption (P(t)) may be compared with a reference (Pref(t)) to verify whether power consumption within power domain matches expectations.Type: GrantFiled: June 28, 2011Date of Patent: July 18, 2017Assignee: International Business Machines CorporationInventors: Martin Eckert, Roland Frech, Claudio Siviero, Jochen Supper, Otto A. Torreiter, Thomas-Michael Winkel
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Patent number: 9686895Abstract: A chip attach frame is used to align pins of an integrated circuit chip with pads on a chip carrier. A frame block has a socket defining two alignment edges that form a reference corner. The chip is lowered into the socket, and the chip carrier is inclined while it supports the frame block and chip until the chip moves under force of gravity to the reference corner. Once located at the reference corner, the chip position is carefully adjusted by moving the frame block in the x- and y-directions until the pins are aligned with the pads. The frame block is spring biased against movement in the x- and y-directions, and the position of the frame block is adjusted using thumbscrews. A plunger mechanism can be used to secure the integrated circuit chip in forcible engagement with the chip carrier once the pins are aligned with the pads.Type: GrantFiled: September 4, 2013Date of Patent: June 20, 2017Assignee: International Business Machines CorporationInventors: Martin Eckert, Otto Torreiter, Quintino L. Trianni