Patents by Inventor Martin Standing

Martin Standing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048196
    Abstract: A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: June 2, 2015
    Assignee: International Rectifier Corporation
    Inventors: Martin Standing, Robert J. Clarke
  • Patent number: 9041187
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: May 26, 2015
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 9041191
    Abstract: A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can.
    Type: Grant
    Filed: November 19, 2011
    Date of Patent: May 26, 2015
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Publication number: 20150078042
    Abstract: A power supply includes a plurality of electronic components including one or more of a rectifier and a switching transistor, an input port configured to receive electrical energy from a power source and a circuit board comprising a cavity. At least one of the rectifier and the switching transistor is embedded in the cavity. The cavity is arranged proximal to the input port such that at least a portion of thermal energy generated by one or more of the rectifier and the switching transistor is dissipated from the power supply by way of the input port.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 19, 2015
    Inventor: Martin Standing
  • Patent number: 8970032
    Abstract: The chip module includes a semiconductor chip having a first contact element on a first main face and a second contact element on a second main face. The semiconductor chip is arranged on a corner in such a way that the first main face of the semiconductor chip faces the carrier. One or more electrical connectors are connected to the carrier and include end faces located in a plane above a plane of the second main face of the semiconductor chip.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 3, 2015
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Martin Standing
  • Publication number: 20150008572
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Application
    Filed: July 11, 2014
    Publication date: January 8, 2015
    Inventor: Martin Standing
  • Publication number: 20140319665
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Application
    Filed: July 15, 2014
    Publication date: October 30, 2014
    Inventor: Martin Standing
  • Publication number: 20140311794
    Abstract: Representative implementations of devices and techniques provide off-board power conversion. A power cable is arranged to distribute power from a power supply to a peripheral component. An active circuit is integrated into the cable, converting the power en route from the power supply to the peripheral component.
    Type: Application
    Filed: April 22, 2013
    Publication date: October 23, 2014
    Inventors: Martin STANDING, Andrew ROBERTS, Milko PAOLUCCI
  • Publication number: 20140307391
    Abstract: Representative implementations of devices and techniques provide a printed circuit board (PCB) arranged to at least partly surround an electrical component having a plurality of non-coplanar outer surfaces. The PCB is arranged to fold at one or more predetermined boundaries.
    Type: Application
    Filed: April 13, 2013
    Publication date: October 16, 2014
    Applicant: Infineon Technologies AG
    Inventor: Martin STANDING
  • Patent number: 8786072
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: July 22, 2014
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 8759156
    Abstract: A method of producing a laminate insert package includes providing a first metal layer, printing a first dielectric layer on the first metal layer, providing a second metal layer, printing a second dielectric layer on the second metal layer, and printing a dielectric spacer layer on the first dielectric layer. At least one semiconductor chip is attached to either the first or the second metal layer. A first layer assembly comprising the first metal layer, the first dielectric layer, the dielectric spacer layer and a second layer assembly comprising the second metal layer and the second dielectric layer are brought together. The first and second layer assemblies are laminated to form a laminate insert package, whereby the at least one semiconductor chip is embedded within the laminate insert package.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 24, 2014
    Assignee: Infineon Technologies AG
    Inventor: Martin Standing
  • Publication number: 20140153206
    Abstract: Embodiments relate to active devices embedded within printed circuit boards (PCBs). In embodiments, the active devices can comprise at least one die, such as a semiconductor die, and coupling elements for mechanically and electrically coupling the active device with one or more layers of the PCB in which the device is embedded. Embodiments thereby provide easy embedding of active devices in PCBs and inexpensive integration with existing PCB technologies and processes.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Martin Standing, Andrew Roberts
  • Publication number: 20140111951
    Abstract: Representative implementations of devices and techniques provide improved electrical performance of components, such as chip dice, for example, disposed on different layers of a multi-layer printed circuit board (PCB). In an example, the components may be embedded within layers of the PCB. An insulating layer located between two component layers or sets of layers includes a conductive portion that may be strategically located to provide electrical connectivity between the components. The conductive portion may also be arranged to improve thermal conductivity between points of the PCB.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Martin STANDING, Andrew ROBERTS
  • Publication number: 20140110820
    Abstract: Representative implementations of devices and techniques provide improved thermal performance of a chip die disposed within a layered printed circuit board (PCB). Passive components may be strategically located on one or more surfaces of the PCB. The passive components may be arranged to conduct heat generated by the chip die away from the chip die.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Martin STANDING, Milko PAOLUCCI
  • Publication number: 20140111955
    Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventor: Martin STANDING
  • Patent number: 8686554
    Abstract: A semiconductor package that includes a die with electrodes on opposite surfaces thereof and respective conductive clip electrically and mechanically coupled to the electrode and configured for vertical mounting of the package.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: April 1, 2014
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Patent number: 8603858
    Abstract: A method for manufacturing a semiconductor package, the method comprising providing a substrate having opposite first and second surfaces and having one or more through openings formed therethrough from the first to the second surfaces at predefined positions; providing at least one first die having first and second opposite surfaces and having one or more first contact terminals on the first surface of the at least one first die; placing the at least one first die with the first surface thereof on the first surface of the substrate, with an adhesive applied therebetween outside the one or more through openings, such that the one or more through openings are aligned to the one or more first contact terminals, whereby a die assembly having correspondingly opposite first and second surfaces is formed; providing the first surface of the die assembly with a first plating layer of an electrically conductive plating material to electrically contact the one or more first contact terminals, wherein the plating materi
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: December 10, 2013
    Assignee: Infineon Technologies AG
    Inventors: Martin Standing, Paul Ganitzer
  • Publication number: 20130234283
    Abstract: In one embodiment, a method of fabricating a semiconductor package includes forming a first plurality of die openings on a laminate substrate. The laminate substrate has a front side and an opposite back side. A plurality of first dies is placed within the first plurality of die openings. An integrated spacer is formed around each die of the plurality of first dies. The integrated spacer is disposed in gaps between the laminate substrate and an outer sidewall of each die of the plurality of first dies. The integrated spacer holds the die within the laminate substrate by partially extending over a portion of a top surface of each die of the plurality of first dies. Front side contacts are formed over the front side of the laminate substrate.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 12, 2013
    Applicant: Infineon Technologies AG
    Inventors: Martin Standing, Andrew Roberts
  • Patent number: 8466546
    Abstract: A semiconductor package including a conductive clip preferably in the shape of a can, a semiconductor die, and a conductive stack interposed between the die and the interior of the can which includes a conductive platform and a conductive adhesive body.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: June 18, 2013
    Assignee: International Rectifier Corporation
    Inventors: Andy Farlow, Mark Pavier, Andrew N. Sawle, George Pearson, Martin Standing
  • Publication number: 20130069243
    Abstract: The chip module includes a semiconductor chip having a first contact element on a first main face and a second contact element on a second main face. The semiconductor chip is arranged on a corner in such a way that the first main face of the semiconductor chip faces the carrier. One or more electrical connectors are connected to the carrier and include end faces located in a plane above a plane of the second main face of the semiconductor chip.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 21, 2013
    Applicant: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Martin Standing