Patents by Inventor Masahiko Miwa

Masahiko Miwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11508760
    Abstract: An active matrix substrate includes a plurality of first contact holes extending through an inorganic insulating film, a first protection layer that is a silicon nitride film, and a second protection layer, a plurality of second contact holes extending through the inorganic insulating film and the second protection layer, a first transistor, and a second transistor. A channel region of the second transistor does not overlap the first protection layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: November 22, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiko Miwa, Yohsuke Kanzaki, Takao Saitoh, Masaki Yamanaka, Yi Sun, Seiji Kaneko
  • Publication number: 20220367592
    Abstract: A second connection wire is electrically connected to a first connection wire via a display-side contact portion and terminal-side contact portion in a bending section. The first connection wire and the second connection wire do not overlap each other at least partly between the display-side contact portion and terminal-side contact portion.
    Type: Application
    Filed: June 20, 2019
    Publication date: November 17, 2022
    Inventors: Yohsuke KANZAKI, Yi SUN, Takao SAITOH, Masahiko MIWA, Masaki YAMANAKA
  • Patent number: 11430856
    Abstract: In a bending portion, a slit that exposes a resin substrate is formed in at least one inorganic insulating film, a first flattening film is provided so as to fill in the slit, each of a plurality of wiring lines is provided on the first flattening film and both end portions of the inorganic insulating film, the slit being formed at both end portions, a second flattening film is provided on each of the wiring lines, a plurality of conductive layers each having an island shape are provided on the second flattening film, and each of the wiring lines and a corresponding conductive layer are electrically connected via contact holes formed in the second flattening film.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: August 30, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Masahiko Miwa, Yohsuke Kanzaki, Seiji Kaneko, Yi Sun, Masaki Yamanaka
  • Patent number: 11416108
    Abstract: A display device includes a display area and a frame area surrounding the display area. The display device comprises a TFT layer, a light-emitting element layer, a sealing layer including a first inorganic sealing film, an organic sealing film, and a second inorganic sealing film, a bank coated with the first inorganic sealing film and the second inorganic sealing film, a touch panel function layer, and a plurality of touch panel wires running to intersect with the bank in planar view and connected to the touch panel function layer. The second inorganic sealing film includes a bank coating that coats an upper face of the bank, and a protrusion, in a clearance between neighboring two of the plurality of touch panel wires, protrudes from the bank coating toward the display area or away from the display area.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: August 16, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Yamanaka, Yi Sun, Masahiko Miwa, Takao Saitoh, Yohsuke Kanzaki, Seiji Kaneko
  • Publication number: 20220206623
    Abstract: A display device includes: a thin-film transistor layer; a light emitter including a first electrode, a function layer and a second electrode; a sealing layer; and a touch panel layer including a lower electrode and a plurality of upper electrodes. The lower electrode is composed of a plurality of transparent wires. The plurality of upper electrodes are composed of a plurality of upper wires. Each of the plurality of upper electrodes overlaps the lower electrode with an insulating film interposed between each of the plurality of upper electrodes and the lower electrode. Each of the plurality of transparent wires is wider than each of the plurality of upper wires.
    Type: Application
    Filed: April 19, 2019
    Publication date: June 30, 2022
    Inventors: MASAKI YAMANAKA, YI SUN, TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI
  • Publication number: 20220206622
    Abstract: A display device includes a plurality of upper layer electrodes including a first upper layer electrode and a second upper layer electrode electrically separated from the first upper layer electrode, and a lower layer electrode provided in common with the first upper layer electrode and a second upper layer electrode and overlapping with the first upper layer electrode and the second upper layer electrode via an insulating film. The first upper layer electrode includes a first protrusion protruding toward the second upper layer electrode, and the second upper layer electrode includes a second protrusion protruding toward the first upper layer electrode. The lower layer electrode is provided with a wide portion having a width greater than those of the first protrusion and the second protrusion, the wide portion overlapping at least with a gap between the first protrusion and the second protrusion.
    Type: Application
    Filed: April 19, 2019
    Publication date: June 30, 2022
    Inventors: MASAKI YAMANAKA, YI SUN, TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI
  • Publication number: 20220190002
    Abstract: A display device includes a substrate; a semiconductor layer; a gate insulating film; a gate electrode; a first interlayer insulating film; a capacitance electrode; and a second interlayer insulating film. Each of a pixel circuits includes a drive transistor, a capacitor and a connection wiring line. The capacitance electrode is provided with a first opening and a second opening in portions of positions overlapping with the gate electrode in plan view. The first interlayer insulating film and the second interlayer insulating film include a contact hole provided at a position surrounded by the first opening and a hole provided at a position surrounded by the second opening. The connection wiring line is provided on the second interlayer insulating film and is connected to the gate electrode via the contact hole. The hole overlaps with a portion of a channel region in plan view.
    Type: Application
    Filed: April 9, 2019
    Publication date: June 16, 2022
    Inventors: MASAHIKO MIWA, TAKAO SAITOH, MASAKI YAMANAKA, YI SUN, YOHSUKE KANZAKI
  • Publication number: 20220173202
    Abstract: A display device includes a resin substrate and a thin film transistor layer. The thin film transistor layer includes a first inorganic insulating film, a second inorganic insulating film, and a lead-out wiring line. A frame region includes a bending portion provided with a slit constituted with a first slit and a second slit. Portions of the first inorganic insulating film on both sides in a width direction of the first slit constituting step portions are exposed from the second inorganic insulating film inside the second slit. The lead-out wiring line is electrically connected to the thin film transistor. The step portions are provided with a protruding portion having an island shape. The lead-out wiring line includes an opening covering perimeter edge surface of the protruding portion and exposing an upper face of the protruding portion.
    Type: Application
    Filed: March 29, 2019
    Publication date: June 2, 2022
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, MASAKI YAMANAKA, YI SUN, YOHSUKE KANZAKI
  • Patent number: 11342461
    Abstract: A TFT includes an oxide semiconductor layer including a conductive region electrically connected to a source electrode, a conductive region electrically connected to a drain electrode, a channel region being an oxide semiconductor region that overlaps a gate electrode, and at least one resistive region being an oxide semiconductor region provided between the channel region and a conductive region adjacent to the channel region.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: May 24, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Yohsuke Kanzaki, Seiji Kaneko, Masahiko Miwa, Masaki Yamanaka, Yi Sun
  • Patent number: 11342398
    Abstract: There are provided wires in a frame area. The wires run parallel to each other in a direction crossing a direction in which a bending portion is extended. An inorganic insulating film has an opening therethrough in the bending portion. A top face of a resin substrate is exposed in the opening. The wires are provided on the inorganic insulating film and on the top face of the resin substrate exposed in the opening. In the opening, the top face of the resin substrate and an end face of the inorganic insulating film make a smaller angle below between the wires than below the wires.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: May 24, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takao Saitoh, Masaki Yamanaka, Seiji Kaneko, Yohsuke Kanzaki, Masahiko Miwa, Yl Sun
  • Publication number: 20220115626
    Abstract: A first resin layer is provided to fill a slit formed in at least one inorganic insulating film included in a TFT layer, and extending in a longitudinal direction of a fold portion. A plurality of first routed wires are provided above the first resin layer, and extending in parallel with one another and intersecting with the longitudinal direction of the fold portion. A first protective layer is formed between, and in contact with, the first resin layer and the first routed wires, and provided to at least partially coincide with each of the first routed wires.
    Type: Application
    Filed: January 17, 2019
    Publication date: April 14, 2022
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI, MASAKI YAMANAKA, YI SUN
  • Patent number: 11289563
    Abstract: An electrode contact structure includes a first inorganic insulating film, a first electrode formed on the first inorganic insulating film, a second inorganic insulating film formed on the first inorganic insulating film and the first electrode to cover the first electrode, a second electrode formed on the second inorganic insulating film, a third inorganic insulating film formed on the second inorganic insulating film and the second electrode to cover the second electrode, and a third electrode configured to cover a contact hole formed in the third inorganic insulating film and the second inorganic insulating film, and electrically connect to each of the first electrode and the second electrode exposed in the contact hole.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: March 29, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yohsuke Kanzaki, Takao Saitoh, Masahiko Miwa, Masaki Yamanaka, Yi Sun, Seiji Kaneko
  • Publication number: 20220037449
    Abstract: In a state overlapping a region surrounded by a pair of first wiring lines adjacent to each other among a plurality of first wiring lines extending in parallel to each other and formed by a first metal film, and a pair of third wiring lines among the plurality of third wiring lines extending in parallel to each other in a direction intersecting each of the plurality of first wiring lines, a first metal layer formed by the first metal film is provided in an island shape along the pair of third wiring lines adjacent to each other.
    Type: Application
    Filed: September 21, 2018
    Publication date: February 3, 2022
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, MASAKI YAMANAKA, YOHSUKE KANZAKI, SEIJI KANEKO, YI SUN
  • Publication number: 20220037436
    Abstract: A display device includes: a base substrate; a TFT layer including a plurality of pixel circuits arranged; and a light-emitting element layer. Each of the plurality of pixel circuits includes: a TFT including a semiconductor layer, a gate insulating film, and a gate electrode; and a capacitor including the gate electrode, a first inorganic insulating film, and a capacitive electrode. The capacitive electrode extends all around a perimeter of the gate electrode and extends to an outside of the perimeter. An angle formed between an upper surface of the base substrate and at least a part of an end surface in a circumferential direction of the gate electrode not overlapping the semiconductor layer in the plan view is greater than an angle formed between the upper surface of the base substrate and an end surface of the gate electrode overlapping the semiconductor layer in the plan view.
    Type: Application
    Filed: December 7, 2018
    Publication date: February 3, 2022
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI, MASAKI YAMANAKA, YI SUN
  • Publication number: 20220005887
    Abstract: A TEG near the perimeter of a frame region is away from a TFT, which is disposed in a display region and is actually used for screen display. Hence, the characteristics of the TEG can change in a manner different from that in the characteristics of the TFT within the display region. Accordingly, provided is a display device that includes a TEG pattern disposed between the display region and a trench, and includes a dummy pixel circuit disposed between the display region and a barrier wall. The TEG pattern is outside the display region and is adjacent to at least the dummy pixel circuit.
    Type: Application
    Filed: November 16, 2018
    Publication date: January 6, 2022
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, MASAKI YAMANAKA, YI SUN, YOHSUKE KANZAKI, SEIJI KANEKO
  • Publication number: 20210343818
    Abstract: In a method for manufacturing an active matrix substrate, forming of an underlayer inorganic insulating film includes applying a resist onto the underlayer inorganic insulating film, performing an ashing process of forming a surface having irregularities on a surface of the resist by a first ashing process, and, after the ashing process has been performed, roughening a surface of the underlayer inorganic insulating film by performing a second ashing process and an etching process on the underlayer inorganic insulating film. When forming a semiconductor film, a surface of at least a part of the semiconductor film is roughened following a rough surface of the underlayer inorganic insulating film.
    Type: Application
    Filed: September 6, 2018
    Publication date: November 4, 2021
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI, YI SUN, MASAKI YAMANAKA, SEIJI KANEKO
  • Publication number: 20210295748
    Abstract: A display device is provided with a display area and a frame area on a flexible substrate. The display area includes a transistor and a light-emitting element, and the frame area surrounds the display area. The display device includes: an upper inorganic insulating film, a first upper metal layer, a first resin layer, a protective layer, a second upper metal layer, a second resin layer, and a third resin layer provided in a stated order above a semiconductor layer of a transistor. In a display area, the protective layer covering a whole upper face of the first resin layer comes into contact with an upper wire included in the second upper metal layer.
    Type: Application
    Filed: August 24, 2018
    Publication date: September 23, 2021
    Inventors: SEIJI KANEKO, TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI, MASAKI YAMANAKA, YI SUN
  • Publication number: 20210296426
    Abstract: First overlying wires are provided between a display area and a bending portion, extending parallel to each other in a direction crossing the direction in which the bending portion extends. Underlying wires are provided between a first resin layer and a second resin layer on a resin substrate, extending across a slit and parallel to each other in a direction crossing the direction in which the bending portion extends. The first overlying wires are electrically connected respectively to the underlying wires via first contact holes formed through the second resin layer and inorganic insulation films.
    Type: Application
    Filed: July 20, 2018
    Publication date: September 23, 2021
    Inventors: TAKAO SAITOH, MASAHIKO MIWA, YOHSUKE KANZAKI, YI SUN, MASAKI YAMANAKA, SEIJI KANEKO
  • Publication number: 20210271336
    Abstract: In a clearance between neighboring two of touch panel wires, protrusions included in a second inorganic sealing film each protrude: from a first coating, coating an upper face of a first bank, toward a display area or away from the display area; or from a second coating, coating an upper face of a second bank, toward the display area or away from the display area.
    Type: Application
    Filed: July 25, 2018
    Publication date: September 2, 2021
    Inventors: MASAKI YAMANAKA, YI SUN, MASAHIKO MIWA, TAKAO SAITOH, YOHSUKE KANZAKI, SEIJI KANEKO
  • Publication number: 20210265429
    Abstract: A display device includes a display layer that includes a TFT layer, a light-emitting element layer, a sealing layer, a bank, and a touch panel layer. The touch panel layer includes a plurality of touch-panel-use lines electrically connecting a terminal section to a plurality of sensing sections configured to transfer measurements. The plurality of touch-panel-use lines resides on the sealing layer so as to intersect with the bank in a plan view of the display device. The plurality of touch-panel-use lines comprises a first touch-panel-use line and a second touch-panel-use line that are adjacent to each other, an interlayer insulation film being interposed between the first touch-panel-use line and the second touch-panel-use line in an intersection where the first touch-panel-use line and the second touch-panel-use line intersect with the bank.
    Type: Application
    Filed: July 12, 2018
    Publication date: August 26, 2021
    Inventors: MASAKI YAMANAKA, YOHSUKE KANZAKI, YI SUN, TAKAO SAITOH, MASAHIKO MIWA, SEIJI KANEKO