Patents by Inventor Meng Huang

Meng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7369441
    Abstract: A sensing circuit for multi-level flash memory is disclosed. The advantages of the sensing circuit are reducing the circuit size, reducing the testing time for tuning reference voltage and maintaining a constant difference between two approximate reference voltages. The sensing circuit comprises a reference voltage generator which includes a number of serial connected resistive devices and provides several reference voltages by voltage division; a data saving circuit outputs a data voltage; a comparing circuit compares the data voltage with the several reference voltages to output a comparing signal; a decoder receives and then decodes the comparing signal to output the data.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: May 6, 2008
    Assignee: Winbond Electronics Corporation
    Inventor: Chung-Meng Huang
  • Patent number: 7293220
    Abstract: An apparatus and method for accessing data from a storage medium is disclosed. The apparatus fetches a data block from the storage medium via an accessing unit, and corrects an error of the data block by an error correction code (ECC) decoder according to an ECC of the data block. The apparatus also includes an error detection code (EDC) processor for calculating an EDC of each data sector of the data block, and a flag register for storing a flag associated with each data sector. The method includes re-fetching a data sector if the associated flag indicates the EDC of the data sector is incorrect; and bypassing a data sector if the associated flag indicates that the EDC of the data sector is correct, even though the ECC of the data block indicates that the data sector contains an error.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: November 6, 2007
    Assignee: Via Technologies, Inc.
    Inventors: Dao-Ning Guo, Ching-Yu Chen, Meng-Huang Chu, Pei-Jei Hu
  • Patent number: 7193274
    Abstract: In an ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad on a substrate, an ESD protection device has a source connected to the pad and a gate and a drain both connected to a ground, and a substrate-triggering control circuit is used to keep the substrate at a low voltage during a normal operation, and pumping the substrate to a high voltage during an ESD event for the ESD protection device to be triggered much easier. The substrate-triggering control circuit is implemented with an active device, thereby reducing the chip size for the circuit and the loading effect on the pad.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: March 20, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Yen-Hung Yeh, Chia-Ling Lu, Tao-Cheng Lu
  • Publication number: 20070025146
    Abstract: A sensing circuit for multi-level flash memory is disclosed. The advantages of the sensing circuit are reducing the circuit size, reducing the testing time for tuning reference voltage and maintaining a constant difference between two approximate reference voltages. The sensing circuit comprises a reference voltage generator which includes a number of serial connected resistive devices and provides several reference voltages by voltage division; a data saving circuit outputs a data voltage; a comparing circuit compares the data voltage with the several reference voltages to output a comparing signal; a decoder receives and then decodes the comparing signal to output the data.
    Type: Application
    Filed: February 27, 2006
    Publication date: February 1, 2007
    Inventor: Chung-Meng Huang
  • Publication number: 20060273399
    Abstract: In an ESD protection structure and method utilizing substrate triggering for a high-voltage tolerant pad on a substrate, an ESD protection device has a source connected to the pad and a gate and a drain both connected to a ground, and a substrate-triggering control circuit is used to keep the substrate at a low voltage during a normal operation, and pumping the substrate to a high voltage during an ESD event for the ESD protection device to be triggered much easier. The substrate-triggering control circuit is implemented with an active device, thereby reducing the chip size for the circuit and the loading effect on the pad.
    Type: Application
    Filed: August 1, 2006
    Publication date: December 7, 2006
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Yen-Hung Yeh, Chia-Ling Lu, Tao-Cheng Lu
  • Patent number: 7106563
    Abstract: An I/O pad ESD protection circuit is composed of a SCR circuit, a first diode, a second diode, and an anti-latch-up circuit. The SCR circuit has a first connection terminal and a second connection terminal, respectively coupled to the I/O pad and the ground voltage, so as to discharge the electrostatic charges. The anti-latch-up circuit has two terminals, which are respectively coupled to the voltage source and the ground voltage, and another connection terminal, used to send an anti-latch-up signal to the SCR for changing the activating rate. The latch-up phenomenon is avoided.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: September 12, 2006
    Assignee: MAXRONIX International Co., Ltd.
    Inventors: Chun Hsiang Lai, Meng Huang Liu, Tao Cheng Lu
  • Publication number: 20060136652
    Abstract: An electronic system with remap function comprises a memory unit, a remap unit, and a microprocessor. The memory unit at least has a first bank and a second bank, which have a common area and a non-common area, respectively. The common area of the first bank comprises an addressing table and the common area of the second bank comprises at least one remap program code. The remap unit receives an address data, a bank selecting data, and a remap data, and then generates an embodied bank selecting data according to the remap data and the bank selecting data, and generates an embodied address data according to the remap data and the address data. The microprocessor fetches the original program code from the first bank or the second bank, or fetches the remap program code from the second bank according to the embodied bank selecting data and the embodied address data.
    Type: Application
    Filed: December 21, 2004
    Publication date: June 22, 2006
    Applicant: VIA Technologies, Inc.
    Inventors: Meng-Huang Chu, Ding-Lung Chang, Haw-Kuen Su
  • Patent number: 7020061
    Abstract: A method for detecting a current through a pick-up head in an optical storage device. An output value is first set and a root-mean-square value corresponding to the current is further obtained. Next, compute a new value according to the root-mean-square value and a preset value, wherein the preset value is expressed in exponential form and related to an allowable current and a maximum current of the pick-up head. The output value is set as the new value. The pick-up head is shut down if the output value is greater than a threshold value within a sampling number, else repeating the step of obtaining the root-mean-square value.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: March 28, 2006
    Assignee: VIA Technologies, Inc.
    Inventors: Meng-Huang Chu, Meng-Fu Lin
  • Patent number: 7010969
    Abstract: For measuring the pressure and tread depth of a tire, an electronic measuring device is disclosed to include a housing, a tread scale, which has a sliding block coupled to the housing and movable along an elongated sliding slot and a measuring tip fixedly connected to the sliding block and movable in and out of the housing, a variable resistor mounted inside the housing for outputting a variation of resistance value indicative of movement of the measuring tip relative to the housing, a pressure sensor mounted in the housing for detecting the pressure of a tire, a display, and a circuit board mounted inside the housing and electrically connected with the variable resistor, the pressure sensor and the display for converting the variation of resistance value received from the variable resistor into a readable distance value and the signal outputted from the pressure sensor into a readable pressure reading for display on the displays.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: March 14, 2006
    Inventor: Wei-Meng Huang
  • Publication number: 20060045927
    Abstract: The present invention concerns herbal formulations for the modification of the levels of blood lipids. Aspects of the invention include the preparation of herbal formulations and methods for their use.
    Type: Application
    Filed: August 25, 2004
    Publication date: March 2, 2006
    Inventors: Dajian Yang, Meng Huang, Shi Chen, Albert Chan
  • Publication number: 20060031687
    Abstract: An encryption/decryption method and devices for protecting data in a memory device from unauthorized access is provided. First, obtaining a specific code from a memory device and then encrypting the specific code and original data for obtaining encrypted data during a write cycle. Finally, writing the encrypted data to the memory device according to an access address. The access address can be also encrypted to generate the encrypted data. The encryption level increases by this way so that the valuable information is under protection.
    Type: Application
    Filed: June 27, 2005
    Publication date: February 9, 2006
    Inventors: Haw-Kuen Su, Pei-Chieh Hu, Meng-Huang Chu
  • Patent number: 6985413
    Abstract: An optical storage system includes a pickup head for picking up data from a storage medium. Firstly, the maxima of a tracking error signal and runout are obtained in a calibration procedure in a close loop formed by an optical pickup head, a pre-amplifier, a compensator, a band-pass filter and a maximum detector. A calibration factor is then defined and derived by using the obtained maxima and nominal factors of a power amplifier and the optical pickup head of the optical storage system. The path formed by the series-connected band-pass filter and maximum detector is then disabled, while the calculated calibration factor is then stored in the compensator. The optical storage system may operate in a close loop formed by the optical pick head, pre-amplifier, compensator, a power amplifier under a normal operation procedure so that the optical storage system may record or read data onto/from an optical disc under the compensation provided by the calibration factor.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: January 10, 2006
    Assignee: Via Technologies, Inc.
    Inventor: Meng-Huang Chu
  • Patent number: 6965504
    Abstract: An ESD protection apparatus for a high-voltage input pad comprises a modulator connected between the input pad and a snapback device with first and second guard rings surrounding the modulator, third guard ring surrounding the snapback device, and first and second guard ring control circuits to control the guard rings such that the protection apparatus has higher triggering and holding voltages under normal operation and lower triggering and holding voltages under ESD event.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 15, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Patent number: 6947267
    Abstract: The present invention relates an electrostatic discharge (ESD) protection device that is applied to a mixed voltage circuit assembly. The device comprises a RC controlled circuit subassembly and a field transistor, which the RC controlled circuit is coupled with the mixed voltage circuit assembly to substantially control the ESD protection device to be ON or OFF. The field transistor is coupled between a first power supply and a second power supply of said mixed voltage circuit assembly, which is off on the condition of a normal operating condition and is conducting as an ESD event occurred.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: September 20, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Publication number: 20050193287
    Abstract: A method for accessing data from a storage medium according to requirements of a host is disclosed. The storage medium stores a plurality of data blocks that each one of them further includes a plurality of data sectors and an error correction code used for recovering errors of the data block. Each one of the data sectors further includes an error detection code used for detecting correctness of associated data sector. When a data block is verified to include at least one incorrect data sectors by means of the error detection codes, those correct data sectors rather than all the data sectors are stored into a specific position of a data buffer. The whole data block is next re-fetched and stored into the same position of the data buffer used to occupied by the data block, those stored correct data sectors are then re-fetched to overwrite corresponding ones in the data buffer. Thereafter, the incorrect data sectors are re-detected to verify their correctness again.
    Type: Application
    Filed: February 10, 2004
    Publication date: September 1, 2005
    Inventors: Dae-Ning Guo, Ching-Yu Chen, Meng-Huang Chu, Pei-Jei Hu
  • Patent number: 6933540
    Abstract: An ESD protection apparatus for dual-polarity input pad comprises a triple-well formed with a first, second and third regions to form an SCR structure. A first and second ground connection regions of opposite conductivity types are formed on the first region, a first and second input connection regions of opposite conductivity types are formed in the third region, and a bridge region is formed across the second region and extends to the first and third regions. Under normal operation, the first, second, and third regions form two back-to-back diodes. Under positive polarity ESD event, breakdown is occurred between the bridge and first regions to thereby trigger an SCR circuit for positive polarity ESD protection. Under negative polarity ESD event, breakdown is occurred between the bridge and third regions to thereby trigger an SCR circuit for negative polarity ESD protection.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: August 23, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Patent number: 6919604
    Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: July 19, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen-Shang Lai, Meng-Huang Liu, Shin Su, Tao-Cheng Lu
  • Patent number: 6916748
    Abstract: A method of forming emitter tips on a field emission display. A conductive layer is formed on a substrate, and then a photoresist layer is formed on the conductive layer wherein the photoresist layer has at least a pattern for defining predetermined areas of the emitter tips. Next, using plasma etching with the pattern of the photoresist layer as a mask, the conductive layer is etched to become a plurality of emitter stages. The etching rate of the conductive layer is greater than the etching rate of the photoresist layer. Finally, continuous use of plasma etching with an increased vertical-etching rate etches the lateral sidewalls of the emitter stages, thus shaping them as emitter tips.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: July 12, 2005
    Assignee: Nanya Technology Corporation
    Inventor: Yung-Meng Huang
  • Patent number: 6900099
    Abstract: A flash memory cell. The memory cell includes a substrate, a floating gate, a control gate, and a source/drain region. The floating gate, disposed over the substrate and insulated from the substrate, has a plurality of hut structures. The control gate is disposed over the floating gate and insulated from the floating gate. The source/drain region is formed in the substrate. This invention further includes a method of fabricating a flash memory cell. First, a polysilicon layer and a germanium layer are successively formed over a substrate and insulated from the substrate. Subsequently, the substrate is annealed to form a germanium layer having a plurality of hut structures on the polysilicon layer to serve as a floating gate with the polysilicon layer. Next, a control gate is formed over the floating gate and insulated from the floating gate. Finally, a source/drain region is formed in the substrate.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: May 31, 2005
    Assignee: Nanya Technology Corporation
    Inventor: Yung-Meng Huang
  • Patent number: D514965
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: February 14, 2006
    Inventor: Wei-Meng Huang