Patents by Inventor Meng Huang

Meng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020085328
    Abstract: The present invention relates an electrostatic discharge (ESD) protection device that is applied to a mixed voltage circuit assembly. The device comprises a RC controlled circuit subassembly and a field transistor, which the RC controlled circuit is coupled with the mixed voltage circuit assembly to substantially control the ESD protection device to be ON or OFF. The field transistor is coupled between a first power supply and a second power supply of said mixed voltage circuit assembly, which is off on the condition of a normal operating condition and is conducting as an ESD event occurred.
    Type: Application
    Filed: May 14, 2001
    Publication date: July 4, 2002
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Meng-Huang Liu, Chun-Hsiang Lai, Shin Su, Tao-Cheng Lu
  • Patent number: 6410963
    Abstract: An electrostatic discharge protection which is electrically coupled with an interface terminal and a devices area, at least include a first bipolar junction transistor, a second bipolar junction transistor, a first MOS transistor, and a second MOS transistor. Both bipolar junction transistors forms the well-known silicon controlled rectifier, first MOS transistor locates between interface terminal and second bipolar junction transistor and second MOS transistor locates between emitter of second bipolar junction transistor and ground point, and gates of both MOS transistor electrically coupled with voltage base point whose voltage is equal to work voltage of devices area. While devices area is turned off, silicon controlled rectifier would be latch-up and provides function of electrostatic discharge protection. While devices area is turned on, second MOS transistor also is turned on so that part of current flows into ground point but not flows into second bipolar junction transistor.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: June 25, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen-Shang Lai, Meng-Huang Liu, Shin Su, Tao-Cheng Lu
  • Patent number: 6392926
    Abstract: The present invention discloses an NMOS coupling circuit for preventing gate junction breakdown of a flash memory. The present invention adds at least one isolating stage between a conducting stage and a high voltage HV of the prior coupling circuit, and the addition generates a benefit that the voltage difference of the high voltage HV is burdened by both the conducting stage and the isolating stage of the coupling circuit. In other words, the voltage difference in the gate junction of the conducting stage will be reduced, and the probability of punching through a transistor will also be reduced. For reducing the effect of an instant voltage difference when the high voltage HV is enabled, the present invention electrically connects one end of a diode to the gate of the isolating stage, and electrically connects another end of the diode to a lower power source VDD.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: May 21, 2002
    Assignee: Winbond Electronics Corporation
    Inventor: Chung-Meng Huang
  • Publication number: 20010017827
    Abstract: A device for compensating the error signal produced by a high-speed disk system. The error signal is fed to a compensator and a bandpass filter respectively. The processed signals produced by the compensator and the bandpass filter are summed to output a compensated signal. The bandpass filter processes the rotating frequency portion of the error signal. The compensator includes a lead compensator and a lag compensator either serially connected or parallel connected.
    Type: Application
    Filed: January 4, 2001
    Publication date: August 30, 2001
    Inventor: Meng-Huang Chu
  • Publication number: 20010015941
    Abstract: A method for detecting the speed of a sledge motor in an optical storage device. In response to a track jumping command, a tracking servo output signal is expanded onto an orthogonal space to obtain simulation parameters corresponding to the tracking servo output signal. A pseudo-tracking servo output signal is generated according to the simulation parameters of the tracking servo output signal. Then, the pseudo-tracking servo output signal is used to compute the speed of the sledge motor.
    Type: Application
    Filed: January 4, 2001
    Publication date: August 23, 2001
    Inventor: Meng-Huang Chu
  • Publication number: 20010014068
    Abstract: A method for detecting a current through a pick-up head in an optical storage device. An output value is first set and a root-mean-square value corresponding to the current is further obtained. Next, compute a new value according to the root-mean-square value and a preset value, wherein the preset value is expressed in exponential form and related to an allowable current and a maximum current of the pick-up head. The output value is set as the new value. The pick-up head is shut down if the output value is greater than a threshold value within a sampling number, else repeating the step of obtaining the root-mean-square value.
    Type: Application
    Filed: December 14, 2000
    Publication date: August 16, 2001
    Inventors: Meng-Huang Chu, Meng-Fu Lin
  • Publication number: 20010010461
    Abstract: A phase comparator for calculating the phase difference between a test wave form and an output wave form in a disk driver according to the invention includes a phase converter, a first multiplier, a first integrator, a second multiplier, a second integrator and a phase angle calculator. The phase converter for delaying the test wave form for a specific time based on the frequency thereof. The first multiplier electrically coupled to the phase converter for performing a first operation by multiplying the delayed test wave form with the output wave form. The first integrator electrically coupled to the first multiplier for integrating the result of the first operation for a period to generate a first weighted value. The second multiplier for performing a second operation by multiplying the test wave form with the output wave form. The second integrator electrically coupled to the second multiplier for integrating the result of the second operation for the same period to generate a second weighted value.
    Type: Application
    Filed: December 11, 2000
    Publication date: August 2, 2001
    Inventor: Meng-Huang Chu
  • Patent number: 5286350
    Abstract: A water distiller includes a raw water chamber for storing raw water, a main vaporization tank coupled with the raw water chamber for vaporizing raw water, a condensation device coupled with the main vaporization tank for condensing steam from the main vaporization tank, and a distilled water chamber communicated with the condensing conduit unit for accepting and storing distilled water. An auxiliary vaporization tank is communicated with the main vaporization tank and is mounted on the top end portion of the main vaporization tank. Each of the main and auxiliary vaporization tanks has a generally conical top wall which has a lower end portion that is provided with an annular water collecting groove formed in the inner surface thereof. Each of the water collecting grooves has a bottom wall which has a discharge opening formed therethrough.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: February 15, 1994
    Inventor: Shan-Meng Huang