Patents by Inventor Michel Bruel

Michel Bruel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130154065
    Abstract: A substrate is treated by means of at least one pulse of a luminous flux of determined wavelength. The substrate comprises an embedded layer that absorbs the luminous flux independently of the temperature. The embedded layer is interleaved between a first treatment layer, layer and a second treatment layer. The first treatment layer has a coefficient of absorption of luminous flux that is low at ambient temperature and grows as the temperature rises. The luminous flux may be applied in several places of the surface of the first layer to heat regions of the embedded layer and generate a propagating thermal front in the first layer opposite the heated regions of the embedded layer, which generate constraints within the second layer.
    Type: Application
    Filed: September 5, 2011
    Publication date: June 20, 2013
    Applicant: SOITEC
    Inventor: Michel Bruel
  • Patent number: 8420506
    Abstract: A process for cleaving a substrate for the purpose of detaching a film therefrom. The method includes the formation of a stress-generating structure locally bonded to the substrate surface and designed to expand or contract in a plane parallel to the substrate surface under the effect of a heat treatment; and the application of a heat treatment to the structure, designed to cause the structure to expand or contract so as to generate a plurality of local stresses in the substrate which generates a stress greater than the mechanical strength of the substrate in a cleavage plane parallel to the surface of the substrate defining the film to be detached, the stress leading to the cleavage of the substrate over the cleavage plane. Also, an assembly of a substrate and the stress-generating structure as well as use of the assembly in a semiconductor device for photovoltaic, optoelectronic or electronic applications.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: April 16, 2013
    Assignee: Soitec
    Inventor: Michel Bruel
  • Publication number: 20130072009
    Abstract: A method for preparing a substrate for detaching a layer by irradiation of the substrate with a light flux for heating a buried region of the substrate and bringing about decomposition of the material of that region to detach said detachment layer. The method includes fabricating an intermediate substrate including a first buried layer, and a second covering layer that covers all or part of the first layer, with the covering layer being substantially transparent to the light flux and with the buried layer formed by implantation of particles into the substrate, followed by absorbing the flux, and selectively and adiabatically irradiating a treated region of the buried layer until at least partial decomposition of the material constituting it ensues.
    Type: Application
    Filed: June 8, 2011
    Publication date: March 21, 2013
    Applicant: SOITEC
    Inventor: Michel Bruel
  • Patent number: 8324530
    Abstract: A method for heating a wafer that has at least one layer to be heated and a sub-layer. The method includes applying at least one light flux pulse to the wafer for heating the at least one layer in a manner such that the absorption coefficient of the flux by the layer is low as long as the temperature of the layer to be heated is in the low temperature range (PBT) but the absorption coefficient increases significantly when the temperature of the layer enters a high temperature range (PHT). Also, a sub-layer is selected such that the absorption coefficient of the applied light flux at the selected wavelength is high in the low temperature range (PBT) and the temperature enters the high temperature range (PHT) when the sub-layer is subjected to the light flux. The application of the light flux achieves improved heating of the wafer.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: December 4, 2012
    Assignee: Soitec
    Inventor: Michel Bruel
  • Publication number: 20120199953
    Abstract: The present invention relates to a process for smoothing the surface of a semiconductor wafer by fusion. The process includes defining a reference length which dimensions wafer surface roughness that is to be reduced or removed, and scanning the surface with a fusion beam while adjusting parameters of the fusion beam so as to fuse, during the scanning of the surface, a local surface zone of the wafer whose length is greater than or equal to the reference length, with the scanning continued to smooth the entire surface of the wafer by eliminating surface roughnesses of period lower than the reference length. The present invention also relates to a semiconductor wafer having a surface layer made of a semiconducting material that is smoothed by the process and that does not exhibit any roughness of period lower than the reference length.
    Type: Application
    Filed: January 12, 2012
    Publication date: August 9, 2012
    Applicant: SOITEC
    Inventor: Michel Bruel
  • Publication number: 20120161291
    Abstract: A process for cleaving a substrate for the purpose of detaching a film therefrom. The method includes the formation of a stress-generating structure locally bonded to the substrate surface and designed to expand or contract in a plane parallel to the substrate surface under the effect of a heat treatment; and the application of a heat treatment to the structure, designed to cause the structure to expand or contract so as to generate a plurality of local stresses in the substrate which generates a stress greater than the mechanical strength of the substrate in a cleavage plane parallel to the surface of the substrate defining the film to be detached, the stress leading to the cleavage of the substrate over the cleavage plane. Also, an assembly of a substrate and the stress-generating structure as well as use of the assembly in a semiconductor device for photovoltaic, optoelectronic or electronic applications.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 28, 2012
    Inventor: Michel Bruel
  • Publication number: 20120133028
    Abstract: A semiconductor structure includes a thin semiconductor layer fixed on an applicator or flexible support, the thin layer having an exposed surface characterized by fractured solid bridges spaced apart by cavities. A method of producing the thin layer of semiconductor material includes implanting ions into the semiconductor wafer to define a reference plane, where the ion dose is above a minimum dose, but below a critical dose so as to avoid degrading the wafer surface. The method further includes applying a thermal treatment to define a layer of microcavities and applying stress to free the thin layer from the wafer.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 31, 2012
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol
  • Publication number: 20120074526
    Abstract: The invention relates to a detachable substrate for the electronics, optics or optoelectronics industry, that includes a detachable layer resting on a buried weakened region. This substrate is remarkable in that this buried weakened region consists of a semiconductor material that is denser in the liquid state than in the solid state and that contains in places precipitates of naturally volatile impurities. The invention also relates to a process for fabricating and detaching a detachable substrate.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 29, 2012
    Inventor: Michel Bruel
  • Patent number: 8101503
    Abstract: A semiconductor structure includes a thin semiconductor layer fixed on an applicator or flexible support, the thin layer having an exposed surface characterized by fractured solid bridges spaced apart by cavities. A method of producing the thin layer of semiconductor material includes implanting ions into the semiconductor wafer to define a reference plane, where the ion dose is above a minimum dose, but below a critical dose so as to avoid degrading the wafer surface. The method further includes applying a thermal treatment to define a layer of microcavities and applying stress to free the thin layer from the wafer.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: January 24, 2012
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol
  • Publication number: 20110315664
    Abstract: The present provides methods for treating a part made from a decomposable semiconductor material, and particularly, methods for detaching a surface film from the rest of such a part. According to the provided methods, a burst or pulse of light particles of short duration and very high intensity is applied to the part in order to selectively heat under substantially adiabatic conditions an area of the part located at a predefined depth from the surface to a temperature higher than the decomposition temperature of the material, and subsequently a surface film is detached from the rest of the part at the heated area. In preferred embodiments, the decomposable semiconductor material comprises Ga, or comprises AlxGayIn1-x-yN, where 0?x?1, 0?y?1 and x+y?1.
    Type: Application
    Filed: May 19, 2011
    Publication date: December 29, 2011
    Inventor: Michel Bruel
  • Publication number: 20110293254
    Abstract: The invention relates to a method and to a device for at least locally heating a plate including at least one layer (2) to be at least locally heated by at least one main, light flow pulse, and including at least one priming region (4) located deeply relative to the front surface of said layer to be heated, wherein the main flow (7) is capable of heating said layer to be heated (2) while the temperature of the latter is within a high temperature range (PHT), and a priming a secondary heating means (9) capable of heating said priming region from a temperature within a low temperature range (PBT) up to a temperature within said high temperature range (PHT).
    Type: Application
    Filed: October 27, 2009
    Publication date: December 1, 2011
    Inventor: Michel Bruel
  • Patent number: 8062564
    Abstract: Method for fabricating a structure in the form of a plate, and structure in the form of a plate, in particular formed from silicon, including at least one substrate, a superstrate and at least one intermediate layer interposed between the substrate and the superstrate, in which the intermediate layer comprises at least one base material having distributed therein atoms or molecules termed extrinsic atoms or molecules which differ from the atoms or molecules of the base material, and in which a heat treatment is applied to said plate so that, in the temperature range of said heat treatment, the intermediate layer is plastically deformable and the presence of the selected extrinsic atoms or molecules in the selected base material causes the irreversible formation of micro-bubbles or micro-cavities in the intermediate layer.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: November 22, 2011
    Assignee: S.O.I.Tec Silicon on Insulator Technologies
    Inventor: Michel Bruel
  • Publication number: 20110250416
    Abstract: This invention provides composite semiconductor substrates and methods for fabricating such substrates. The composite structures include a semiconductor substrate, a semiconductor superstrate and an intermediate layer interposed between the substrate and the superstrate that comprises a material that undergoes a structural transformation When subject to a suitable heat treatment. The methods provide such a heat treatment so that the intermediate layer becomes spongy or porous, being filled with numerous micro-bubbles or micro-cavities containing a gaseous phase. The composite semiconductor substrates with structurally-transformed intermediate layers have numerous applications.
    Type: Application
    Filed: June 16, 2011
    Publication date: October 13, 2011
    Inventors: Michel Bruel, Bernard Aspar, Chrystelle Lagahe-Blanchard
  • Publication number: 20110092051
    Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.
    Type: Application
    Filed: December 23, 2010
    Publication date: April 21, 2011
    Inventors: Hubert Moriceau, Michel Bruel, Bernard Aspar, Christophe Maleville
  • Patent number: 7883994
    Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: February 8, 2011
    Assignee: Commissariat A l'Energie Atomique
    Inventors: Hubert Moriceau, Michel Bruel, Bernard Aspar, Christophe Maleville
  • Patent number: 7846816
    Abstract: Process for producing a multilayer structure that includes, within the depth thereof, a separating layer, including: producing an initial multilayer structure comprising a base substrate, a surface substrate and, between the base substrate and the surface substrate, an absorbent layer that can absorb a light power flux in at least one zone and a liquefiable intermediate layer that includes, in at least one zone, impurities having a coefficient of segregation relative to the material constituting this intermediate layer of less than unity; and in subjecting, for a defined time and in the form of at least one pulse, said initial structure to said light power flux, this flux being regulated so as to liquefy at least one portion of said intermediate layer under the effect of the propagation of the thermal energy, in such a way that it results, thanks to the initial presence of said impurities, in a modification of at least one characteristic and/or of at least one property of said intermediate layer arising from
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: December 7, 2010
    Assignee: S.O.I. Tec Silicon on Insulator Technologies
    Inventor: Michel Bruel
  • Publication number: 20100288741
    Abstract: The invention relates to a method for heating a wafer (1) comprising at least one layer to be heated (2) and a sub-layer (4), under the effect of at least one light flux pulse, comprising the following steps: selecting a light flux (7), a layer to be heated (2) such that the absorption coefficient of said flux by the layer to be heated (2) is low as long as the temperature of said layer to be heated is in the low temperature range (PBT) and said absorption coefficient increases significantly when the temperature of the layer to be heated enters a high temperature range (PHT); and selecting a sub-layer (4) such that the absorption coefficient of said light flux at said selected wavelength is high in said low temperature range (PBT) and the temperature enters the high temperature range (PHT) when said sub-layer is subject to the light flux; and applying said light flux (7) to said wafer (1).
    Type: Application
    Filed: September 26, 2008
    Publication date: November 18, 2010
    Inventor: Michel Bruel
  • Publication number: 20090311477
    Abstract: The invention relates to a compliant substrate (5) comprising a carrier (1) and at least one thin layer (4), formed on the surface of the carrier and intended to receive, in integral manner, a stress-giving structure. The carrier (1) and the thin layer (4) are joined to one another by joining means (3) such that the stresses brought by said structure are absorbed in whole or in part by the thin layer (4) and/or by the joining means (3) which comprise at least one joining zone chosen from among the following joining zones: a layer of microcavities and/or a bonding interface whose bonding energy is controlled to permit absorption of said stresses.
    Type: Application
    Filed: August 19, 2009
    Publication date: December 17, 2009
    Inventors: Bernard ASPAR, Michel BRUEL, Eric JALAGUIER, Hubert MORICEAU
  • Publication number: 20090130392
    Abstract: A semiconductor structure includes a thin semiconductor layer fixed on an applicator or flexible support, the thin layer having an exposed surface characterized by fractured solid bridges spaced apart by cavities. A method of producing the thin layer of semiconductor material includes implanting ions into the semiconductor wafer to define a reference plane, where the ion dose is above a minimum dose, but below a critical dose so as to avoid degrading the wafer surface. The method further includes applying a thermal treatment to define a layer of microcavities and applying stress to free the thin layer from the wafer.
    Type: Application
    Filed: December 12, 2008
    Publication date: May 21, 2009
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol
  • Patent number: 7498234
    Abstract: The invention relates to a method of producing a thin layer of semiconductor material including: a step of implanting ions through a flat face (2) of a semiconductor wafer in order to create a layer of microcavities, the ion dose being within a specific range in order to avoid the formation of blisters on the flat face, a thermal treatment step in order to achieve coalescence of the microcavities possibly, a step of creating at least one electronic component (5) in the thin layer (6), a separation step of separating the thin layer (6) from the rest (7) of the wafer.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: March 3, 2009
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol