Abstract: A package structure including a die, a plurality of first conductive connectors, a second conductive connector electrically insulated from the die, a redistribution layer and a conductive shield is provided. The die includes an active surface, a back surface opposite the active surface, and a sidewall coupling the active surface to the back surface. The first conductive connectors are disposed on the active surface of the die and electrically connected to the die. The second conductive connector is disposed on the die and aside the first conductive connectors. The redistribution layer is disposed on the die and electrically connected to the first conductive connectors and the second conductive connector. The conductive shield coupled to the redistribution layer surrounds the second conductive connector and at least a portion of the sidewall. The die is electrically insulated to the conductive shield. A chip package structure is also provided.

Abstract: The present disclosure provides a mixture of sugar apple and rosemary extracts, optionally in combination with prickly ash extract, for use as skin care compositions.

Abstract: Example task assignment methods disclosed herein for video analytics processing in a cloud computing environment include determining a graph, such as a directed acyclic graph, including nodes and edges to represent a plurality of video sources, a cloud computing platform, and a plurality of intermediate network devices in the cloud computing environment. Disclosed example task assignment methods also include specifying task orderings for respective sequences of video analytics processing tasks to be executed in the cloud computing environment on respective video source data generated by respective ones of the video sources.

Abstract: An electronic device comprises a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a first gate, a first terminal, and a second terminal; a first sense transistor integrated in the first semiconductor die, the first sense transistor comprising a second gate and third and fourth terminals, the second gate coupled to the first gate and the fourth terminal coupled to the second terminal; a first resistor integrated in the first semiconductor die, the first resistor has a first temperature coefficient; a second sense transistor integrated in the first semiconductor die, the second sense transistor comprising a third gate and seventh and eighth terminals, the third gate coupled to the first gate and the eighth terminal coupled to the second terminal; and a second resistor integrated in the first semiconductor die, the second resistor has a second temperature coefficient.

Abstract: The present disclosure relates to a calibrated laser printing method, which is a pre-laser machining operation of wafers and comprises steps as follows: a piece of calibration glass is carried and leveled by a leveling system; a plurality of target points are marked on the piece of calibration glass by a laser system based on data of default positions of the plurality of target points on the piece of calibration glass; true positions of the target points on the piece of calibration glass are measured by an image system; data of measured true positions is transmitted to a resetting system; the piece of calibration glass is shifted to a next location by a displacement system on which the leveling system is carried for repetitive executions of above steps in the case of measurement not completed; data between default and true positions of the target points is compared; a reflecting mirror is deflected by an angle for calibrations of laser beams projected on a wafer in the case of any offset between default and t

Abstract: A multi-stop time-to-digital converter (TDC, 110) includes single-stop TDCs (510) connected to output nodes of a ring oscillator (504). Other features and embodiments are also provided.

Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.

Abstract: A time-to-digital converter (TDC, 110) obtains a Start signal to indicate the start of an event, and a Stop signal whose assertion indicates the stop of the event. The Stop signal can be asserted multiple times due to false indications of the event stop. The TDC continuously monitors the Stop signal to generate a separate digital value (T.j_i) for the duration from the event's starting time to each assertion of the Stop signal. The digital values can be analyzed to select the true duration of the event. Other features and embodiments are also provided.

Abstract: An electronic device comprises: a first semiconductor die; a power transistor integrated in the first semiconductor die, the power transistor comprising a gate, a first terminal, and a second terminal; a sense transistor integrated in the first semiconductor die, the sense transistor comprising a gate coupled to the gate of the power transistor, a first terminal, and a second terminal coupled to the second terminal of the power transistor; and a first resistor integrated in the first semiconductor die, the first resistor comprising a polysilicon section and a metal section coupled to the polysilicon section, the first resistor comprising a first terminal and a second terminal, wherein the first terminal of the first resistor is coupled to the first terminal of the sense transistor.

Abstract: The present invention relates to an LC medium comprising and a liquid-crystalline host consisting of an LC component H) comprising one or more mesogenic or liquid-crystalline compounds and an optically active component D) and optionally a polymerizable component P) comprising one or more polymerizable compounds; and to the use of the polymerizable compounds and LC media for optical, electro-optical and electronic purposes, in particular in LC displays, especially in LC displays of the polymer sustained alignment type.

Abstract: A multi-stop time-to-digital converter (TDC, 110) includes single-stop TDCs (326, 510) connected to output nodes of a ring oscillator (504). Other features and embodiments are also provided.

Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents have less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.

Abstract: A manufacturing method of a package structure including the following steps is provided. A plurality of first conductive connectors and a second conductive connector on an active surface of a die are formed. The first conductive connectors are electrically connected to the die. The second conductive connector is formed aside the first conductive connectors and electrically insulated to the die. A redistribution layer is formed on the die. The redistribution layer is electrically connected to the first conductive connectors and the second conductive connector. A conductive shield is formed on the redistribution layer to surround the second conductive connector and at least a portion of a sidewall of the die coupled the active surface. The die is electrically insulated from the conductive shield. Another manufacturing method of a package structure is also provided.

Abstract: The present disclosure provides an FET structure including a transistor of a first conductive type. The transistor includes a substrate having a region of a second conductive type, a channel between source and drain, and a gate over the channel. The channel includes dopants of the first conductive type. The gate includes a work function setting layer of the second conductive type. The present disclosure also provides a method for manufacturing an FET with multi-threshold voltages scheme. The method includes exposing channels of a first transistor of a first conductive type and a first transistor of a second conductive type from a first mask, doping the channels with dopants of the first conductive type, exposing channels of a second transistor of the first conductive type and a second conductive type from a second mask, and doping the channels with dopants of the second conductive type.

Abstract: A manufacturing method of a package structure including the following steps is provided. A plurality of first conductive connectors and a second conductive connector on an active surface of a die are formed. The first conductive connectors are electrically connected to the die. The second conductive connector is formed aside the first conductive connectors and electrically insulated to the die. A redistribution layer is formed on the die. The redistribution layer is electrically connected to the first conductive connectors and the second conductive connector. A conductive shield is formed on the redistribution layer to surround the second conductive connector and at least a portion of a sidewall of the die coupled the active surface. The die is electrically insulated from the conductive shield. Another manufacturing method of a package structure is also provided.

Abstract: A package structure including a die, a plurality of first conductive connectors, a second conductive connector electrically insulated from the die, a redistribution layer and a conductive shield is provided. The die includes an active surface, a back surface opposite the active surface, and a sidewall coupling the active surface to the back surface. The first conductive connectors are disposed on the active surface of the die and electrically connected to the die. The second conductive connector is disposed on the die and aside the first conductive connectors. The redistribution layer is disposed on the die and electrically connected to the first conductive connectors and the second conductive connector. The conductive shield coupled to the redistribution layer surrounds the second conductive connector and at least a portion of the sidewall. The die is electrically insulated to the conductive shield. A chip package structure is also provided.

Abstract: Analyzing textual data is disclosed, including by: receiving textual data; determining that the textual data is a candidate for analogy analysis based at least in part on at least a portion of the textual data matching an analogical question template; extracting a source substantive from the textual data; using the source substantive to determine a target substantive from a word vector model that is trained on a set of training data; and generating an answer including the target substantive based at least in part on an analogical answer template corresponding to the analogical question template.

Abstract: The present invention relates to a system data abbreviation system and method. The system data abbreviation system includes a data mapping unit configured to classify system data, provided by an external database, into classes of a database of an internal application program and to then map the classified system data; a data search unit configured to search for data of the class to be abbreviated from the database of the application program; and a data abbreviation unit configured to group the found data of the class, to set link relations between data that belongs to the group, to set link relations between the group and the classes of the database of the application program, and to then abbreviate the data.

Abstract: Disclosed in a stand-alone micro-grid autonomous control system including: at least one battery system directly changing a reference frequency thereof according to a charge amount, and providing power having the changed reference frequency; at least one power generator measuring the reference frequency from the power provided form the at least one battery system, and starting generating power or stopping generating power based on the measured reference frequency; and at least one load measuring the reference frequency from the power provided from the battery system, and performing a synchronization operation or a synchronization releasing operation based on the measured reference frequency.

Abstract: A weighting value is determined for each of a plurality of decision trees in a random forest model hosted on a particular device, where the weighting is based on entropy of the respective decision tree. A new decision tree is received at the particular device and a weighting value is determined for the new decision tree based on entropy of the new decision tree. Based on the determined weighting value, it is determined whether to add the new the decision tree to the random forest model. A classification for data generated at the particular device is predicted using the random forest model.