Patents by Inventor Min Liang

Min Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10957672
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, a second encapsulant, and a plurality of conductive terminals. The first encapsulant is at least disposed between the first die and the second die, and on the second die. The second encapsulant is aside the first die and the second die. The conductive terminals are electrically connected to the first die and the second die through a redistribution layer (RDL) structure. An interface is existed between the first encapsulant and the second encapsulant.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: March 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Chien-Hsun Lee, Kuan-Lin Ho, Yu-Min Liang
  • Publication number: 20210073489
    Abstract: The present disclosure provides a commodity positioning method and apparatus, a device and a storage medium. The method comprises: acquiring map information marked with multiple pieces of shelf identity information, wherein the multiple pieces of shelf identity information are in one-to-one correspondence with shelves; acquiring shelf image information corresponding to the shelf identity information; identifying, according to the shelf image information, a commodity corresponding to each of electronic price label apparatuses on a corresponding shelf and a first positional relationship between each of the electronic price label apparatuses and the corresponding shelf; generating location information of each of the commodities according to the first positional relationship and the map information.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 11, 2021
    Inventors: Shiguo Hou, Min Liang, Jun Chen, Qi Jiang, Yang Zhao
  • Publication number: 20210058934
    Abstract: The present disclosure discloses a method for allocating resources and related device, system and storage medium. The method comprises: acquiring a first information set, wherein the first information set comprises energy information monitored by any one of base stations in a base station group to be allocated with resources and wirelessly broadcast by other base stations in the base station group on a predetermined first wireless channel resource; determining a distance relationship between the base stations in the base station group based on the energy information; and allocating a corresponding second wireless channel resource to each of the base stations in the base station group based on the distance relationship, wherein the second wireless channel resource is configured for the base station to establish communication with at least one electronic label associated therewith.
    Type: Application
    Filed: September 23, 2020
    Publication date: February 25, 2021
    Inventors: Qi JIANG, Min LIANG, Jun CHEN, Shiguo HOU
  • Publication number: 20210035593
    Abstract: A method and a device of sustainably updating a coefficient vector of a finite impulse response FIRfilter. The method includes obtaining (21) a time-varying regularization factor used for iteratively updating the coefficient vector of the FIR filter in a case that the coefficient vector of the FIR filter is used for processing a preset signal; updating (22) the coefficient vector of the FIR filter according to the time-varying regularization factor.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 4, 2021
    Inventor: Min LIANG
  • Patent number: 10903918
    Abstract: A cognitive HF radio is disclosed having a cognitive engine that optimizes HF transmission parameters on the basis of learned experience with previous transmission under varying transmission and environmental conditions. Additionally, electrically small HF antennas optionally using non-Foster matching elements are disclosed. Furthermore, another electrically small HF antenna and associated impedance matching networks are disclosed, including an impedance matching network using non-Foster matching elements.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: January 26, 2021
    Assignee: Arizona Board of Regents on Behalf of the University of Arizona
    Inventors: Tamal Bose, Hao Xin, Michael Marefat, Hamed Asadi, Ahmed Abdelrahman, Min Liang
  • Publication number: 20210020606
    Abstract: A method of manufacturing a semiconductor structure includes providing a substrate including a redistribution layer (RDL) disposed over the substrate, disposing a first patterned mask over the RDL, disposing a first conductive material over the RDL exposed from the first patterned mask to form a first conductive pillar, removing the first patterned mask, disposing a second patterned mask over the RDL, disposing a second conductive material over the RDL exposed from the second patterned mask to form a second conductive pillar, removing the second patterned mask, disposing a first die over the first conductive pillar, and disposing a second die over the second conductive pillar. A height of the second conductive pillar is substantially greater than a height of the first conductive pillar.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 21, 2021
    Inventors: CHI-YANG YU, KUAN-LIN HO, CHIN-LIANG CHEN, YU-MIN LIANG
  • Publication number: 20200411029
    Abstract: A method and a device for updating a coefficient vector of a finite impulse response filter are provided. The update method includes: obtaining an updated step-size diagonal matrix for a coefficient vector of the FIR filter; and obtaining an updated coefficient vector of the FIR filter based on the updated step-size diagonal matrix.
    Type: Application
    Filed: February 27, 2019
    Publication date: December 31, 2020
    Applicant: CHINA ACADEMY OF TELECOMMUNICATIONS TECHNOLOGY
    Inventors: Xuan ZHOU, Min LIANG
  • Publication number: 20200397712
    Abstract: Novel siRNA and shRNA nanocapsules and delivery methods are disclosed herein. These siRNA and shRNA nanocapsules and delivery methods are highly robust and effective. This invention provides a platform for RNAi delivery with low toxicity and long intracellular half-life for practical therapeutic applications.
    Type: Application
    Filed: February 24, 2020
    Publication date: December 24, 2020
    Inventors: Yunfeng LU, Irvin S.Y. CHEN, Ming YAN, Min LIANG, Masakazu KAMATA, Jing WEN
  • Patent number: 10867947
    Abstract: Semiconductor packages and methods of forming the same are disclosed. One of the semiconductor packages includes a circuit board structure, a first redistribution layer structure, a plurality of first bonding elements, a package structure and a plurality of second bonding elements. The first redistribution layer structure is disposed over and electrically connected to the circuit board structure. The first bonding elements are disposed between and electrically connected to the first redistribution layer structure and the circuit board structure. The package structure is disposed over and electrically connected to the first redistribution layer structure. The second bonding elements are disposed between and electrically connected to the first redistribution layer structure and the package structure.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Yi Wu, Chen-Hua Yu, Yu-Min Liang
  • Patent number: 10845965
    Abstract: Known computer peripheral devices are typically interchangeable and can be used with different computers systems and platforms. Most computer operating systems are able to automatically configure the coupled computer peripheral device for use with the computer operating system without the need for installation of a specific driver. However, when these peripheral devices are detected by the computer system, a generic UI control configuration is often assigned to them and whatever customised settings previously configured by the user will be lost and replaced with a new set of unfamiliar settings. The present technology is a collaboration management system initiating a collaboration session for a plurality of computing systems having user-interfaces (UIs) coupled thereto.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: November 24, 2020
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventors: Min-Liang Tan, Ping He
  • Publication number: 20200328173
    Abstract: An integrated fan-out package includes a die, an encapsulant, a seed layer, a conductive pillar, a redistribution structure, and a buffer layer. The encapsulant encapsulates the die. The seed layer and the conductive pillar are sequentially stacked over the die and the encapsulant. The redistribution structure is over the die and the encapsulant. The redistribution structure includes a conductive pattern and a dielectric layer. The conductive pattern is directly in contact with the seed layer and the dielectric layer covers the conductive pattern and surrounds the seed layer and the conductive pillar. The buffer layer is disposed over the redistribution structure. The seed layer is separate from the dielectric layer by the buffer layer, and a Young's modulus of the buffer layer is higher than a Young's modulus of the dielectric layer of the redistribution structure.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 15, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Hai-Ming Chen, Kuan-Lin Ho, Yu-Min Liang
  • Patent number: 10804192
    Abstract: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: October 13, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Min Liang, Jiun Yi Wu
  • Patent number: 10804245
    Abstract: A method of manufacturing a semiconductor structure includes providing a substrate including a redistribution layer (RDL) disposed over the substrate, disposing a first patterned mask over the RDL, disposing a first conductive material over the RDL exposed from the first patterned mask to form a first conductive pillar, removing the first patterned mask, disposing a second patterned mask over the RDL, disposing a second conductive material over the RDL exposed from the second patterned mask to form a second conductive pillar, removing the second patterned mask, disposing a first die over the first conductive pillar, and disposing a second die over the second conductive pillar. A height of the second conductive pillar is substantially greater than a height of the first conductive pillar.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chi-Yang Yu, Kuan-Lin Ho, Chin-Liang Chen, Yu-Min Liang
  • Patent number: 10792122
    Abstract: The invention discloses an object developing and calibrating method in a surgical environment. The method mainly includes the steps of: using at least one infrared LED (IR-LED) and at least one infrared sensor (IR-Sensor) on a surgical eyeglass, to have a surgical environment image; and retaining image signals within a first wavelength range and removing image signals not in the first wavelength range in the surgical environment image. The method helps the surgeon see only the object images on the surgical eyeglass without the interference of non-surgical environmental imaging noises.
    Type: Grant
    Filed: December 23, 2018
    Date of Patent: October 6, 2020
    Assignee: TAIWAN MAIN ORTHOPAEDIC BIOTECHNOLOGY CO., LTD.
    Inventor: Min-Liang Wang
  • Patent number: 10790210
    Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a die, a dummy cube, a stress relaxation layer, an encapsulant and a redistribution structure. The dummy cube is disposed beside the die. The stress relaxation layer covers a top surface of the dummy cube. The encapsulant encapsulates the die and the dummy cube. The redistribution structure is disposed over the encapsulant and is electrically connected to the die. The stress relaxation layer is interposed between the dummy cube and the redistribution structure.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Yang Yu, Chien-Hsun Lee, Yu-Min Liang
  • Publication number: 20200279790
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor die, a second semiconductor die, a molding compound, a heat dissipation module and an adhesive material. The first and second semiconductor dies are different types of dies and are disposed side by side. The molding compound encloses the first and second semiconductor dies. The heat dissipation module is located directly on and in contact with the back sides of the first and second semiconductor dies. The adhesive material is filled and contacted between the heat dissipation module and the molding compound. The semiconductor package has a central region and a peripheral region surrounding the central region. The first and second semiconductor dies are located within the central region. A sidewall of the heat dissipation module, a sidewall of the adhesive material and a sidewall of the molding compound are substantially coplanar.
    Type: Application
    Filed: May 14, 2020
    Publication date: September 3, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Yang Yu, Chin-Liang Chen, Kuan-Lin Ho, Yu-Min Liang, Wen-Lin Chen
  • Patent number: 10747266
    Abstract: According to various embodiments, a dock may be provided. The dock may include: a first attachment member configured to attach to an external item; a second attachment member configured to receive a computing device; and a scroll wheel configured to provide user input to the computing device.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 18, 2020
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventors: Sreenath Unnikrishnan, Min-Liang Tan, Chee Oei Chan, Jian Yao Lien, Jeffrey Chee Cheng Liang, Greg Breinholt, Boon Sim Chong, Kah Yong Lee, Sze Khiang Rex Kwek
  • Patent number: 10719141
    Abstract: A mouse for communication with a processor-based device. The mouse may include a housing having a base surface. The base surface may be configured to face a tracking surface on which the mouse may be placed on. The mouse may further include a plurality of mouse foot protrusions projecting from the base surface. A distal end of at least one of the plurality of mouse foot protrusions may be configured to contact the tracking surface on which the mouse may be placed on and the distal end may include a first color. An intermediate portion of the at least one of the plurality of mouse foot protrusions between the distal end of the at least one of the plurality of mouse foot protrusions and the base surface may include a second color, which may be different from the first color.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: July 21, 2020
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventors: Min-Liang Tan, Sreenath Unnikrishnan
  • Publication number: 20200221069
    Abstract: A stereoscopic visualization system using shape from shading algorithm is an image conversion device connected between a monoscopic endoscope and a 3D monitor. The system applies the algorithm which generates a depth map for a 2D image of video frames. The algorithm first calculates a direction of a light source for the 2D image. Based upon the information of light distribution and shading for the 2D image, the depth map is generated. The depth map is used to calculate another view of the original 2D image by depth image based rendering algorithm in generation of stereoscopic images. After the new view is rendered, the stereoscopic visualization system also needs to convert the display format of the stereoscopic images for different kinds of 3D displays. Based on this method, it can replace the whole monoscopic endoscope with a stereo-endoscope system and no modification is required for the monoscopic endoscope.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Inventors: Yen-Yu WANG, Kai-Che LIU, Atul KUMAR, Min-Liang WANG
  • Publication number: 20200219788
    Abstract: A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.
    Type: Application
    Filed: March 17, 2020
    Publication date: July 9, 2020
    Inventors: CHIN-LIANG CHEN, CHI-YANG YU, KUAN-LIN HO, YU-MIN LIANG