Patents by Inventor Min Lin

Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230193306
    Abstract: The present disclosure discloses an artificial combined rhizosphere nitrogen fixation system, including a recombinant nitrogen-fixing engineering bacterium that is transformed with genes for encoding a nitrogen fixation activator Neb and an ammonium transporter amtR, and a recombinant plant that is transformed with a gene for encoding an ammonium-affiliated protein Ham. The coupling of the functions of the above two is achieved through a seed-coated inoculation at a rhizosphere of a crop.
    Type: Application
    Filed: July 6, 2020
    Publication date: June 22, 2023
    Applicant: BEIJING GREENBIO-TECH CO., LTD
    Inventors: Xiubin KE, Min LIN, Yongliang YAN, Yuhua ZHAN, Wei LU
  • Publication number: 20230197680
    Abstract: An integrated antenna package structure includes a first redistribution structure, a first chip, a heat dissipation structure, a second chip, and an antenna structure. The first chip is located on a first side of the first redistribution structure, and is electrically connected to the first redistribution structure. The heat dissipation structure is thermally connected to the first chip, and the first chip is located between the heat dissipation structure and the first redistribution structure. The second chip is located on a second side of the first redistribution structure opposite to the first side, and is electrically connected to the first redistribution structure. The antenna structure is electrically connected to the first redistribution structure.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 22, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Po-Kai Chiu, Sheng-Tsai Wu, Yu-Min Lin, Wen-Hung Liu, Ang-Ying Lin, Chang-Sheng Chen
  • Publication number: 20230198250
    Abstract: An electrostatic discharge (ESD) protection circuit including a detection circuit, a voltage-divider element, and a discharge element is provided. The detection circuit is coupled between a first power line and a second power line. In response to an ESD event, the detection circuit enables a turn-on signal. The voltage-divider element is coupled between the first power line and a third power line and receives the turn-on signal. The discharge element is coupled between the second and third power lines. In response to the turn-on signal being enabled, the first discharge element discharges an ESD current.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Ning JOU, Chieh-Yao CHUANG, Hsien-Feng LIAO, Ting-Yu CHANG, Chih-Hsuan LIN, Chang-Min LIN, Shao-Chang HUANG, Ching-Ho LI
  • Patent number: 11683447
    Abstract: Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for providing side conversations within a virtual conferencing system. The program and method provide, in association with a virtual conference among plural participants, a first audio channel for sharing among the plural participants; provide, for each of the plural participants, display of a participant video element which corresponds to the participant and which includes a user-selectable button to initiate a side conversation with the participant; receive indication of a user selection, by a first participant, of the user-selectable button for initiating a side conversation with a second participant of the plural participants; and provide a second audio channel from a first device associated with the first participant to a second device associated with the second participant, in conjunction with providing the first audio channel to the second device.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: June 20, 2023
    Assignee: Snap Inc.
    Inventors: Andrew Cheng-min Lin, Walton Lin
  • Patent number: 11683192
    Abstract: Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for updating element properties based on distances between elements in a virtual conference. The program and method provide, in association with designing a room, an interface for specifying how a first element in the room affects at least one property value of a second element, based on distance between the two elements; receive user selection of parameter values specifying how the first element affects the at least one property value of the second element based on the distance; provide a virtual conference between plural participants within the room including the first and second elements; update the at least one property value of the second element based on a change in distance between the first and second elements, and on the parameter values; and provide for updated display of the second element.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: June 20, 2023
    Assignee: Snap Inc.
    Inventors: Emily Cho, Andrew Cheng-min Lin, Walton Lin
  • Patent number: 11683060
    Abstract: A radio frequency circuit with font routing to replace a resistor includes a routing layer and a ground layer. The routing layer includes a first pad, a second pad and a font routing unit. The second pad is corresponding to the first pad. The font routing unit is connected between the first pad and the second pad, and has a trace width. The trace width is less than a 50 ohm trace width. The ground layer is disposed below the routing layer and is separated from the routing layer by a height. The font routing unit has a second equivalent impedance at the radio frequency, the second equivalent impedance is determined according to the trace width, the height and the radio frequency, and the second equivalent impedance is the same or similar to a first equivalent impedance.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: June 20, 2023
    Assignee: USI Science and Technology (Shenzhen) Co., Ltd.
    Inventors: Wen-Shuo Liu, Ji-Min Lin, Syuan-Ci Lin, Yu-An Hsieh
  • Publication number: 20230187409
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes a redistribution circuit structure; a first semiconductor chip disposed on the redistribution structure and having a first active surface on which a first conductive post is disposed; a second semiconductor chip disposed above the first semiconductor chip and having a second active surface on which a first conductor is disposed; and a first encapsulant disposed on the redistribution circuit structure and encapsulating at least the first semiconductor chip, wherein the first conductive post and the first conductor are aligned and bonded to each other to electrically connect the first semiconductor chip and the second semiconductor chip.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 15, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Ang-Ying Lin, Sheng-Tsai Wu, Chao-Jung Chen, Tzu-Hsuan Ni, Shin-Yi Huang, Yuan-Yin Lo
  • Publication number: 20230189435
    Abstract: A circuit board and an electronic package using the same are provided. The circuit board includes a rigid board body, at least one bendable extension portion, connecting members, and shielding members. The rigid board body includes conductive layers and dielectric layers therebetween. The extension portion is connected to a side of the rigid board body and formed by layers of the conductive layers and at least one layer of the dielectric layers extending outside the rigid board body. The connecting members are arranged on a connecting end of the extension portion and electrically connected to a signal layer of the conductive layers. The shielding members are arranged around the corresponding connecting members and electrically connected to a ground layer of the conductive layers. The connecting members and the shielding members protrude from the connecting end. A height of the shielding members is lower than a height of the connecting members.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 15, 2023
    Applicants: First Hi-tec Enterprise Co.,Ltd., NEXCOM International Co., Ltd., Industrial Technology Research Institute
    Inventors: Min-Lin Lee, Sheng-Che Hung, Ching-Shan Chang, Ying-Tsuen Liou
  • Publication number: 20230186222
    Abstract: The present utility model discloses a production defect and abnormality report and track record retrieval system for the textile industry, which is made up of a textile machine, an information appliance, a server host, and a production track record retrieval platform in the server host can collect, store, integrate, and submit the data in real time, so that the production track record of finished textile products can be retrieved through the production track record retrieval platform, and through the production track record retrieval platform, the user can review the whole production history and defect analysis remotely. Therefore, the production defect and abnormality report and track record retrieval system for the textile industry can significantly enhance work efficiency, reduce defect rate, and enables quick retrieval and transparency of the production track record.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 15, 2023
    Applicant: TUNTEX INCORPORATION
    Inventor: I-MIN LIN
  • Publication number: 20230178466
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a redistribution structure, conductive joints, conductive terminals, a circuit substrate, and an insulating encapsulation. The redistribution structure includes a first side and a second side opposite to the first side, wherein trenches are located on the second side of the redistribution structure and extend to an edge of the second side of the redistribution structure. The conductive joints are disposed over the first side of the redistribution structure. The conductive terminals are disposed over the second side of the redistribution structure. The circuit substrate electrically coupled to the redistribution structure through the conductive joints. The insulating encapsulation is disposed on the first side of the redistribution structure to cover the circuit substrate.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Pei-Rong Ni, Chia-Min Lin, Yu-Min Liang, Jiun-Yi Wu
  • Publication number: 20230170279
    Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 1, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Heng-Chieh Chien, Shu-Jung Yang, Yu-Min Lin, Chih-Yao Wang, Yu-Lin Chao
  • Patent number: 11663101
    Abstract: A semiconductor device includes a debug port, a first access port, a second access port, a first processing unit, a second processing unit, and an embedded emulator unit. The first access port is coupled to the debug port. The second access port is coupled to the debug port. The first processing unit is coupled to the first access port. The second processing unit is coupled to the second access port. The embedded emulator unit is coupled to the debug port, the first processing unit and the second processing unit. The first processing unit generates a debug instruction to access the embedded emulator unit, so that the embedded emulator unit generates a debug signal. The debug signal is output to the second processing unit through the debug port and the second access port, so as to perform a debug operation on the second processing unit.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: May 30, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Zong-Min Lin
  • Publication number: 20230153118
    Abstract: A booting method is provided, applied to a computer system. The computer system includes a transmission interface, a power key, and a trigger element. The transmission interface includes a transmission specification and is electrically connected to a graphics card, and the power key is used for driving the computer system to perform a booting procedure. The booting method includes: detecting, in the booting procedure, whether the trigger element is triggered or not; and lowering the transmission specification and restarting the computer system when the trigger element is triggered. A computer system adopting the booting method is further provided.
    Type: Application
    Filed: June 17, 2022
    Publication date: May 18, 2023
    Inventors: Yu GU, Hung-Hsuan CHEN, Bing-Min LIN
  • Publication number: 20230146217
    Abstract: A multifunctional physical store system with automatic sterilization and disinfection functions includes a central process device, and a disinfection device, an order device, a sterilization device, and a serve device that are coupled with the central process device. The system is applied to a physical store. The disinfection device is applied for carrying out the disinfection operation on the environment of the physical store. The sterilization device is applied for carryout surface sterilization on the people entering the store. The order device and the serve device are applied for people to order and acquire meals. Therefore, the application of various devices facilitates a nearly dust-free and sterile environment in the store, lowering the possibility of virus or bacterial infection between people in the operation area and the customers.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 11, 2023
    Inventors: KUO-LIANG CHEN, KAE-KUEN HU, TAI-LUNG CHANG, MAO-AN CHU, PEI-HSUAN CHEN, NIEN-TZU HUANG, YUN-HSIN CHEN, YU-SHAN KE, CAI-TING SONG, CHI-YU KI, BO-MIN LIN
  • Publication number: 20230140865
    Abstract: An image processing method and an image processing apparatus are provided. In the method, first encoding is performed on an input image, to output a first noisy image. De-noising is performed on the first noisy image, to output a first de-noised image. De-noising is performed on the input image according to the first de-noised image, to output a first image.
    Type: Application
    Filed: November 1, 2022
    Publication date: May 11, 2023
    Applicant: GENESYS LOGIC, INC.
    Inventors: Jin-Min Lin, Wei-Zheng Pan, Chuan-Yue Yang
  • Patent number: 11647160
    Abstract: Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for configuring participant video feeds within a virtual conferencing system. The program and method provide, in association with designing a room for virtual conferencing, an interface for configuring plural participant video elements which are assignable to respective participant video feeds; receive, via the interface, an indication of user input for setting properties for the plural participant video elements; provide, in association with virtual conferencing between plural participants, display of the room based on the properties for the plural participant video elements; and assign, for each of the plural participants, a participant video feed corresponding to the participant with a respective participant video element of the plural participant video elements.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: May 9, 2023
    Assignee: Snap Inc.
    Inventors: Andrew Cheng-min Lin, Walton Lin
  • Patent number: 11647159
    Abstract: Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for providing side conversations within a virtual conferencing system. The program and method provide, in association with a virtual conference among plural participants, a first audio channel for sharing among the plural participants; provide, for each of the plural participants, display of a participant video element which corresponds to the participant and which includes a user-selectable button to initiate a side conversation with the participant; receive indication of a user selection, by a first participant, of the user-selectable button for initiating a side conversation with a second participant of the plural participants; and provide a second audio channel from a first device associated with the first participant to a second device associated with the second participant, in conjunction with providing the first audio channel to the second device.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: May 9, 2023
    Assignee: Snap Inc.
    Inventors: Andrew Cheng-min Lin, Walton Lin
  • Patent number: 11646270
    Abstract: A multi-chip package and a manufacturing method thereof are provided. The multi-chip package includes: an interposer including a wiring structure and an interposer via electrically connected to the wiring structure; a plurality of semiconductor chips located on a first surface of the interposer and electrically connected to each other through the interposer; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface, wherein the plurality of semiconductor chips are electrically connected to the redistribution circuit structure through at least the interposer.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: May 9, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Ang-Ying Lin, Yu-Min Lin, Shin-Yi Huang, Sheng-Tsai Wu, Yuan-Yin Lo, Tzu-Hsuan Ni, Chao-Jung Chen
  • Publication number: 20230126592
    Abstract: A radio frequency circuit with font routing to replace a resistor includes a routing layer and a ground layer. The routing layer includes a first pad, a second pad and a font routing unit. The second pad is corresponding to the first pad. The font routing unit is connected between the first pad and the second pad, and has a trace width. The trace width is less than a 50 ohm trace width. The ground layer is disposed below the routing layer and is separated from the routing layer by a height. The font routing unit has a second equivalent impedance at the radio frequency, the second equivalent impedance is determined according to the trace width, the height and the radio frequency, and the second equivalent impedance is the same or similar to a first equivalent impedance.
    Type: Application
    Filed: January 25, 2022
    Publication date: April 27, 2023
    Inventors: WEN-SHUO LIU, Ji-Min Lin, Syuan-CI Lin, Yu-An Hsieh
  • Publication number: 20230131944
    Abstract: The application discloses a method, for building an oscillator frequency adjustment lookup table in a transceiver, wherein the transceiver generates a clock according to a crystal oscillator external to the transceiver for transceiving data. The transceiver includes adjustable capacitor arrays assembly connected to the crystal oscillator, wherein when an equivalent capacitance of the adjustable capacitor assembly is a reference value, the crystal oscillator has a reference frequency, and when the equivalent capacitance changes relative to the reference value, the crystal oscillator correspondingly has a frequency offset relative to the reference frequency. The method includes: performing an interpolation operation according to a first value, a second value, and a third value of the equivalent capacitance, and the corresponding frequency variations, so as to obtain the frequency variations corresponding to a first sub-value between the first value and the second values.
    Type: Application
    Filed: May 12, 2022
    Publication date: April 27, 2023
    Inventors: HUNG MIN LIN, HUNG-YUAN YANG