Abstract: A semiconductor circuit includes a first circuit and a second circuit. The first circuit is configured to generate a voltage level at a first node based on a voltage level of input data, an inverted value of the voltage level at the first node, a voltage level of a clock signal, and a voltage level at a second node; and the second circuit is configured to generate the voltage level at the second node based on the voltage level of input data, an inverted value of the voltage level at the second node, the voltage level of the clock signal, and the inverted value of the voltage level at the first node. When the clock signal is at a first level, the first and second nodes have different logical levels. When the clock signal is at a second level, the first and second nodes have the same logical level.

Abstract: A semiconductor circuit includes a first logic gate that receives inputs of a first input signal, a clock signal and a feedback signal and performs a first logical operation to output a first output signal. A second logic gate that receives inputs of the first output signal of the first logic gate, the clock signal, and an inverted output signal of the first input signal and performs a second logical operation to output the feedback signal.

Abstract: A lighting system includes a digital addressable lighting interface (DALI) master controller, a lighting driver, and a signal converter. The DALI master controller is connected to a management server. The lighting driver operates a lighting device including a light emitting diode (LED). The signal converter is connected to the DALI master controller by a DALI bus operating according to a DALI communication protocol, and is communicatively connected to the lighting driver via a wireless communication connection operating according to a wireless communication protocol. The signal converter inter-converts a signal transmitted and received from the DALI master controller according to the DALI communication protocol and a signal transmitted to and received from the lighting driver according to the wireless communication protocol so as to enable communication between the lighting driver and the DALI master controller.

Abstract: In a luminescent diode and a method for manufacturing the same, a planar buried heterostructure (PBH) and a ridge waveguide structure are combined, so that the luminescent diode can be operated to generate a high output of 100 mW or more at low current. Further, it is possible to reduce electro-optic loss. In addition, the luminescent diode is applied to a wavelength tunable external cavity laser, so that it is possible to provide an external cavity laser having excellent output characteristics.

Abstract: The chip bonding apparatus used in a chip bonding method includes a heating unit for heating an anisotropic conductive film at a first temperature; an attachment unit for attaching an integrated circuit chip to the anisotropic conductive film; a stage on which a substrate is seated; a chip transport unit for moving and aligning the integrated circuit chip that is attached to the anisotropic conductive film on the substrate; and a bonding head arranged above the stage to bond the integrated circuit chip that is attached to the anisotropic conductive film onto the substrate through thermo-compression of the integrated circuit chip onto the substrate at a second temperature that is lower than the first temperature.

Abstract: Provided is a pouch type case, which includes a pouch type body part including an inner space for accommodating an electrode assembly, and an injection part extending from the body part to guide electrolyte into the inner space. The injection part is corrugated in a zigzag shape.

Abstract: An environment-friendly adhesive composition is provided that includes about 10 to about 70 parts by weight of a tackifying agent base including an acryl-based attaching agent as a raw material, about 5 to about 40 parts by weight of a terpene-based tackiness improver, about 0.5 to about 5 parts by weight of an epoxy-based crosslinking agent, about 5 to about 60 parts by weight of a flame retardant, and a combination thereof, based on 100 parts by weight of a solvent excluding benzene, toluene and xylene (BTX). The flame retardant includes at least one selected from a group consisting of a halogen-based flame retardant, an antimony flame retardant, and a phosphorus-based flame retardant. The adhesive composition and a tape manufactured using the same may be used exclusively in a vehicle industry, and in various electronic industries.

Abstract: A multi-bit flip-flop includes a plurality of multi-bit flip-flop blocks that share a clock signal. Each of the multi-bit flip-flop blocks includes a single inverter and a plurality of flip-flops. The single inverter generates an inverted clock signal by inverting the clock signal. Each of the flip-flops includes a master latch part and a slave latch part and operates the master latch part and the slave latch part based on the clock signal and the inverted clock signal. Here, the flip-flops are triggered at rising edges of the clock signal. Thus, the multi-bit flip-flop operating as a master-slave flip-flop may minimize (or, reduce) power consumption occurring in a clock path through which the clock signal is transmitted.

Abstract: An integrated circuit and an electronic apparatus including the same. The electronic apparatus includes a scan input processing circuit, a selection circuit and a scanning circuit. The scan input processing unit is configured to output one of a scan input and a first logical value in response to a scan enable signal. The selection unit is configured to select one of an output of the scan input processing unit or a data input in response to the scan enable signal. The scan element comprises a flip-flop configured to store an output of the selection unit.

Abstract: Provided are a semiconductor device and a method for operating a semiconductor device. The semiconductor device includes a clock generating unit receiving a reference clock and generating first and second clocks that are different from each other from the reference clock; a first latch configured to receive input data based on the first clock and to output the input data as first output data; and a second latch configured to receive the first output data based on the second clock and to output the first output data as second output data, wherein a first edge of the first clock does not overlap a first edge of the second clock, and at least a part of a second edge of the first clock overlaps a second edge of the second clock.

Abstract: Provided is a semiconductor circuit which includes a first circuit configured to determine a voltage level of a feedback node based on a voltage level of input data, a voltage level of a latch input node, and a voltage level of a clock signal, a second circuit configured to pre-charge the latch input node based on the voltage level of the clock signal, a third circuit configured to pull down the latch input node based on the voltage level of the feedback node and the voltage level of the clock signal, a latch configured to output output data based on the voltage level of the clock signal and the voltage level of the latch input node, and a control circuit included in at least one of the first to third circuits and the latch and configured to receive the control signal.

Abstract: A semiconductor device includes a first power rail, a second power rail, at least one standard cell and at least one power bridge. The first power rail extends in a first direction over a substrate. The second power rail extends in the first direction over the substrate, and the second power rail is spaced apart from the first power rail in a second direction that intersects the first direction. The at least one standard cell receives a first voltage from the first and the second power rails. The at least one power bridge connects the first power rail and the second power rail in the second direction. The first power rail and the second power rail are formed in a first metal layer and the least one power bridge is formed in a bottom metal layer that is under the first metal layer.

Abstract: A presence service providing system and method is disclosed that provides presence information regarding presentities to watchers. The presence system sets mapping information, which contains the presence information that matches position information corresponding to at least one presentity. When the position information is received via a positioning system, the presence system detects the presence information, which matches the received position information, from the set mapping information. The detected presence information is transmitted from the presence system to a watcher. The presence service providing system can provide a variety of presence information according to the location of the presentity, so that watchers can more specifically and clearly identify the states of the presentity from the presence information.

Abstract: A voltage generator that includes an operation mode determination circuit suitable for determining an active mode or a standby mode based on a chip enable signal to activate an active mode signal or a standby mode signal according to a result of the determination; and a bulk voltage generation circuit outputting a bulk voltage having an internal power voltage when the active mode signal is activated, and outputting the bulk voltage having an external power voltage when the standby mode signal is activated.

Abstract: An example embodiment discloses a flip-flop including a first inverter configured to invert first data, first and second transistors connected to each other in series and configured to receive the inverted first data and a first clock, respectively, a third transistor and a first gate configured to perform a logic operation on the first data and the first clock, the third transistor configured to receive an output of the logic operation. The second transistor and the third transistor are connected to a first node.

Abstract: The present invention relates to an air micrometer. The air micrometer includes a target object accommodation slot having a bottom surface and a ceiling surface to accommodate at least one portion of the target object between the bottom surface and the ceiling surface, and an air spray unit including a nozzle opened in the bottom surface or the ceiling surface to spray the air onto the target object that is accommodated between the bottom surface and the ceiling surface.

Abstract: Provided are semiconductor circuits. A semiconductor circuit includes: a first circuit configured to propagate a value of a first node to a second node based on a voltage level of a clock signal; a second circuit configured to propagate a value of the second node to a third node based on the voltage level of the clock signal; and a third circuit configured to determine a value of the third node based on a voltage level of the second node and the voltage level of the clock signal, wherein the first circuit comprises a first transistor gated to a voltage level of the first node, a second transistor connected in series with the first transistor and gated to the voltage level of the third node, and a third transistor connected in parallel with the first and second transistors and gated to a voltage level of the clock signal to provide the value of the first node to the second node.

Abstract: Provided is a semiconductor circuit which includes a first circuit configured to determine a voltage level of a feedback node based on a voltage level of input data, a voltage level of a latch input node, and a voltage level of a clock signal, a second circuit configured to pre-charge the latch input node based on the voltage level of the clock signal, a third circuit configured to pull down the latch input node based on the voltage level of the feedback node and the voltage level of the clock signal, a latch configured to output output data based on the voltage level of the clock signal and the voltage level of the latch input node, and a control circuit included in at least one of the first to third circuits and the latch and configured to receive the control signal.

Abstract: A method of manufacturing a wheel guard may include injection-molding an adhesive layer, bonding an outer layer including a non-woven fabric and a sound-absorbing layer including thermoplastic resin with the adhesive layer in between, and forming the layers into a predetermined shape of the wheel guard, with the outer layer and the sound-absorbing layer bonded by the adhesive layer. The thickness of the outer layer may be 2 to 10 mm, the thickness of the adhesive layer may be 0.1 to 2 mm, and the thickness of the sound-absorbing layer may be 2 to 10 mm, before the bonding. A specific heat treatment layer may be formed on a non-adhesive side of the outer layer and may have an LM FIBER, a film, or a sheet.

Abstract: A multi-bit flip-flop includes a plurality of multi-bit flip-flop blocks that share a clock signal. Each of the multi-bit flip-flop blocks includes a single inverter and a plurality of flip-flops. The single inverter generates an inverted clock signal by inverting the clock signal. Each of the flip-flops includes a master latch part and a slave latch part and operates the master latch part and the slave latch part based on the clock signal and the inverted clock signal. Here, the flip-flops are triggered at rising edges of the clock signal. Thus, the multi-bit flip-flop operating as a master-slave flip-flop may minimize (or, reduce) power consumption occurring in a clock path through which the clock signal is transmitted.