Abstract: A flip-flop includes a first node charging circuit configured to charge a first node with inverted input data generated by inverting input data, a second node charging circuit configured to charge a second node with the input data, and first through eighth NMOS transistors. The flip-flop is configured to latch the input data at rising edges of a clock signal and output latched input data as output data. The flip-flop includes an internal circuit configured to charge a sixth node with inverted input data generated by inverting the latched input data.

Abstract: A liquid crystal display includes: a first insulating substrate, a second insulating substrate, a pixel electrode positioned on the first insulating substrate, a common electrode positioned on the first insulating substrate or the second insulating substrate, a first alignment layer positioned on the first insulating substrate, a second alignment layer positioned on the second insulating substrate, and a liquid crystal layer positioned between the first insulating substrate and the second insulating substrate. The first alignment layer and/or the second alignment layer include an additive and an alignment layer compound having a main chain, and a plurality of side chains connected to the main chain, and at least one of the plurality of side chains includes a vertical alignment group, and a reactive mesogen including two or more photoreactive groups.

Abstract: A polarizing member includes a base layer, a first reflection preventing layer and a second reflection preventing layer. A base layer polarizes light, generating polarized light. A first reflection preventing layer is disposed on the base layer, diffusing the polarized light and generating first diffused light. A second reflection is disposed on the first reflection preventing layer, diffusing the first diffused light and generating second diffused light.

Abstract: The present invention relates to a method of correcting a position of a stencil mask which comprises receiving fiducial information from a screen printer, extracting position information of a pad and position information of a solder formed on a board through measuring by a solder paste inspection apparatus, estimating an x, y offset value and a rotating amount of a stencil mask based on the fiducial information by using the position information of the pad and the solder, and transmitting the x,y offset value and the rotating amount of the stencil mask to the screen printer. Thus, a reliability of solder forming process may be increased by correcting a stencil mask position by transmitting a feedback of an x,y offset value and a rotating amount of the stencil mask from a solder paste inspection apparatus, in which the x,y offset value and the rotating amount are estimated based on fiducial information transmitted from the screen printer.

Abstract: A semiconductor integrated circuit includes a scan enable (SE) inverter and a clock (CK) inverter on a substrate, a first multiplex part, and a second multiplex part. The SE inverter and the CK inverter are aligned in a first direction. The first multiplex part includes a first wiring and a first transistor, the first wiring is connected to a power supply voltage part of the SE inverter, and the first wiring and the first transistor share a source region contacting the first wiring. The second multiplex part includes a second wiring and a second transistor, the second wiring is connected to a power supply voltage part of the CK inverter, and the second wiring and the second transistor share a source region contacting the second wiring. The SE inverter and the CK inverter are aligned in a first direction to each other.

Abstract: A flip-flop generates a first feedback signal using a signal generated inside the flip-flop. The flip-flop includes a first stage circuit, a second stage circuit and a third stage circuit. The first stage circuit receives a first data signal and a clock signal and generates a first internal signal through a first node. The second stage circuit receives the first internal signal, the clock signal, and the first feedback signal and generates a second internal signal through a second node. The third stage circuit generates a second data signal by latching the second internal signal when the clock signal is at a first level, using the second internal signal and the clock signal. The second stage circuit cuts off at least one first current path between the second node and a power supply, based on the first feedback signal, when the clock signal is at a second level.

Abstract: The present invention relates to an apparatus and a method for manufacturing a vehicle dash isolation pad. The method includes bonding a microfiber sound absorbing material to an adherend by using latent heat of a preheated adherend. As such, the vehicle dash isolation pad with improved weight reduction, sound absorption, and sound insulation effects can be obtained.

Abstract: A semiconductor circuit includes a first circuit and a second circuit. The first circuit determines a logic level of a second node and a logic level of a third node, on the basis of a logic level of input data, a logic level of a clock signal, and a logic level of a first node. The second circuit determines the logic level of the first node, on the basis of the logic level of the clock signal, the logic level of the second node and the logic level of the third node. The first circuit comprises a sub-circuit and a first transistor. The first circuit determines the logic level of the second node, on the basis of the logic level of the input data and the logic level of the first node. The first transistor is gated to the logic level of the clock signal to connect the third node with the second node.

Abstract: A gap-fill polymer for filling fine pattern gaps, which has a low dielectric constant (low-k) and excellent gap filling properties, may consist of a compound formed by condensation polymerization of a first oligomer represented by the formula 1 and a second oligomer represented by the formula 2.

Abstract: A multi-bit flip-flop includes a plurality of multi-bit flip-flop blocks that share a clock signal. Each of the multi-bit flip-flop blocks includes a single inverter and a plurality of flip-flops. The single inverter generates an inverted clock signal by inverting the clock signal. Each of the flip-flops includes a master latch part and a slave latch part and operates the master latch part and the slave latch part based on the clock signal and the inverted clock signal. Here, the flip-flops are triggered at rising edges of the clock signal. Thus, the multi-bit flip-flop operating as a master-slave flip-flop may minimize (or, reduce) power consumption occurring in a clock path through which the clock signal is transmitted.

Abstract: A current break circuit includes a current break control circuit suitable for sequentially outputting a first enable signal and a second enable signal with a time difference in response to at least one control signal, and a current break switch circuit suitable for outputting or blocking a second voltage in response to a first voltage, wherein the current break switch circuit forms a first current path in response to the first enable signal and a second current path in response to the second enable signal when blocking the second voltage.

Abstract: A gap-fill polymer for filling fine pattern gaps, which has a low dielectric constant (flow-k) and excellent gap filling properties may consist of a compound formed by condensation polymerization of a first oligomer represented by the formula 1 and a second oligomer represented by the formula 2.

Abstract: Provided are a pouch case of a battery and a secondary battery including the same. Specifically, the present invention relates to a pouch case of a battery, which is formed by stacking an internal resin layer, an intermediate resin layer, and an external resin layer, and a pouch-type secondary battery including the same.

Abstract: The present invention relates to a sealing tool for a pouch type secondary battery, which seals a pouch provided with an electrode assembly therein, the sealing tool including: a holder elevatably disposed on each of upper and lower sides of the pouch; and a sealing block coupled to the holder to contact the pouch by the elevation of the holder, thereby sealing the pouch. The sealing block and the holder are spaced apart from each other to define a space therebetween. According to the present invention, a spacing member is interposed between the holder and the sealing block of the sealing tool to define a space into which the sealing block is deformable, thereby minimizing the deformation of a sealing surface of the sealing block. Thus, the sealing part of the pouch may have a uniform thickness to prevent an electrolyte within the pouch from leaking to the outside.

Abstract: A semiconductor circuit includes a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit determines a value of a first node based on a voltage level of a clock signal, and a voltage level of an enable signal or a voltage level of a scan enable signal. The second circuit determines a value of a second node based on the voltage levels of the first node and the clock signal. The third circuit determines a value of a third node based on a voltage level of the second node. The fourth circuit determines a value of a fourth node based on the voltage levels of the second node and the clock signal. The third circuit includes a first transistor and a second transistor connected in series with each other and gated to the voltage level of the second node to determine the value of the third node. The fourth circuit includes a third transistor that is gated to the voltage level of the clock signal to electrically connect the third node and the fourth node.

Abstract: A semiconductor device may include a first node coupled to a first pad to which a first voltage having a first voltage level is inputted; a second node coupled to a second pad to which a second voltage having a second voltage level is inputted; an internal voltage generation unit suitable for shifting a voltage level of the first node to generate an internal voltage having the second voltage level, and outputting the internal voltage to third and fourth nodes; a first internal circuit suitable for operating by employing a voltage of the second node; and a node coupling unit that electrically couples the second node to the third node during a test operation, and electrically separates the second node and the third node during a normal operation.

Abstract: A liquid crystal display panel includes substrates opposed to each other, a liquid crystal layer interposed between the substrates, a seal line surrounding an outer peripheral portion of the liquid crystal layer and disposed between the substrates and a liquid crystal alignment layer including a polyimide, the liquid crystal alignment layer including a first region and a second region disposed in an outer peripheral portion of the first region and disposed on one surface of at least one of the substrates, wherein at least a portion of the second region is overlapped with the seal line, the second region having a surface roughness value greater than that of the first region.

Abstract: Disclosed is a blend prepared by mixing a prepolymer and a vinyl monomer, wherein the prepolymer is prepared by a condensation reaction between a first compound represented by the formula Ar—H, where Ar comprises (a) a crosslinkable moiety at one end, (b) a moiety selected from the group consisting of —O—, —S—, —COO—, —CO—, —COS—, —SO2—, and —NH—, and (c) one or two repeating units selected from the group consisting of: where A is carbon or nitrogen, and X is hydrogen or halogen; and a second compound consisting of an aromatic moiety. Additionally disclosed is a polymer sheet that is a crosslinked product composed of the blend.

Abstract: In a luminescent diode and a method for manufacturing the same, a planar buried heterostructure (PBH) and a ridge waveguide structure are combined, so that the luminescent diode can be operated to generate a high output of 100 mW or more at low current. Further, it is possible to reduce electro-optic loss. In addition, the luminescent diode is applied to a wavelength tunable external cavity laser, so that it is possible to provide an external cavity laser having excellent output characteristics.

Abstract: A multi-layered noise absorbing and insulating material includes a noise insulation material having opposing first and second major surfaces. The noise insulation material includes an adhesive resin including an air permeability-forming material. A first noise absorption material is adhered to the first major surface of the noise insulation material. A second noise absorption material is adhered to the second major surface of the noise insulation material. The multi-layered noise insulation absorbing and insulating material has air-permeability.