Abstract: A protective layer for a PDP, includes a doping source layer containing at least one dopant, and a body layer which contacts the doping source layer and includes at least one dopant diffused from the doping source layer. The protective layer is capable of reducing dopant loss and avoiding trade-offs/conflicts between a donor dopant and an acceptor dopant.

Abstract: Provided are a protective layer made of magnesium oxide containing at least one rare earth element selected from the group consisting of the rare earth elements, in which the content of the at least one rare earth element is from about 5.0×10?5 to about 6.0×10?4 per 1 part by weight of the magnesium oxide, a composite for forming the protective layer, a method of forming the protective layer, and a plasma display panel including the protective layer. The protective layer can reduce a discharge delay time and the temperature dependency of the discharge delay time, and thus, is suitable for single scan and an increase in Xe content.

Abstract: A method for fabricating a semiconductor device includes forming a first pattern over a substrate, forming an oxide-based layer over the first pattern, forming a hard mask layer over the oxide-based layer, etching the hard mask layer at a first substrate temperature, and etching the oxide-based layer to form a second pattern, wherein the oxide-based layer is etched at a second substrate temperature which is greater than the first substrate temperature using a gas including fluorine (F) and carbon (C) as a main etch gas.

Abstract: A method for fabricating a semiconductor device includes forming at least one gate pattern over a substrate, forming a first insulation layer over the gate patterns and the substrate, etching the first insulation layer in a peripheral region to form at least one gate pattern spacer in the peripheral region, forming a second insulation layer over the substrate structure, etching the second insulation layer in a cell region to a given thickness, forming an insulation structure over the substrate structure, and etching the insulation structure, the etched first insulation layer and second insulation layer in the cell region to form a contact hole.

Abstract: Disclosed herein is a stable liquid formulation comprising human growth hormone; L-lysine, L-arginine or polyethylene glycol 300; and poly(oxyethylene) poly(oxypropylene) copolymer, polyethylene glycol-15 polyoxystearate or polyethylene glycol-35 castor oil.

Abstract: A protective layer of a plasma display panel includes smoky magnesium oxide, the smoky magnesium oxide having single crystal magnesium oxide with a plurality of cavities therein.

Abstract: Provided are a protecting layer for a plasma display panel (PDP), a method of forming the same, and a PDP including the protecting layer. The protecting layer includes a magnesium oxide-containing layer having a surface to which magnesium oxide-containing particles having a magnesium vacancy-impurity center (VIC) are attached. The protecting layer is resistant to plasma ions and has excellent electron emission effects, and thus, a PDP including the protecting layer can be operated at low voltage with high discharge efficiency.

Abstract: A protecting layer is formed of a magnesium oxide layer and electron emission promoting material formed on the magnesium oxide layer. The electron emission promoting material may be patterned on the magnesium oxide layer, or may be sprayed and heat-treated on the surface of the magnesium oxide layer. The protecting layer exhibits excellent electron emission characteristics while not being substantially damaged by plasma ions, thereby improving the reliability of a PDP.

Abstract: The present invention relates to a sustained release film formulation for healing wound comprising epidermal growth factor, chitosan, viscosity modifiers, plasticizers, and stabilizers. Specifically, the present invention relates to a sustained release film formulation for healing wound comprising epidermal growth factor as an effective ingredient and chitosan as a main base, and additionally comprising one or more antioxidants selected from the group consisting of EDTA and vitamin C; one or more viscosity modifiers selected from the group consisting of hydroxypropylmethylcellulose, gellan gum and pullulan; and one or more plasticizers selected from the group consisting of glycerin, propylene glycol, polyethylene glycol, polyvinyl alcohol and polyvinylpyrrolidone thereto. When the present film is attached to wound site, it absorbs exudation from wound site, and so is changed to hydrogel to keep wound site humid, which is good for wound-healing.

Abstract: A method of fabricating a semiconductor device includes forming a plurality of pillars which are arranged on a substrate in a first direction and a second direction that intersects the first direction, thereby forming a resulting structure, forming a capping layer on the resulting structure including the pillars, removing the capping layer formed on the substrate between the pillars to expose the substrate between the pillars, thereby forming a resulting structure, forming a metal layer on the resulting structure, forming a silicide layer on the exposed substrate between the pillars by applying a first heat treatment to the metal layer, removing a non-reacted silicide layer, and forming an isolation trench in the substrate which is between rows of the pillars arranged in the first direction and is under the silicide layer to define bit lines which surround the pillars and are extended to the first direction.

Abstract: A method of fabricating a semiconductor device, the method includes forming gate patterns on a substrate, recessing the substrate between the gate patterns, thereby forming a first resulting structure including recesses, forming a gate spacer layer on an entire surface of the first resulting structure including the gate patterns, etching the gate spacer layer at a bottom of the recess, and forming a plug on the recess, thereby forming a second resulting structure including the plug.

Abstract: A method for fabricating a semiconductor device with a vertical channel includes providing a substrate over which a hard mask pattern is formed, forming pillars over the substrate using the hard mask pattern thereby forming a resultant structure, forming an insulation layer over the resultant structure, planarizing the hard mask pattern and the insulation layer until the pillars are exposed, and forming a storage electrode over the exposed pillars.

Abstract: A method and system are provided for fabricating a semiconductor device that includes a vertical channel transistor. An area of a buried bit line is uniformly formed by an isolation trench. The width of the isolation trench is adjusted by controlling the thickness of spacers. Consequently, the area of the buried bit line is relatively large compared with that of a typical buried bit line. The resistance characteristics of the buried bit line are improved and stability and reliability of the semiconductor device are ensured.

Abstract: A protecting layer is formed of a magnesium oxide and at least one additional component selected from the group consisting of a copper component selected from copper and a copper oxide, a nickel component selected from nickel and a nickel oxide, a cobalt component selected from cobalt and a cobalt oxide, and an iron component selected from iron and an iron oxide; a composite for forming the protecting layer; a method of forming the protecting layer; and a plasma display panel including the protecting layer. The protecting layer, which is used in a PDP, protects an electrode and a dielectric layer from a plasma ion generated by a gaseous mixture of Ne and Xe, or He, Ne, and Xe, and discharge delay time and dependency of the discharge delay time on temperature can be decreased and sputtering resistance can be increased.

Abstract: A method for fabricating a semiconductor device includes forming at least one gate pattern over a substrate, forming a first insulation layer over the gate patterns and the substrate, etching the first insulation layer in a peripheral region to form at least one gate pattern spacer in the peripheral region, forming a second insulation layer over the substrate structure, etching the second insulation layer in a cell region to a given thickness, forming an insulation structure over the substrate structure, and etching the insulation structure, the etched first insulation layer and second insulation layer in the cell region to form a contact hole.

Abstract: The sintered magnesium oxide according to one embodiment has a density of less than 3.5 g/cm3 and an average grain size of about 3 to about 10 ?m. A MgO protective layer made from the sintered magnesium oxide reduces a discharge voltage of a plasma display panel, improves its response speed, and provides it with high-purity film quality.

Abstract: A material for preparing a protective layer for a PDP, which reduces discharge delay time, improves temperature dependency, and has enhanced ion strength; a method of preparing the same; a protective layer formed of the material; and a PDP including the protective layer. More particularly, a material for a protective layer that includes monocrystalline magnesium oxide doped with a rare earth element at an amount of 2.0×10?5?1.0×10?2 parts by weight per 1 part by weight of magnesium oxide (MgO), a method of preparing the monocrystalline magnesium oxide by crystallizing it at about 2,800° C., a protective layer formed of the same, and PDP including the protective layer.

Abstract: A sintered magnesium oxide has a density of 3.5 g/cm3 or more, and has a grain size that is more than or equal to thirty times the average particle diameter of magnesium oxide particles. An MgO protective layer made from the sintered magnesium oxide reduces a discharge voltage of a plasma display panel, improves response speed, and provides a high-purity film quality.

Abstract: The present invention is a method for testing a contact open capable of effectively testing a contact open defect in an In-line as securing a mass productivity. The method includes the steps of: performing a photolithography process for forming a contact; forming a contact hole by performing a contact etching process after sampling at least one wafer; depositing a conductive layer on the wafer provided with the contact hole; isolating the conductive layer within the contact hole; performing a test for testing a contact open interface to check whether a remaining layer is existed in an interface between the conductive layer and a lower structure of the conductive layer; and performing a process for etching the contact of a main lot based on a test result.

Abstract: A method for fabricating a semiconductor device includes forming an etch barrier layer over a semi-finished substrate that includes a plurality of patterns, forming an insulation layer over the etch barrier layer, planarizing the insulation layer, recessing a portion of the planarized insulation layer, forming a hard mask pattern over the recessed and planarized insulation layer, etching the recessed insulation layer to form a contact hole, etching the etch barrier layer formed over a bottom portion of the contact hole, and forming a plug contact in the contact hole.