Patents by Inventor Min Ying

Min Ying has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240122163
    Abstract: The present invention demonstrated a Cre-loxP based cofilin-1 transgenic animal model to address the pathophysiological role of over-expressed cofilin-1 on systemic development.
    Type: Application
    Filed: February 6, 2023
    Publication date: April 18, 2024
    Inventors: Yi-Jang LEE, Yu-Chuan LIN, Min-Ying LIN, Bing-Ze LIN, Chia-Yun KANG
  • Patent number: 11955329
    Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Chun-I Tsai, Ken-Yu Chang, Yi-Ying Liu
  • Patent number: 11934065
    Abstract: A display device includes a substrate, a first light emitting element, a second light emitting element, and an optical film sheet. The first light emitting element and the second light emitting element are disposed on the substrate. The first light emitting element emits a first light, and the first light has a first wavelength range. The second light emitting element emits a second light, and the second light has a second wavelength range. The optical film sheet is disposed above the first light emitting element and the second light emitting element. The optical film sheet includes a first zone and a second zone. The first zone includes a first cholesteric liquid crystal, and the first cholesteric liquid crystal reflects light in at least the first wavelength range. The second zone includes a second cholesteric liquid crystal, and the second cholesteric liquid crystal reflects light in at least the second wavelength range.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: March 19, 2024
    Assignee: AUO Corporation
    Inventors: Wan Heng Chang, Min-Hsuan Chiu, Syuan-Ying Lin, Wei-Ming Cheng
  • Patent number: 11929379
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip, the method includes forming a through substrate via (TSV) in a first substrate. The TSV continuously extends from a first surface of the first substrate to a second surface of the first substrate. A conductive contact is formed on the second surface of the first substrate. The conductive contact comprises a first conductive layer disposed on the TSV. An upper conductive layer is formed between the conductive contact and the TSV. The upper conductive layer comprises a silicide of a conductive material of the first conductive layer.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Ying Tsai, Cheng-Ta Wu, Yeur-Luen Tu
  • Patent number: 11925250
    Abstract: A cosmetic applicator for applying a product including a cosmetic, care or pharmaceutical product onto the keratinous substrate. The cosmetic applicator comprises an applying member and a shank. The applying member comprises a first application face and a second application face opposite to the first application face, a first peripheral edge, and a second peripheral edge opposite the first peripheral edge. The applying member has a plurality of bulged portions on the second application face and a corresponding plurality of depressed portions on the first application face. The plurality of bulged portions extend from the first peripheral edge towards a central longitudinal axis of the applying member but do not extend up to the second peripheral edge. Each of the plurality of bulged portions has an arched structure, and each of the plurality of depressed portion has a concave bowl structure.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: March 12, 2024
    Assignee: APR Beauty Group, Inc.
    Inventors: Min-Yan Zheng, Feng-Ying Fu
  • Publication number: 20240021642
    Abstract: The present disclosure relates to an image sensor comprising a substrate. A photodetector is in the substrate. A trench is in the substrate and is defined by sidewalls and an upper surface of the substrate. A first isolation layer extends along the sidewalls and the upper surface of the substrate that define the trench. The first isolation layer comprises a first dielectric material. A second isolation layer is over the first isolation layer. The second isolation layer lines the first isolation layer. The second isolation layer comprises a second dielectric material. A third isolation layer is over the second isolation layer. The third isolation layer fills the trench and lines the second isolation layer. The third isolation layer comprises a third material. A ratio of a first thickness of the first isolation layer to a second thickness of the second isolation layer is about 0.17 to 0.38.
    Type: Application
    Filed: July 20, 2023
    Publication date: January 18, 2024
    Inventors: Min-Ying Tsai, Cheng-Te Lee, Rei-Lin Chu, Ching I Li, Chung-Yi Yu
  • Patent number: 11869761
    Abstract: The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensing die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: January 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Chun-Tsung Kuo, Jiech-Fun Lu, Min-Ying Tsai, Chiao-Chun Hsu, Ching I Li
  • Publication number: 20230411425
    Abstract: In some embodiments, the present disclosure relates to a method for forming an integrated chip (IC), including forming a plurality of image sensing elements including a first doping type within a substrate, performing a first removal process to form deep trenches within the substrate, the deep trenches separating the plurality of image sensing elements from one another, performing an epitaxial growth process to form an isolation epitaxial precursor including a first material within the deep trenches and to form a light absorbing layer including a second material different than the first material within the deep trenches and between sidewalls of the isolation epitaxial precursor, performing a dopant activation process on the light absorbing layer and the isolation epitaxial precursor to form a doped isolation layer including a second doping type opposite the first doping type, and filling remaining portions of the deep trenches with an isolation filler structure.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 21, 2023
    Inventors: Yu-Hung Cheng, Ching I Li, Yu-Siang Fang, Yu-Yao Hsia, Min-Ying Tsai
  • Publication number: 20230402487
    Abstract: A Deep Trench Isolation (DTI) structure is disclosed. The DTI structures according to embodiments of the present disclosure include a composite passivation layer. In some embodiments, the composite passivation layer includes a hole accumulation layer and a defect repairing layer. The defect repairing layer is disposed between the hole accumulation layer and a semiconductor substrate in which the DTI structure is formed. The defect repairing layer reduces lattice defects in the interface, thus, reducing the density of interface trap (DIT) at the interface. Reduced density of interface trap facilitates strong hole accumulation, thus increasing the flat band voltage. In some embodiments, the hole accumulation layer according to the present disclosure is enhanced by an oxidization treatment.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Inventors: Bi-Shen LEE, Chia-Wei HU, Hai-Dang TRINH, Min-Ying TSAI, Ching I LI, Hsun-Chung KUANG, Cheng-Yuan TSAI
  • Publication number: 20230378217
    Abstract: The present disclosure relates to an image sensor having an epitaxial deposited photodiode structure surrounded by an isolation structure, and an associated method of formation. In some embodiments, a first epitaxial deposition process is performed to form a first doped EPI layer over a substrate. The first doped EPI layer is of a first doping type. Then, a second epitaxial deposition process is performed to form a second doped EPI layer on the first doped photodiode layer. The second doped EPI layer is of a second doping type opposite from the first doping type. Then, an isolation structure is formed to separate the first doped EPI layer and the second photodiode as a plurality of photodiode structures within a plurality of pixel regions. The plurality of photodiode structures is configured to convert radiation that enters from a first side of the image sensor into an electrical signal.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 23, 2023
    Inventors: Min-Ying Tsai, Ching I Li
  • Patent number: 11817469
    Abstract: In some embodiments, the present disclosure relates to a method for forming an integrated chip (IC), including forming a plurality of image sensing elements including a first doping type within a substrate, performing a first removal process to form deep trenches within the substrate, the deep trenches separating the plurality of image sensing elements from one another, performing an epitaxial growth process to form an isolation epitaxial precursor including a first material within the deep trenches and to form a light absorbing layer including a second material different than the first material within the deep trenches and between sidewalls of the isolation epitaxial precursor, performing a dopant activation process on the light absorbing layer and the isolation epitaxial precursor to form a doped isolation layer including a second doping type opposite the first doping type, and filling remaining portions of the deep trenches with an isolation filler structure.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: November 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Ching I Li, Yu-Siang Fang, Yu-Yao Hsia, Min-Ying Tsai
  • Publication number: 20230361164
    Abstract: Some implementations described herein provide a semiconductor device and methods of formation. The semiconductor device may include a photodiode device electrically connected to a metal-insulator-metal deep-trench capacitor. The metal-insulator-metal deep-trench capacitor includes a layer of an amorphous material between an insulator layer stack of the deep-trench capacitor structure and a capacitor bottom metal layer of the metal-insulator-metal deep-trench capacitor. The amorphous material includes a bandgap energy level that provides a conduction band offset and lowers a probability of electron tunneling from the capacitor bottom metal electrode layer to the insulator layer stack. In this way, leakage associated with grain boundaries, crystal defects, and interfaces of a bottom layer of the insulator layer stack may be overcome to improve a lag performance of the semiconductor device including the metal-insulator-metal deep-trench capacitor.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventors: Min-Ying TSAI, Chih-Ping CHANG, Ching I LI
  • Patent number: 11784204
    Abstract: The present disclosure relates to an image sensor comprising a substrate. A photodetector is in the substrate. A trench is in the substrate and is defined by sidewalls and an upper surface of the substrate. A first isolation layer extends along the sidewalls and the upper surface of the substrate that define the trench. The first isolation layer comprises a first dielectric material. A second isolation layer is over the first isolation layer. The second isolation layer lines the first isolation layer. The second isolation layer comprises a second dielectric material. A third isolation layer is over the second isolation layer. The third isolation layer fills the trench and lines the second isolation layer. The third isolation layer comprises a third material. A ratio of a first thickness of the first isolation layer to a second thickness of the second isolation layer is about 0.17 to 0.38.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: October 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Ying Tsai, Cheng-Te Lee, Rei-Lin Chu, Ching I Li, Chung-Yi Yu
  • Patent number: 11571656
    Abstract: This invention relates to a dispersion comprising porous particles dispersed in a liquid phase, wherein the porous particles comprise a zeolite and the liquid phase is a size-excluded liquid. The invention also relates to a method of adsorbing a gas into a liquid, comprising at least the step of bringing the gas into contact with the dispersion. In addition, the invention relates to an assemblage of the dispersion, the zeolite comprising a cavity and a gas contained within the cavity.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: February 7, 2023
    Assignee: THE QUEEN'S UNIVERSITY OF BELFAST
    Inventors: Stuart James, Min Ying Tsang, John Cahir
  • Patent number: 11565212
    Abstract: The invention relates to dispersions of porous solids in liquids selected from deep eutectic solvents, liquid oligomers, bulky liquids, liquid polymers, silicone oils, halogenated oils, paraffin oils or triglyceride oils, as well as to their methods of preparation. In embodiments of the invention, the porous solids are metal organic framework materials (MOFs), zeolites, covalent organic frameworks (COFs), porous inorganic materials, Mobil Compositions of Matter (MCMs) or a porous carbon. The invention also relates to the use of porous materials to form dispersions, and to assemblages of such dispersions with a gas or gases. The dispersions can exhibit high gas capacities and selectivities.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: January 31, 2023
    Assignee: The Queen's University of Belfast
    Inventors: Stuart James, Min Ying Tsang, John Cahir, David Rooney
  • Patent number: 11545513
    Abstract: In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: January 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Shyh-Fann Ting, Yen-Ting Chiang, Yeur-Luen Tu, Min-Ying Tsai
  • Publication number: 20220384496
    Abstract: The present disclosure relates to an image sensor having a photodiode surrounded by a back-side deep trench isolation (BDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within an image sensing die and respectively comprises a photodiode configured to convert radiation into an electrical signal. The photodiode comprises a photodiode doping column with a first doping type surrounded by a photodiode doping layer with a second doping type that is different than the first doping type. A BDTI structure is disposed between adjacent pixel regions and extending from the back-side of the image sensor die to a position within the photodiode doping layer. The BDTI structure comprises a doped liner with the second doping type and a dielectric fill layer. The doped liner lines a sidewall surface of the dielectric fill layer.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 1, 2022
    Inventors: Yu-Hung Cheng, Chun-Tsung Kuo, Jiech-Fun Lu, Min-Ying Tsai, Chiao-Chun Hsu, Ching I Li
  • Publication number: 20220367535
    Abstract: In some embodiments, the present disclosure relates to a method for forming an integrated chip (IC), including forming a plurality of image sensing elements including a first doping type within a substrate, performing a first removal process to form deep trenches within the substrate, the deep trenches separating the plurality of image sensing elements from one another, performing an epitaxial growth process to form an isolation epitaxial precursor including a first material within the deep trenches and to form a light absorbing layer including a second material different than the first material within the deep trenches and between sidewalls of the isolation epitaxial precursor, performing a dopant activation process on the light absorbing layer and the isolation epitaxial precursor to form a doped isolation layer including a second doping type opposite the first doping type, and filling remaining portions of the deep trenches with an isolation filler structure.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 17, 2022
    Inventors: Yu-Hung Cheng, Ching I Li, Yu-Siang Fang, Yu-Yao Hsia, Min-Ying Tsai
  • Patent number: D970833
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: November 22, 2022
    Inventors: Min Ying, Zhehang Bao
  • Patent number: D1024932
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: April 30, 2024
    Assignee: WALSIN LIHWA CORPORATION
    Inventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin