Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.

Abstract: An optimized non-volatile memory operating method. A data storage device has a plurality of non-volatile memory spaces and a plurality of command queues. The command queues are provided to correspond to the non-volatile storage memory one on one. The same channel is shared to operate the non-volatile memory spaces. To deal with the one channel communication technology, the data storage device adopts task switching mechanisms to switch between the different command queues for execution of the operational commands queued in the different command queues.

Abstract: A data storage device in a two-layer control structure is provided. A control unit of the data storage device has a command processor and a first non-volatile memory (NVM) controller. The command processor is operative to communicate with a host. The first non-volatile memory (NVM) controller operates a first NVM of the data storage device. Earlier than the command processor operates according to a ROM image corresponding to the command processor, the first NVM controller operates according to a ROM image corresponding to the first NVM controller to access the first NVM to get a firmware image for the command processor and loads the command processor with the firmware image.

Abstract: A strip for an electronic device senses a liquid sample. The strip includes a substrate having a first surface, a plurality of protrusions disposed on the first surface, and each having a width, and a hydrophilic layer having a layer surface disposed on the first surface and the plurality of protrusions, and having a second surface opposite to the layer surface, whereby the liquid sample and the second surface have a contact angle therebetween ranging from 2 to 85 degrees when the liquid sample is disposed on the hydrophilic layer.

Abstract: A pop-free headset detection circuit includes a socket unit, a first operational amplifier, a second operational amplifier and a detection and control circuit. An inverting input end of the first operational amplifier is connected to a left-channel audio source. A non-inverting input end of the first operational amplifier receives a first reference voltage. An inverting input end of the second operational amplifier is connected to a right-channel audio source. A non-inverting input end of the second operational amplifier receives a second reference voltage. When there is a headset plug of a headset plugged into the socket unit, the detection and control circuit controls the first operational amplifier and the second operational amplifier to be in a Hi-Z state, disconnects the first operational amplifier and the second operational amplifier and their feedback resistors, and then determines the type of the headset.

Abstract: A conducting package structure includes a substrate and a conducting material. The conducting material is formed to a first patterned structure. The first patterned structure has a first surface which is connected to the substrate and a patterned second surface opposite to the first surface.

Abstract: A switching driver capable of reducing EMI effect and power ripple is disclosed. When the switching driver wants to increase the voltage of an output end, a non-overlapping signal generator controls a low-side driver to quickly turn off a low-side switch, and detects an ascending slope of the voltage of the output end to control a cut-off velocity of a low-side auxiliary switch. When the switching driver wants to decrease the voltage of the output end, the non-overlapping signal generator controls a high-side driver to quickly turn off a high-side switch, and detects a descending slope of the voltage of the output end to control a cut-off velocity of a high-side auxiliary switch. As the descending slope becomes higher, the cut-off velocity of the high-side auxiliary switch becomes slower. Accordingly, the switching driver can reduce EMI effect and power ripple operating in a dead-time.

Abstract: An IC includes a memory core logic unit, an output unit, and an input unit. The memory logic unit is coupled to a plurality of bit cells configured to control read and write of data to and from the plurality of bit cells. The input unit is formed on the integrated circuit. The output unit is formed on the integrated circuit. The input unit includes a second plurality of multiplexers for signal selection, at least one lock up latch for storing data and configured to increase a hold time for the data, and at least one shadow latch configured to store a copy of the data stored in the at least one lock up latch. The output unit includes a first plurality of multiplexers for signal selection and at least one high phase pass latch for storing data.

Abstract: A switching driver capable of reducing EMI effect and power ripple is disclosed. When the switching driver wants to increase the voltage of an output end, a non-overlapping signal generator controls a low-side driver to quickly turn off a low-side switch, and detects an ascending slope of the voltage of the output end to control a cut-off velocity of a low-side auxiliary switch. When the switching driver wants to decrease the voltage of the output end, the non-overlapping signal generator controls a high-side driver to quickly turn off a high-side switch, and detects a descending slope of the voltage of the output end to control a cut-off velocity of a high-side auxiliary switch. As the descending slope becomes higher, the cut-off velocity of the high-side auxiliary switch becomes slower. Accordingly, the switching driver can reduce EMI effect and power ripple operating in a dead-time.

Abstract: An error measuring method of gear includes: performing the single gear flank testing to the gear pair in order to produce a testing signal graph; the operation unit decomposing the testing signal graph by Empirical Mode Decomposition (EMD) to generate a plurality of intrinsic-mode-function graphs (IMFs), the intrinsic-mode-function graph (IMF) having a first function graph with a first range and a second function graph with a second range, the first range is greater than the second range; the operation unit selecting a plurality of third function graph from the intrinsic-mode-function graphs (IMFs), wherein the third range is greater than the second range but not greater than the first range; the operation unit combining the third function graphs to produce a graph of superposing function; the operation unit computing out a plurality of single pitch error, a plurality of adjacent pitch error and an accumulated pitch error.

Abstract: A static random access memory (SRAM) including at least a memory cell array, a first data line connected to the memory cell array, and a read assist unit connected to the first data line. The read assist unit is configured to suppress a voltage level of the first data line during a read operation of the memory cell array.

Abstract: A chip package structure including a main substrate, a carrier substrate, at least a chip, a molding compound, a shielding layer and a plurality of connection structures between the main substrate and the carrier substrate. The shielding layer covers the top surface and the sidewalls of the molding compound and a portion of the carrier substrate. The shielding layer is electrically grounded through the connection structures.

Abstract: A chip package structure including a main substrate, a carrier substrate, at least a chip, a molding compound, a shielding layer and a plurality of connection structures between the main substrate and the carrier substrate. The shielding layer covers the top surface and the sidewalls of the molding compound and a portion of the carrier substrate. The shielding layer is electrically grounded through the connection structures.

Abstract: An output-stage circuit is disclosed. The output-stage circuit includes high-side output driver, first body selector, low-side output driver, second body selector and inductance. When output current is larger than current threshold value so as to make the low-side output driver generate overcurrent, the low-side output driver controlled by second control signal is disabled, and the high-side output driver controlled by first control signal is enabled so as to create first current channel. When output current is larger than current threshold value so as to make the high-side output driver generate overcurrent, the high-side output driver controlled by the first control signal is disabled, and the low-side output driver controlled by the second control signal is enabled so as to create second current channel to avoid current flowing through low-side output driver's body, and thus reduce the output current and voltage spiking of the output voltage.

Abstract: A static random access memory (SRAM) including at least a memory cell array, a first data line connected to the memory cell array, and a read assist unit connected to the first data line. The read assist unit is configured to suppress a voltage level of the first data line during a read operation of the memory cell array.

Abstract: A conducting package structure includes a substrate and a conducting material. The conducting material is formed to a first patterned structure. The first patterned structure has a first surface which is connected to the substrate and a patterned second surface opposite to the first surface.

Abstract: A pop-free single-ended output class-D amplifier includes: an input signal generator for generating an input signal; a power supply for supplying input power; a reference voltage generator for generating a reference voltage; a gain-adjustable stage for generating an amplified signal according to the reference voltage and adjusting a gain of the single-ended output class-D amplifier; a pulse width modulation module for outputting a pulse width modulation signal according to the reference voltage, the amplified signal, and the input power; a low-pass filter for low-pass filtering the pulse width modulation signal to generate an output voltage; and a logic controller for generating at least one control signal to control the reference voltage generator, the gain-adjustable stage, and the pulse width modulation module according to the input power, the reference voltage, and the pulse width modulation signal.

Abstract: An error measuring method of gear includes: performing the single gear flank testing to the gear pair in order to produce a testing signal graph; the operation unit decomposing the testing signal graph by Empirical Mode Decomposition (EMD) to generate a plurality of intrinsic-mode-function graphs (IMFs), the intrinsic-mode-function graph (IMF) having a first function graph with a first range and a second function graph with a second range, the first range is greater than the second range; the operation unit selecting a plurality of third function graph from the intrinsic-mode-function graphs (IMFs), wherein the third range is greater than the second range but not greater than the first range; the operation unit combining the third function graphs to produce a graph of superposing function; the operation unit computing out a plurality of single pitch error, a plurality of adjacent pitch error and an accumulated pitch error.

Abstract: An output-stage circuit is disclosed. The output-stage circuit includes high-side output driver, first body selector, low-side output driver, second body selector and inductance. When output current is larger than current threshold value so as to make the low-side output driver generate overcurrent, the low-side output driver controlled by second control signal is disabled, and the high-side output driver controlled by first control signal is enabled so as to create first current channel. When output current is larger than current threshold value so as to make the high-side output driver generate overcurrent, the high-side output driver controlled by the first control signal is disabled, and the low-side output driver controlled by the second control signal is enabled so as to create second current channel to avoid current flowing through low-side output driver's body, and thus reduce the output current and voltage spiking of the output voltage.

Abstract: A body biasing device for an amplifier which has a P-type differential pair and outputs an output signal at an output node according to a differential input signal pair is disclosed. The body biasing device includes a detection unit coupled to the operational amplifier for detecting a detected voltage related to the differential input signals and accordingly outputting a control signal; and a selection unit coupled to the detection unit and the operational amplifier for outputting a body bias to the P-type differential pair according to the control signal.