Abstract: A fully on-chip temperature, process, and voltage sensor includes a voltage sensor, a process sensor and a temperature sensor. The temperature sensor includes a bias current generator, a ring oscillator, a fixed pulse generator, an AND gate, and a first counter. The bias current generator generates an output current related to temperature according to the operating voltage of chip. The ring oscillator generates an oscillation signal according to the output current. The fixed pulse generator generates a fixed pulse signal. The AND gate is connected to the ring oscillator and the fixed pulse generator for performing a logic AND operation on the oscillation signal and the fixed pulse signal, and generating a temperature sensor signal.

Abstract: A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer.

Abstract: A current control circuit for controlling a bias current of a class AB operational amplifier includes: a low current source, for generating a low bias current; a high current source, for generating a high bias current, which is greater than the low bias current; and a comparing and selecting unit, coupled to an output terminal of the class AB operational amplifier, for selecting one of the low bias current and the high bias current to output as the bias current according to an output voltage of the class AB OP.

Abstract: A class AB operational amplifier includes: a first transistor, for generating a first current; a second transistor, where a second source voltage of the second transistor is equal to a first source voltage of the first transistor, for generating an output stage quiescent current; and an output stage quiescent current controller, coupled to a gate and a source of the first transistor, for controlling a first drain-to-source voltage of the first transistor to be equal to a second drain-to-source voltage of the second transistor. A ratio of the output stage quiescent current to the first current is equal to a ratio of a second W/L ratio of the second transistor to a first W/L ratio of the first transistor.

Abstract: A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer.

Abstract: An offset voltage calibration method is disclosed, which is utilized for calibrating an offset voltage of an electronic device during a calibration period. The offset voltage calibration method includes generating a control signal according to an output signal of the electronic device, counting a count value and generating an offset indication signal according to the control signal, stopping counting and generating a final count value according to a compensation value after the output signal changes state, generating a calibration signal according to the count value or the final count value, and calibrating the offset voltage according to the offset indication signal and the calibration signal.

Abstract: An offset voltage calibration method is disclosed, which is utilized for calibrating an offset voltage of an electronic device during a calibration period. The offset voltage calibration method includes generating a control signal according to an output signal of the electronic device, counting a count value and generating an offset indication signal according to the control signal, stopping counting and generating a final count value according to a compensation value after the output signal changes state, generating a calibration signal according to the count value or the final count value, and calibrating the offset voltage according to the offset indication signal and the calibration signal.

Abstract: An output driving circuit capable of reducing EMI effect includes a non-overlapping signal generation unit for generating a first non-overlapping signal and a second non-overlapping signal according to an input signal, a pre-driver for generating a first pre-driving signal and a second pre-driving signal according to the first non-overlapping signal and the second non-overlapping signal, a high-side switch, a low-side switch, and a control unit for controlling the high-side switch or the low-side switch to be switched into a weak on state to reduce load inductive current effect for a load.

Abstract: A random clock generator for a spread spectrum modulating device includes a random number generator for generating a plurality of random number signals according to a first square wave signal and a control signal, a reference wave generator coupled to the random number generator for generating a triangular signal and a second square wave signal according to the plurality of random number signals, and a trigger signal generator coupled to the random number generator and the reference wave generator, for generating the first square wave signal according to the second square wave signal.

Abstract: A switching amplifier includes an input end for receiving an input signal, a reference signal reception end for receiving a reference signal, a feedback end for receiving a feedback signal, an output end for outputting an output signal, an integration circuit for performing integration operation on the input signal according to the output signal and the feedback signal, so as to generate an integration result, a comparison circuit coupled to the integration circuit, the reference signal end, and the output end, for comparing the integration result and the reference signal, so as to generate the output signal for the output end, and a feedback circuit coupled between an output end of the integration circuit and the feedback end, for generating the feedback signal for the feedback end to clamp the integration result to a predetermined value when the integration result reaches the predetermined value.

Abstract: A switching amplifier includes an input end for receiving an input signal, a reference signal reception end for receiving a reference signal, a feedback end for receiving a feedback signal, an output end for outputting an output signal, an integration circuit for performing integration operation on the input signal according to the output signal and the feedback signal, so as to generate an integration result, a comparison circuit coupled to the integration circuit, the reference signal end, and the output end, for comparing the integration result and the reference signal, so as to generate the output signal for the output end, and a feedback circuit coupled between an output end of the integration circuit and the feedback end, for generating the feedback signal for the feedback end to clamp the integration result to a predetermined value when the integration result reaches the predetermined value.

Abstract: In a control circuit and method for a high efficiency and low EMI switching amplifier, an input signal is compared with a reference signal to generate a comparison signal, and a control signal is generated in response to the comparison signal for a driver to generate an output signal. The output signal is fed back to control the slope of the reference signal in association with an initial level set for the reference signal to provide a minimum on-time period for the output signal. Alternatively, a reference value is provided to compare with the reference signal for setting a minimum on-time period for the output signal.

Abstract: In the proposed stored don't-care hierarchical search-line scheme, a content-addressable memory (CAM) is divided into several blocks. Each block contains a plurality of local search-lines, a global search-line, a buffer and a memory memory cell. Data are stored in the blocks in order according to the length of the prefix. Data with the longest prefix is stored at the bottommost, and its don't-care state is used as the control signal of the buffer to control whether to transfer the data on the global search-line to the local search-line or not. The local search-line then transfer the value into the memory cell. There is no complex control circuit and extra storage device needed. Moreover, because the control signal directly comes from the don't-care state, power consumption on search-lines can be effectively reduced with no increase of search delay.

Abstract: A random clock generator for a spread spectrum modulating device includes a random number generator for generating a plurality of random number signals according to a first square wave signal and a control signal, a reference wave generator coupled to the random number generator for generating a triangular signal and a second square wave signal according to the plurality of random number signals, and a trigger signal generator coupled to the random number generator and the reference wave generator, for generating the first square wave signal according to the second square wave signal.

Abstract: In the proposed stored don't-care hierarchical search-line scheme, a content-addressable memory (CAM) is divided into several blocks. Each block contains a plurality of local search-lines, a global search-line, a buffer and a memory cell. Data are stored in the blocks in order according to the length of the prefix. Data with the longest prefix is stored at the bottommost, and its don't-care state is used as the control signal of the buffer to control whether to transfer the data on the global search-line to the local search-line or not. The local search-line then transfer the value into the memory cell. There is no complex control circuit and extra storage device needed. Moreover, because the control signal directly comes from the don't-care state, power consumption on search-lines can be effectively reduced with no increase of search delay.

Abstract: In a control circuit and method for a high efficiency and low EMI switching amplifier, an input signal is compared with a reference signal to generate a comparison signal, and a control signal is generated in response to the comparison signal for a driver to generate an output signal. The output signal is fed back to control the slope of the reference signal in association with an initial level set for the reference signal to provide a minimum on-time period for the output signal. Alternatively, a reference value is provided to compare with the reference signal for setting a minimum on-time period for the output signal.

Abstract: In a switching amplifier for generating a pair of output signals of square waves in response to an input signal, when the input signal is zero, the first output signal has a first duty cycle and the second output signal has a second duty cycle; when the input signal is greater than zero, the first output signal has a third duty cycle varying with the input signal and the second output signal still has the second duty cycle; and when the input signal is less than zero, the first output signal has the first duty cycle and the second output signal has a fourth duty cycle varying with the input signal. The first and second duty cycles are very small but equal to each other in size, and the phase difference between the first and second output signals could range from 0 to 180 degrees.

Abstract: In a control circuit and method for a high efficiency and low EMI switching amplifier, an input signal is compared with a reference signal to generate a comparison signal, and a control signal is generated in response to the comparison signal for a driver to generate an output signal. The output signal is fed back to control the slope of the reference signal in association with an initial level set for the reference signal to provide a minimum on-time period for the output signal. Alternatively, a reference value is provided to compare with the reference signal for setting a minimum on-time period for the output signal.

Abstract: The present invention discloses a method for reducing switching interference in a switching amplifier. The switching amplifier includes a first half circuit having a first modulator and a first driver circuit, a second half circuit having a second modulator and a second driver circuit, a first reference wave generator for a first reference wave, and a second reference wave generator for a second reference wave. A first input signal and a second input signal are inputted to the first modulator and the second modulator, respectively. A first modulated signal and a second modulated signal are generated and inputted to the first driver circuit and second driver circuit, respectively. There is a time delay between the switching points, wherein the time delay is large enough to avoid mutual interference. Therefore, distortion of the output signal can be eliminated while the input signals are small.

Abstract: An amplifier circuit includes a feedback loop; a former stage amplifier unit coupled to an input node of the amplifier circuit and the feedback loop for amplifying the difference between an input signal received from the input node and an output signal which comes back through the feedback loop, and outputting a first output signal; a compensating amplifier unit coupled to the former stage amplifier unit for amplifying the first output signal and outputting a second output signal; and an output stage amplifier unit coupled to the compensating amplifier unit and the feedback loop for outputting a third output signal according to the second output signal.