Abstract: A dual sensor imaging system and an imaging method thereof are provided. The method includes: identifying an imaging scene; controlling a color sensor and an IR sensor to respectively capture color images and IR images by adopting capturing conditions suitable for the imaging scene; calculating a signal-to-noise ratio (SNR) difference between each color image and the IR images, and a luminance mean value of each color image; selecting the color image and IR image captured under capturing conditions of having the SNR difference less than an SNR threshold and the luminance mean value greater than a luminance threshold to execute a feature domain transformation to extract partial details of the imaging scene; and fusing the selected color image and IR image to adjust the partial details of the color image according to a guidance of the partial details of the IR image to obtain a scene image with full details.

Abstract: A semiconductor package structure includes a die paddle, a plurality of leads, an electronic component and a package body. Each of the plurality of leads is separated from the die paddle and has an inner side surface facing the die paddle. The electronic component is disposed on the die paddle. The package body covers the die paddle, the plurality of leads and the electronic component. The package body is in direct contact with a bottom surface of the die paddle and the inner side surface of the plurality of leads.

Abstract: A package substrate comprises first, second and third electrical test contacts, wherein the package substrate is provided with an upper element plane and a lower SMD electrode plane on two sides. The side edge of the upper element plane is provided with first and second electrodes of the main element and first and second electrodes of the secondary element. The main element of LED chip is electrically connected between the first and second electrodes of the main element, a parallel circuit secondary element is electrically connected between the first and second electrodes of the secondary element. The electrical characteristics of the main element of LED chip and the parallel circuit secondary element are measured through the first, second, and third electrical test contacts when electrically connected.

Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.

Abstract: A semiconductor device package and a method for packaging the same are provided. A semiconductor device package includes a carrier, an electronic component, a buffer layer, a reinforced structure, and an encapsulant. The electronic component is disposed over the carrier and has an active area. The buffer layer is disposed on the active area of the electronic component. The reinforced structure is disposed on the buffer layer. The encapsulant encapsulates the carrier, the electronic component and the reinforced structure.

Abstract: A surface-treated copper foil includes a treated surface, where the peak extreme height (Sxp) of the treating surface is 0.4 to 3.0 ?m. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of diffraction peak of (111) plane to the sum of the integrated intensities of diffraction peaks of (111) plane, (200) plane, and (220) plane of the treating surface is at least 60%.

Abstract: A surface-treated copper foil including a treating surface, where the root mean square height (Sq) of the treating surface is in a range of 0.20 to 1.50 ?m and the texture aspect ratio (Str) of the treating surface is not greater than 0.65. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of (111) peak to the sum of the integrated intensities of (111) peak, (200) peak, and (220) peak of the treating surface is at least 60%.

Abstract: The present disclosure provides high strength, self-ligating appliances with orthodontically desirable dimensions. The appliances of the present disclosure incorporate a door slidably engaged to a channel in the body; one that can be opened or closed depending on the equilibrium position of an integral protrusion on the door. Cooperating grooves and rails on the body and the door can guide the door between the open and closed positions, and mitigate against unintentional detachment.

Abstract: A modular vehicle body includes a pair of outer frames. An inner board space with a fixed width is defined between the outer frames. Each outer frame includes a front side board and a door sill. The front side board includes a main board provided with a vertical board having a predetermined width. A first flange is provided on a side of the vertical board. The door sill includes an inner board provided with a horizontal board having a predetermined width. A second flange is provided on a side of the horizontal board. The inner board is fixedly coupled to the main board. The first flange and the second flange form an outer edge. A width between the outer edges of the pair of outer frames is set to correspond to a width of a vehicle body.

Abstract: A method for identifying candidate target cells within a biological fluid specimen includes a digital image of the biological fluid specimen with the digital image having a plurality of color channels, identifying first connected regions of pixels of a minimum first intensity in a first channel, identifying second connected regions of pixels of a minimum second intensity in a second channel, and determining first connected regions and second connected regions that spatially overlap. For a pair of a first connected region and a second connected region that spatially overlap, whether the second connected region overlaps the first connected region by a threshold amount is determined, and if the second connected region overlaps the first connected region by the threshold amount then the portion of the image corresponding to the overlap is continued to be treated as a candidate for classification.

Abstract: A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.

Abstract: Techniques for identifying and enumerating candidate target cells within a biological fluid specimen are described. A digital image of the biological fluid specimen is received, and one or more candidate regions of pixels in the digital image are identified by identifying connected regions of pixels of a minimum intensity having a size between a minimum size and a maximum size and an aspect ratio that meets a threshold. For each candidate region of at least one of the one or more candidate region, whether the portion of the image corresponding to the candidate region includes more than a threshold number of intensity levels is determined. If the portion of the image corresponding to the candidate region includes more than the threshold number of intensity levels the portion of the image is continued to be treated as a candidate for classification.

Abstract: A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.

Abstract: A surface-treated copper foil including a treating surface, where the root mean square height (Sq) of the treating surface is in a range of 0.20 to 1.50 ?m and the texture aspect ratio (Str) of the treating surface is not greater than 0.65. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of (111) peak to the sum of the integrated intensities of (111) peak, (200) peak, and (220) peak of the treating surface is at least 60%.

Abstract: Methods and devices are described herein for random cut patterning. A first metal line and a second metal line are formed within a cell of a substrate and extend in a vertical direction. A third metal line and a fourth metal line are formed within the cell and are perpendicular to the first metal line and the second metal line, respectively. A first circular region at one end of the first metal line is formed using a first patterning technique and a second circular region at one end of the second metal line is formed using a second patterning technique. The first circular region is laterally extended using a second patterning technique to form the third metal line and the second circular region is laterally extended using the second patterning technique to form the fourth metal line.

Abstract: The present disclosure provides a body-part tracking device and a body-part tracking method. The body-part tracking device includes a first electronic component and a first antenna element. The first antenna element is electrically connected to the first electronic component and configured to receive a first wave. The first electronic component is configured to, in response to the first wave, transmit a second wave.

Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.

Abstract: A semiconductor structure for wafer level bonding includes a bonding dielectric layer disposed on a substrate and a bonding pad disposed in the bonding dielectric layer. The bonding pad includes a top surface exposed from the bonding dielectric layer, a bottom surface opposite to the top surface, and a sidewall between the top surface and the bottom surface. A bottom angle between the bottom surface and sidewall of the bonding pad is smaller than 90 degrees.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first spacer over a substrate. The method includes partially removing the first spacer to form a gap dividing the first spacer into a first part and a second part. The method includes forming a filling layer covering a first top surface and a first sidewall of the first spacer. The filling layer and the first spacer together form a strip structure. The method includes forming a second spacer over a second sidewall of the strip structure. The method includes forming a third spacer over a third sidewall of the second spacer. The third spacer is narrower than the second spacer.

Abstract: An integrated circuit includes a set of active regions in a substrate, a first set of conductive structures, a shallow trench isolation (STI) region, a set of gates and a first set of vias. The set of active regions extend in a first direction and is located on a first level. The first set of conductive structures and the STI region extend in at least the first direction or a second direction, is located on the first level, and is between the set of active regions. The STI region is between the set of active regions and the first set of conductive structures. The set of gates extend in the second direction and overlap the first set of conductive structures. The first set of vias couple the first set of conductive structures to the set of gates.