Abstract: A semiconductor substrate is provided having an insulator thereon with a semiconductor layer on the insulator. A deep trench isolation is formed, introducing strain to the semiconductor layer. A gate dielectric and a gate are formed on the semiconductor layer. A spacer is formed around the gate, and the semiconductor layer and the insulator are removed outside the spacer. Recessed source/drain are formed outside the spacer.

Abstract: The present invention provides increased stain resistance, tannin blocking, adhesion, and various other properties. A composition in accordance with the principles of the present invention comprises at least three binders, nanoparticle pigment, and pigmentary titanium dioxide. In one embodiment, the present invention relates to a coating on a substrate wherein the coating has three binders, nanoparticle metal oxide pigment, and pigmentary titanium dioxide. Various additives may be included to formulate paint as known in the art.

Abstract: A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.

Abstract: A fin field effect transistor (FinFET) includes a reversed T-shaped fin. The FinFET further includes source and drain regions formed adjacent the reversed T-shaped fin. The FinFET further includes a dielectric layer formed adjacent surfaces of the fin and a gate formed adjacent the dielectric layer.

Abstract: A wax burning device includes an electrically insulative and heat proof housing, a base with the housing mounted thereon, a heating element mounted in the housing, a resistor mounted in the heating element, a cord electrically interconnected the resistor and an external power source, a switch provided on the cord, a circuit board provided in the housing, and a light assembly including one or more LEDs formed on the circuit board and being electrically connected to the circuit board. Uniform light is emitted from the light assembly when the wax burning device is activating.

Abstract: A method of forming a silicon-on-insulator substrate is disclosed, including providing a silicon substrate; depositing a first insulation layer over the silicon substrate; forming a conductive layer over the first insulation layer to a first structure; providing a second structure comprising a silicon device layer and a second insulation layer; bonding the first structure and the second structure together so that the conductive layer is located between the first and second insulation layers; and removing a portion of the silicon device layer thereby providing the silicon-on-insulator substrate having two discrete insulation layers. In one embodiment, the method further includes forming at least one conductive plug through the silicon substrate and the first insulation layer and/or the second insulation layer so as to contact the conductive layer. Methods of facilitating heat removal from the device layer are disclosed.

Abstract: A method for doping fin structures in FinFET devices includes forming a first glass layer on the fin structure of a first area and a second area. The method further includes removing the first glass layer from the second area, forming a second glass layer on the fin structure of the first area and the second area, and annealing the first area and the second area to dope the fin structures.

Abstract: A semiconductor device includes a substrate and an insulating layer on the substrate. The semiconductor device also includes a fin structure formed on the insulating layer, where the fin structure includes first and second side surfaces, a dielectric layer formed on the first and second side surfaces of the fin structure, a first gate electrode formed adjacent the dielectric layer on the first side surface of the fin structure, a second gate electrode formed adjacent the dielectric layer on the second side surface of the fin structure, and a doped structure formed on an upper surface of the fin structure in the channel region of the semiconductor device.

Abstract: A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.

Abstract: A method and apparatus for a frequency-division marker are described.

Abstract: A non-volatile memory device includes a substrate, an insulating layer, a fin, an oxide layer, spacers and one or more control gates. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The oxide layer is formed on the fin and acts as a tunnel oxide for the memory device. The spacers are formed adjacent the side surfaces of the fin and the control gates are formed adjacent the spacers. The spacers act as floating gate electrodes for the non-volatile memory device.

Abstract: A semiconductor device includes a substrate and an insulating layer on the substrate. The semiconductor device also includes a fin structure formed on the insulating layer, where the fin structure includes first and second side surfaces, a dielectric layer formed on the first and second side surfaces of the fin structure, a first gate electrode formed adjacent the dielectric layer on the first side surface of the fin structure, a second gate electrode formed adjacent the dielectric layer on the second side surface of the fin structure, and a doped structure formed on an upper surface of the fin structure in the channel region of the semiconductor device.

Abstract: Method and apparatus for a frequency divider using variable capacitance are described.

Abstract: Disclosed are a system and method to detect RFID tags in electronic article surveillance systems using frequency mixing. The system includes an RFID module that includes an energy coupler to receive transmitted energy that includes a first signal at a first frequency and a second signal at a second frequency, and a mixing element to mix the first and second signals, to generate a third signal at a third frequency, and the energy coupler to transmit the third signal to an EAS detection system. Other embodiments are described and claimed.

Abstract: A method and apparatus to detect an external source are described.

Abstract: An integrated circuit package may include a substrate and an integrated circuit. The substrate may include at least one region, and a first magnetic material associated with the at least one region. The integrated circuit may have a second magnetic material associated therewith. The second magnetic material may be attracted to the first magnetic material to coupled the integrated circuit to the at least one region of the substrate. The IC package may be utilized in an RFID tag of an RFID system. An associated method for assembling an integrated circuit to a substrate is also provided.

Abstract: A solid state gas sensor may include gas sensing element coupled to a substrate. The gas sensing element may have a desired operating temperature, which may be between 100 and 400 degrees Celsius. The sensor may further include a temperature sensor coupled to the substrate and configured to sense an operating temperature of the sensing element and provide a feedback signal representative of the operating temperature. The sensor may further include a heater having a heat output. The heater may be responsive to the feedback signal to adjust the heat output to drive the operating temperature to the desired operating temperature. A detector such as a smoke detector or carbon monoxide detector having such a solid state gas sensor is also provided. An associated method is also provided.

Abstract: A method may include forming a gate electrode over a fin structure, depositing a first metal layer on a top surface of the gate electrode, performing a first silicide process to convert a portion of the gate electrode into a metal-silicide compound, depositing a second metal layer on a top surface of the metal-silicide compound, and performing a second silicide process to form a fully-silicided gate electrode.

Abstract: A dual-metal CMOS arrangement and method of making the same provides a substrate and a plurality of NMOS devices and PMOS devices formed on the substrate. Each of the plurality of NMOS devices and PMOS devices have gate electrodes. Each NMOS gate electrode includes a first silicide region on the substrate and a first metal region on the first silicide region. The first silicide region of the NMOS gate electrode consists of a first silicide having a work function that is close to the conduction band of silicon. Each of the PMOS gate electrodes includes a second silicide region on the substrate and a second metal region on the second silicide region. The second silicide region of the PMOS gate electrode consists of a second silicide having a work function that is close to the valence band of silicon.

Abstract: A method forms a semiconductor device from a device that includes a first source region, a first drain region, and a first fin structure that are separated from a second source region, a second drain region, and a second fin structure by an insulating layer. The method may include forming a dielectric layer over the device and removing portions of the dielectric layer to create covered portions and bare portions. The method may also include depositing a gate material over the covered portions and bare portions, doping the first fin structure, the first source region, and the first drain region with a first material, and doping the second fin structure, the second source region, and the second drain region with a second material. The method may further include removing a portion of the gate material over at least one covered portion to form the semiconductor device.