Abstract: Semiconductor structures and methods are provided. A method according to the present disclosure includes providing a workpiece that includes a plurality of active regions including channel regions and source/drain regions, and a plurality of dummy gate stacks intersecting the plurality of active regions at the channel regions, the plurality of dummy gate stacks including a device portion and a terminal end portion. The method further includes depositing a gate spacer layer over the workpiece, anisotropically etching the workpiece to recess the source/drain regions and to form a gate spacer from the gate spacer layer, forming a patterned photoresist layer over the workpiece to expose the device portion and the recessed source/drain regions while the terminal end portion is covered, and after the forming of the patterned photoresist layer, epitaxially forming source/drain features over the recessed source/drain regions.

Abstract: A semiconductor device includes a plurality of intermediate waveguides. The plurality of intermediate waveguides are vertically disposed on top of one another, and vertically adjacent ones of the plurality of intermediate waveguides are laterally offset from each other. When viewed from the top, each of the plurality of intermediate waveguides essentially consists of a first portion and a second portion, the first portion has a first varying width that increases from a first end of the corresponding intermediate waveguide to a middle of the corresponding intermediate waveguide, and the second portion has a second varying width that decreases from the middle of the corresponding intermediate waveguide to a second end of the corresponding intermediate waveguide.

Abstract: A two-phase immersion-cooling heat-dissipation structure having shortened evacuation route for vapor bubbles includes an immersion-cooling substrate having a first surface and a second surface that are opposite to each other and immersion-cooling fins. The second surface contacts a heat source immersed in a two-phase coolant, and the first surface connects to the immersion-cooling fins. The immersion-cooling fins include at least one skived fin integrally formed on the first surface of the immersion-cooling substrate by skiving, and further include at least one functional fin. The functional fin is a single continuous fin extends lengthwise in a vapor bubbles evacuation direction, has a central portion corresponding in position to the heat source and upper and lower end portions located away from the heat source, and a height of the central portion is greater than at least one of a height of the upper and lower end portions.

Abstract: A method includes: determining a first material and a second material of a photonic waveguide for propagating light, the photonic waveguide having a first section and a second section arranged in a first layer and a second layer, respectively, of the photonic waveguide; determining a spacing between the first layer and the second layer; determining a parameter set of a crosstalk reduction structure, according to the spacing, the first material and a wavelength of the light, to cause insertion losses of the first section and the second section to be lower than a predetermined threshold; and forming the first and second sections with the first and second materials, respectively, the first section having the crosstalk reduction structure overlapping the second section.

Abstract: The present application relates to a display panel, a manufacturing method thereof, and a display device. The display panel includes a base substrate, a plurality of pixel structures on the base substrate, and a color resist layer on a side of the plurality of pixel structures facing away the base substrate. The color resist layer includes a plurality of color resist blocks in one-to-one correspondence with the plurality of pixel structures. Light emitted from each of the plurality of pixel structures has the same color as the color resist block corresponding thereto.

Abstract: A two-phase immersion-cooling heat-dissipation structure having skived fins includes an immersion-cooling substrate and a plurality of immersion-cooling fins. The immersion-cooling substrate has a top surface and a bottom surface that are opposite to each other, the bottom surface is used for contacting a heat-generating component immersed in a two-phase coolant, the top surface is connected with the plurality of immersion-cooling fins, the plurality of immersion-cooling fins include at least one skived fin integrally formed on the top surface of the immersion-cooling substrate, and the plurality of immersion-cooling fins are non-linearly arranged. A thickness of any one of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm, a height of any one of the plurality of immersion-cooling fins ranges from 5 mm to 10 mm, and a gap between any two of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm.

Abstract: A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Abstract: Disclosed is a package structure including a circuit board, a co-packaged optics (CPO) substrate, an application specific integrated circuit (ASIC) assembly, a glass interposer, an electronic integrated circuit (EIC) assembly, a photonic integrated circuit (PIC) assembly, and an optical fiber assembly. The CPO substrate is configured on the circuit board, and the ASIC assembly is configured on the CPO substrate. The glass interposer is configured on the CPO substrate and includes an upper surface, a lower surface, a cavity, and at least one through glass via (TGV). The EIC assembly is configured on the upper surface of the glass interposer and electrically connected to the glass interposer. The PIC assembly is configured in the cavity of the glass interposer and electrically connected to the glass interposer. The optical fiber assembly is configured on the lower surface of the glass interposer and optically connected to the PIC assembly.

Abstract: The invention provides a circuit board structure and a manufacturing method thereof. The circuit board structure includes a line portion, a first insulating layer, and a conductive terminal. The first insulating layer is disposed on the line portion. The conductive terminal is disposed on the first insulating layer and embedded in the first insulating layer to be electrically connected with the line portion. The conductive terminal includes a first portion, a second portion, and a third portion. The first portion protrudes from a surface of the first insulating layer. The second portion is embedded in the first insulating layer and connected to the first portion. The third portion is disposed between the line portion and the second portion. A width of the second portion is greater than a width of the third portion.

Abstract: A lithography method to pattern a first semiconductor wafer is disclosed. An optical mask is positioned over the first semiconductor wafer. A first region of the first semiconductor wafer is patterned by directing light from a light source through transparent regions of the optical mask. A second region of the first semiconductor wafer is patterned by directing energy from an energy source to the second region, wherein the patterning of the second region comprises direct-beam writing.

Abstract: A process is provided to fabricate a finFET device having a semiconductor layer of a two-dimensional “2D” semiconductor material. The semiconductor layer of the 2D semiconductor material is a thin film layer formed over a dielectric fin-shaped structure. The 2D semiconductor layer extends over at least three surfaces of the dielectric fin structure, e.g., the upper surface and two sidewall surfaces. A vertical protrusion metal structure, referred to as “metal fin structure”, is formed about an edge of the dielectric fin structure and is used as a seed to grow the 2D semiconductor material.

Abstract: An organometallic precursor for extreme ultraviolet (EUV) lithography is provided. An organometallic precursor includes an aromatic di-dentate ligand, a transition metal coordinated to the aromatic di-dentate ligand, and an extreme ultraviolet (EUV) cleavable ligand coordinated to the transition metal. The aromatic di-dentate ligand includes a plurality of pyrazine molecules.

Abstract: This disclosure provides systems, methods and apparatuses for adding and releasing secondary cells in a multi-cell connectivity configuration. In one aspect, a user equipment (UE) may transmit UE assistance information to a base station (BS) operating as a master cell in a multi-cell connectivity configuration. The UE assistance information may indicate a process that the BS is to use to add a secondary cell to the multi-cell connectivity configuration, may indicate a time gap for adding a secondary cell after another secondary cell is released from the multi-cell connectivity configuration, as well as other multi-cell connectivity configuration information. The BS may receive the UE assistance information and may add a secondary cell to the multi-cell connectivity configuration based at least in part on the indicated process and time gap.

Abstract: A tricalcium silicate kit includes a first reagent containing tricalcium silicate, and a second reagent containing a salt material and water. The salt material is selected from the group consisting of sodium carbonate, calcium chloride, and a combination thereof. A method for preparing a Portland cement-based dental material using the tricalcium silicate kit is also provided.

Abstract: Inferential analysis includes: assessing risk of a cyber security failure in a computer network of an entity, using a computer agent configured to collect information from at least one accessible Internet elements, automatically determining, based on the assessed risk, a change or a setting to at least one element of policy criteria of a cyber security policy; and automatically recommending, based on the assessed risk, a computer network change to reduce the assessed risk.

Abstract: A two-phase immersion-type heat dissipation device is provided. The two-phase immersion-type heat dissipation device includes a heat dissipation substrate and a plurality of reinforced fins. The heat dissipation substrate has a first surface and a second surface configured to be in contact with a heating element. The first surface is opposite to the second surface and is arranged away from the heating element. The plurality of reinforced fins are integrally formed on the first surface of the heat dissipation substrate, and a thickness of each of the plurality of reinforced fins is less than 1 mm. According to a scanning electron microscopy image of electron backscattered diffraction, a median of local misorientation distribution of the plurality of reinforced fins is greater than 1.6 times a median of local misorientation distribution of the heat dissipation substrate.

Abstract: The present disclosure relates to an optical digital-to-analog converter (DAC). The optical DAC includes a first waveguide path configured to receive a first optical signal and a second waveguide path configured to receive a second optical signal. A first phase shifter segment interfaces with the first and second waveguide paths. The first phase shifter segment is configured to selectively generate a first phase shift between the first optical signal and the second optical signal in response to a first digital input. A second phase shifter segment interfaces with the first and second waveguide paths. The second phase shifter segment is configured to selectively generate a second phase shift between the first optical signal and the second optical signal in response to a second digital input. The first digital input and the second digital input correspond to different bits of a digital signal.

Abstract: The present invention provides plant produced anti-EGFR antibodies that have defined glycosylation patterns. Also provided are plant expression vectors encoding said antibodies, transformed plants that express said antibodies, and methods of using said antibodies to treat cancer.

Abstract: A two-phase immersion-type composite heat dissipation device is provided, which includes a heat dissipation substrate, a plurality of fins, and a surface porous layer. The heat dissipation substrate has a first surface and a second surface. The first surface is configured to be in contact with a heat source, and the second surface is opposite to the first surface and is distant from the heat source. A projection region of the heat dissipation substrate that corresponds to the heat source is defined as a high-temperature region, and a low-temperature region is defined at an outer periphery of the high-temperature region. The fins are opposite to the heat source, and are disposed within the high-temperature region of the second surface of the heat dissipation substrate. The surface porous layer is disposed within a range of the low-temperature region of the heat dissipation substrate.

Abstract: A pixel circuit includes a current control circuit, a time control circuit, and a light-emitting component, which are electrically coupled to one another in series along a common passage path of a driving current. The current control circuit is configured to control an intensity of the driving current according to a display data signal received thereby. The time control circuit is configured to control a passage time of the driving current according to a time data signal and a switch control signal received thereby. The light-emitting component is configured to emit a light according to the intensity and the passage time of the driving current.