Abstract: A method for forming a layer includes following operations. A workpiece is received in an apparatus for deposition. The apparatus for deposition includes a chamber, a pedestal disposed in the chamber to accommodate the workpiece, and a ring disposed on the pedestal. The ring includes a ring body having a first top surface and a second top surface and a barrier structure disposed between the first top surface and the second top surface. A vertical distance is defined by a top surface of the barrier structure and a top surface of the workpiece. The vertical distance is between approximately 0 mm and approximately 50 mm. A target disposed in the apparatus for deposition is sputtered. A sputtered material is deposited onto a top surface of the workpiece to form a layer. The barrier structure alters an electrical density distribution during the depositing the sputter material.

Abstract: A holster for docking a portable radio is provided. The holster is configured with a GND extension path that provides an antenna counterpoise for an external antenna of the portable radio. The holster is formed of a housing (121) having a belt attachment element (122) extending therefrom and a GND contact (124) integrated into therein, the a GND contact for coupling to a corresponding radio GND of the docked radio. The GND extension path extends from GND contact (124) through a first conductive element (126) of the holster housing to a second conductive element (128) embedded in the belt attachment element of the holster.

Abstract: One example includes an integrated circuit (IC) comprising a fin field effect transistor (FinFET). The FinFET includes a substrate with a fin extending from a surface of the substrate. The fin includes a source region, a drain region, and a drift region adjacent the drain region. The fin also includes a field-plating (FP) dielectric layer on a first side, a second side, and a third side of the drift region. The FP dielectric layer includes a high-K material.

Abstract: A method of fabricating an integrated circuit includes forming and patterning a hardmask over a substrate such that the patterned hardmask exposes regions of the substrate. The exposed regions are etched, thereby forming trenches and a semiconductor fin between the trenches. Prior to removing the hardmask, a photoresist layer is formed and patterned, thereby exposing a section of the semiconductor fin. A dopant is implanted into the exposed section through the hardmask.

Abstract: A hollow antenna substrate includes at least three layers of substrate structure. The first layer of the substrate has a first patterned metal layer and a first dielectric layer, with the first patterned metal layer embedded within the first dielectric layer, and a first upper surface and a first lower surface of the first patterned metal layer exposed to the first dielectric layer. The second layer is stacked on the first layer and has a second dielectric layer with a second patterned opening formed therein. The third layer is stacked on the second layer and has a third patterned metal layer and a third dielectric layer, with the third patterned layer embedded in the third dielectric layer and a third upper surface and a third lower surface exposed. The second patterned opening forms a hollow structure. A manufacturing method for the hollow antenna substrate is also provided.

Abstract: A method of manufacturing an electronic device includes providing a substrate, providing an intermediate layer on the substrate, and providing an isolation layer on the intermediate layer. The substrate includes an active region and a peripheral region. The peripheral region is adjacent to the active region, and the ratio of the area of the active region to the area of the substrate surface is between 75% and 92%. The isolation layer includes a first surface and at least one slope. The first surface of the isolation layer is correspondingly disposed in the active region. The at least one slope of the isolation layer is correspondingly disposed in the peripheral region and at a first angle with respect to the substrate surface.

Abstract: An integrated circuit including a substrate with a fin extending from a surface of the substrate. The fin includes a source region, a drain region, and a body region. The source region includes an outer region having a first conductivity type complementary to a second conductivity type of an outer region of the body and an interior-positioned conductive region having the second conductivity type.

Abstract: Devices, systems, and methods for automatically captioning images using swipe gestures as inputs. One example apparatus includes an electronic processor. The electronic processor is configured to receive an image. The electronic processor is configured to control a display to display the image. The electronic processor is configured to detect a first object in the image. The electronic processor is configured to detect a second object in the image. The electronic processor is configured to receive, from the display, a first swipe gesture. The electronic processor is configured to, responsive to receiving the first swipe gesture, determine a direction of the first swipe gesture relative to the first object and the second object. The electronic processor is configured to determine a word choice based on the first direction. The electronic processor is configured to generate a caption describing the image based on the word choice.

Abstract: A manufacturing method of a package structure of an electronic device, including the following steps, is provided. A first seed layer is formed on a carrier plate. A first metal layer is formed on the first seed layer. A first insulating layer is formed on the first metal layer, wherein the first insulating layer exposes a portion of the first metal layer. A first plasma treatment is performed on the first insulating layer and the exposed portion of the first metal layer. After performing the first plasma treatment, the carrier plate formed with the first seed layer, the first metal layer, and the first insulating layer is placed in a microenvironment controlling box. After taking the carrier plate out of the microenvironment controlling box, a second seed layer is formed on the first insulating layer and the exposed portion of the first metal layer.

Abstract: An apparatus for PVD is provided. The apparatus includes a chamber, a pedestal disposed in the chamber to accommodate a wafer, and a ring. The ring includes a ring body having a first top surface and a second top surface, and a barrier structure disposed between the first top surface and the second top surface. The barrier structure can further include at least a first portion and a second portion separated from each other. The second vertical distance is equal to or greater than the first vertical distance.

Abstract: An antenna apparatus and a control method are provided. The antenna apparatus includes a first antenna, a second antenna, and a movable mechanism. The first antenna is operated on a first frequency band. The second antenna surrounds the first antenna and is operated on a second frequency band. The first and second antennas are disposed on the movable mechanism. The movable mechanism is further configured to steer a direction of the first and second antennas. Accordingly, the requirements of multiple frequency bands and beam scanning may be fulfilled.

Abstract: A current generator includes a startup circuit and a bandgap reference circuit coupled to the startup circuit. The startup circuit is for generating a first voltage. The bandgap reference circuit is for generating a second voltage. The bandgap reference circuit includes an operational amplifier. The operational amplifier includes a bias source circuit and a bias generator circuit. The bias source circuit is for generating a reference current according to the first voltage and the second voltage. The bias generator circuit is for generating bias voltages according to the reference current. The startup circuit and the bandgap reference circuit receive a supply voltage.

Abstract: An electronic device includes a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, a third metal layer, a third insulating layer, a fourth metal layer, a fourth insulating layer and a conductive structure. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed on the second metal layer. The third metal layer is disposed on the second insulating layer. The third insulating layer is disposed on the third metal layer. The fourth metal layer is disposed on the third insulating layer. The fourth insulating layer is disposed on the fourth metal layer. The conductive structure is disposed on and electrically connected to the fourth insulating layer. A chemical resistance of the first insulating layer is greater than a chemical resistance of the fourth insulating layer.

Abstract: The present disclosure provides chimeric antigen receptor (CAR) for Human C-type lectin-like molecule-1 (CLL-1) comprising a polypeptide comprising: an extracellular antigen binding domain comprising an anti-CLL-1 single heavy chain variable domain (VH) and anti-CLL-1 single light chain variable domain (VL); a transmembrane domain; and an intracellular signaling domain. Immune effector cells comprising the CAR and pharmaceutical compositions based on the immune effector cells, as well as their therapeutic use in treating condition associated with CLL-1, are also disclosed.

Abstract: A portable radio is provided that performs an impedance measurement to determine a radio frequency (RF) load type connected to an antenna port of the portable radio. The portable radio includes an impedance measurement circuit and a tunable matching circuit operatively coupled thereto through an RF switch A sweep generator injects an LMR frequency sweep to the RF load during non-transmit or non-receive time slots for the impedance measurement. The tunable matching circuit is configured as a radio frequency (RF) bypass during the impedance measurement, thereby enabling the impedance measurement circuit to directly measure the impedance of the RF load coupled to the RF port and identify the RF load as either a land mobile radio (LMR) antenna or equipment (wideband load). When the RF load is determined to be an LMR antenna, then the matching circuitry is tuned for the identified antenna. When the RF load is determined to be wideband equipment, then the matching circuitry remains bypassed.

Abstract: A system and method for enhancing a collaborative camera installation experience is disclosed. The method includes running an at least substantially similar test analytic on each of the first video and the second video to generate: first analytic output data corresponding to analytic processing of the first video; and second analytic output data corresponding to analytic processing of the second video. The method also includes assembling for Graphical User Interface (GUI) display to the security camera acquirer, the first and second analytic output data, or performance data derived therefrom. The method also includes, after the assembling for the GUI display, receiving input that one of a plurality of three-dimensionally defined points is selected, thereby identifying a confirmed installation point where a video security camera, different than an at least one substitutional camera, will be permanently installed.

Abstract: A method for processing a semiconductor wafer is provided. The method includes polishing the semiconductor wafer with a chemical mechanical polishing (CMP) tool. The method includes transferring the polished semiconductor wafer to an interface tool from the CMP tool. The method includes discharging a mist spray over the polished semiconductor wafer in the interface tool. The method includes transferring the semiconductor wafer form the interface tool to a cleaning tool for a cleaning process.

Abstract: A method for fabricating an integrated circuit is disclosed. The method comprises forming a semiconductor ridge over a semiconductor surface of a substrate and forming an implant screen on a top and sidewalls of the semiconductor ridge. The implant screen is at least two times thicker on the top of the semiconductor ridge relative to the sidewalls of the semiconductor ridge. The method further comprises implanting a dopant into the top and sidewalls of the semiconductor ridge.

Abstract: A redistribution layer structure and the manufacturing method thereof are provided. The redistribution layer structure includes a first metal layer, a first dielectric layer, a second metal layer, and a second dielectric layer. The first dielectric layer is disposed on the first metal layer. The second metal layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the second metal layer. A chemical resistance of the first dielectric layer is greater than a chemical resistance of the second dielectric layer.

Abstract: An integrated circuit (IC) having a fin field effect transistor (FinFET) includes a substrate with a fin extending from a surface of the substrate. The fin includes a source region, a drain region, a drift region, and field plating oxide layer. The drift region is adjacent the drain region. The field plating oxide layer is on a first side, a second side, and a third side of the drift region.